diff options
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-bcm2835/gpio.h | 66 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-bcm2835/timer.h | 37 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-bcm2835/wdog.h | 36 |
3 files changed, 139 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h b/arch/arm/include/asm/arch-bcm2835/gpio.h new file mode 100644 index 0000000..0e70856 --- /dev/null +++ b/arch/arm/include/asm/arch-bcm2835/gpio.h @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2012 Vikram Narayananan + * <vikram186@gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _BCM2835_GPIO_H_ +#define _BCM2835_GPIO_H_ + +#define BCM2835_GPIO_BASE 0x20200000 +#define BCM2835_GPIO_COUNT 54 + +#define BCM2835_GPIO_FSEL_MASK 0x7 +#define BCM2835_GPIO_INPUT 0x0 +#define BCM2835_GPIO_OUTPUT 0x1 +#define BCM2835_GPIO_ALT0 0x4 +#define BCM2835_GPIO_ALT1 0x5 +#define BCM2835_GPIO_ALT2 0x6 +#define BCM2835_GPIO_ALT3 0x7 +#define BCM2835_GPIO_ALT4 0x3 +#define BCM2835_GPIO_ALT5 0x2 + +#define BCM2835_GPIO_COMMON_BANK(gpio) ((gpio < 32) ? 0 : 1) +#define BCM2835_GPIO_COMMON_SHIFT(gpio) (gpio & 0x1f) + +#define BCM2835_GPIO_FSEL_BANK(gpio) (gpio / 10) +#define BCM2835_GPIO_FSEL_SHIFT(gpio) ((gpio % 10) * 3) + +struct bcm2835_gpio_regs { + u32 gpfsel[6]; + u32 reserved1; + u32 gpset[2]; + u32 reserved2; + u32 gpclr[2]; + u32 reserved3; + u32 gplev[2]; + u32 reserved4; + u32 gpeds[2]; + u32 reserved5; + u32 gpren[2]; + u32 reserved6; + u32 gpfen[2]; + u32 reserved7; + u32 gphen[2]; + u32 reserved8; + u32 gplen[2]; + u32 reserved9; + u32 gparen[2]; + u32 reserved10; + u32 gppud; + u32 gppudclk[2]; +}; + +#endif /* _BCM2835_GPIO_H_ */ diff --git a/arch/arm/include/asm/arch-bcm2835/timer.h b/arch/arm/include/asm/arch-bcm2835/timer.h new file mode 100644 index 0000000..30c70e0 --- /dev/null +++ b/arch/arm/include/asm/arch-bcm2835/timer.h @@ -0,0 +1,37 @@ +/* + * (C) Copyright 2012 Stephen Warren + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _BCM2835_TIMER_H +#define _BCM2835_TIMER_H + +#define BCM2835_TIMER_PHYSADDR 0x20003000 + +struct bcm2835_timer_regs { + u32 cs; + u32 clo; + u32 chi; + u32 c0; + u32 c1; + u32 c2; + u32 c3; +}; + +#define BCM2835_TIMER_CS_M3 (1 << 3) +#define BCM2835_TIMER_CS_M2 (1 << 2) +#define BCM2835_TIMER_CS_M1 (1 << 1) +#define BCM2835_TIMER_CS_M0 (1 << 0) + +#endif diff --git a/arch/arm/include/asm/arch-bcm2835/wdog.h b/arch/arm/include/asm/arch-bcm2835/wdog.h new file mode 100644 index 0000000..303a65f --- /dev/null +++ b/arch/arm/include/asm/arch-bcm2835/wdog.h @@ -0,0 +1,36 @@ +/* + * (C) Copyright 2012 Stephen Warren + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _BCM2835_TIMER_H +#define _BCM2835_TIMER_H + +#define BCM2835_WDOG_PHYSADDR 0x20100000 + +struct bcm2835_wdog_regs { + u32 unknown0[7]; + u32 rstc; + u32 unknown1; + u32 wdog; +}; + +#define BCM2835_WDOG_PASSWORD 0x5a000000 + +#define BCM2835_WDOG_RSTC_WRCFG_MASK 0x00000030 +#define BCM2835_WDOG_RSTC_WRCFG_FULL_RESET 0x00000020 + +#define BCM2835_WDOG_WDOG_TIMEOUT_MASK 0x0000ffff + +#endif |