summaryrefslogtreecommitdiff
path: root/arch/arm/mach-uniphier/include/mach
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-uniphier/include/mach')
-rw-r--r--arch/arm/mach-uniphier/include/mach/board.h42
-rw-r--r--arch/arm/mach-uniphier/include/mach/boot-device.h15
-rw-r--r--arch/arm/mach-uniphier/include/mach/ddrphy-regs.h7
-rw-r--r--arch/arm/mach-uniphier/include/mach/debug-uart.S23
-rw-r--r--arch/arm/mach-uniphier/include/mach/init.h99
-rw-r--r--arch/arm/mach-uniphier/include/mach/led.h100
-rw-r--r--arch/arm/mach-uniphier/include/mach/micro-support-card.h39
-rw-r--r--arch/arm/mach-uniphier/include/mach/platdevice.h24
-rw-r--r--arch/arm/mach-uniphier/include/mach/sc-regs.h25
-rw-r--r--arch/arm/mach-uniphier/include/mach/sg-regs.h50
-rw-r--r--arch/arm/mach-uniphier/include/mach/soc_info.h63
11 files changed, 264 insertions, 223 deletions
diff --git a/arch/arm/mach-uniphier/include/mach/board.h b/arch/arm/mach-uniphier/include/mach/board.h
deleted file mode 100644
index e3cba5b..0000000
--- a/arch/arm/mach-uniphier/include/mach/board.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Copyright (C) 2012-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef ARCH_BOARD_H
-#define ARCH_BOARD_H
-
-#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD) || \
- defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
-void support_card_reset(void);
-void support_card_init(void);
-void support_card_late_init(void);
-int check_support_card(void);
-#else
-#define support_card_reset() do {} while (0)
-#define support_card_init() do {} while (0)
-#define support_card_late_init() do {} while (0)
-static inline int check_support_card(void)
-{
- return 0;
-}
-#endif
-
-static inline void uniphier_board_reset(void)
-{
- support_card_reset();
-}
-
-static inline void uniphier_board_init(void)
-{
- support_card_init();
-}
-
-static inline void uniphier_board_late_init(void)
-{
- support_card_late_init();
-}
-
-#endif /* ARCH_BOARD_H */
diff --git a/arch/arm/mach-uniphier/include/mach/boot-device.h b/arch/arm/mach-uniphier/include/mach/boot-device.h
index 7a10f1c..2ab5a53 100644
--- a/arch/arm/mach-uniphier/include/mach/boot-device.h
+++ b/arch/arm/mach-uniphier/include/mach/boot-device.h
@@ -1,6 +1,5 @@
/*
- * Copyright (C) 2011-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -8,13 +7,19 @@
#ifndef _ASM_BOOT_DEVICE_H_
#define _ASM_BOOT_DEVICE_H_
-int get_boot_mode_sel(void);
-
struct boot_device_info {
u32 type;
char *info;
};
-extern struct boot_device_info boot_device_table[];
+u32 ph1_sld3_boot_device(void);
+u32 ph1_ld4_boot_device(void);
+u32 ph1_pro5_boot_device(void);
+u32 proxstream2_boot_device(void);
+
+void ph1_sld3_boot_mode_show(void);
+void ph1_ld4_boot_mode_show(void);
+void ph1_pro5_boot_mode_show(void);
+void proxstream2_boot_mode_show(void);
#endif /* _ASM_BOOT_DEVICE_H_ */
diff --git a/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h b/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h
index fce0c01..adcc972 100644
--- a/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h
@@ -156,7 +156,8 @@ struct ddrphy {
/* SoC-specific parameters */
#define NR_DATX8_PER_DDRPHY 2
-#if defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \
+ defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
#define NR_DDRPHY_PER_CH 1
#else
#define NR_DDRPHY_PER_CH 2
@@ -167,7 +168,9 @@ struct ddrphy {
#define DDRPHY_BASE(ch, phy) (0x5bc01000 + 0x200000 * (ch) + 0x1000 * (phy))
#ifndef __ASSEMBLY__
-void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size);
+int ph1_ld4_ddrphy_init(struct ddrphy __iomem *phy, int freq, int size);
+int ph1_pro4_ddrphy_init(struct ddrphy __iomem *phy, int freq, int size);
+int ph1_sld8_ddrphy_init(struct ddrphy __iomem *phy, int freq, int size);
void ddrphy_prepare_training(struct ddrphy __iomem *phy, int rank);
int ddrphy_training(struct ddrphy __iomem *phy);
#endif
diff --git a/arch/arm/mach-uniphier/include/mach/debug-uart.S b/arch/arm/mach-uniphier/include/mach/debug-uart.S
deleted file mode 100644
index d2b431f..0000000
--- a/arch/arm/mach-uniphier/include/mach/debug-uart.S
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <linux/serial_reg.h>
-
-#if !defined(CONFIG_DEBUG_SEMIHOSTING)
-#include CONFIG_DEBUG_LL_INCLUDE
-#endif
-
-#define BAUDRATE 115200
-#define DIV_ROUND(x, d) (((x) + ((d) / 2)) / (d))
-#define DIVISOR DIV_ROUND(UART_CLK, 16 * BAUDRATE)
-
- .macro init_debug_uart, ra, rb, rc
- addruart \ra, \rb, \rc
- mov \rb, #UART_LCR_WLEN8 << 8
- str \rb, [\ra, #0x10]
- ldr \rb, =DIVISOR
- str \rb, [\ra, #0x24]
- .endm
diff --git a/arch/arm/mach-uniphier/include/mach/init.h b/arch/arm/mach-uniphier/include/mach/init.h
new file mode 100644
index 0000000..5108edd
--- /dev/null
+++ b/arch/arm/mach-uniphier/include/mach/init.h
@@ -0,0 +1,99 @@
+/*
+ * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __MACH_INIT_H
+#define __MACH_INIT_H
+
+struct uniphier_board_data {
+ unsigned long dram_ch0_base;
+ unsigned long dram_ch0_size;
+ unsigned long dram_ch0_width;
+ unsigned long dram_ch1_base;
+ unsigned long dram_ch1_size;
+ unsigned long dram_ch1_width;
+ unsigned long dram_ch2_base;
+ unsigned long dram_ch2_size;
+ unsigned long dram_ch2_width;
+ unsigned int dram_freq;
+};
+
+const struct uniphier_board_data *uniphier_get_board_param(const void *fdt);
+
+int ph1_sld3_init(const struct uniphier_board_data *bd);
+int ph1_ld4_init(const struct uniphier_board_data *bd);
+int ph1_pro4_init(const struct uniphier_board_data *bd);
+int ph1_sld8_init(const struct uniphier_board_data *bd);
+int ph1_pro5_init(const struct uniphier_board_data *bd);
+int proxstream2_init(const struct uniphier_board_data *bd);
+
+#if defined(CONFIG_MICRO_SUPPORT_CARD)
+int ph1_sld3_sbc_init(const struct uniphier_board_data *bd);
+int ph1_ld4_sbc_init(const struct uniphier_board_data *bd);
+int ph1_pro4_sbc_init(const struct uniphier_board_data *bd);
+int proxstream2_sbc_init(const struct uniphier_board_data *bd);
+#else
+static inline int ph1_sld3_sbc_init(const struct uniphier_board_data *bd)
+{
+ return 0;
+}
+
+static inline int ph1_ld4_sbc_init(const struct uniphier_board_data *bd)
+{
+ return 0;
+}
+
+static inline int ph1_pro4_sbc_init(const struct uniphier_board_data *bd)
+{
+ return 0;
+}
+
+static inline int proxstream2_sbc_init(const struct uniphier_board_data *bd)
+{
+ return 0;
+}
+#endif
+
+int ph1_sld3_bcu_init(const struct uniphier_board_data *bd);
+int ph1_ld4_bcu_init(const struct uniphier_board_data *bd);
+
+int memconf_init(const struct uniphier_board_data *bd);
+int ph1_sld3_memconf_init(const struct uniphier_board_data *bd);
+int proxstream2_memconf_init(const struct uniphier_board_data *bd);
+
+int ph1_sld3_pll_init(const struct uniphier_board_data *bd);
+int ph1_ld4_pll_init(const struct uniphier_board_data *bd);
+int ph1_pro4_pll_init(const struct uniphier_board_data *bd);
+int ph1_sld8_pll_init(const struct uniphier_board_data *bd);
+
+int ph1_sld3_enable_dpll_ssc(const struct uniphier_board_data *bd);
+int ph1_ld4_enable_dpll_ssc(const struct uniphier_board_data *bd);
+
+int ph1_ld4_early_clk_init(const struct uniphier_board_data *bd);
+int ph1_pro5_early_clk_init(const struct uniphier_board_data *bd);
+int proxstream2_early_clk_init(const struct uniphier_board_data *bd);
+
+int ph1_sld3_early_pin_init(const struct uniphier_board_data *bd);
+
+int ph1_ld4_umc_init(const struct uniphier_board_data *bd);
+int ph1_pro4_umc_init(const struct uniphier_board_data *bd);
+int ph1_sld8_umc_init(const struct uniphier_board_data *bd);
+
+void ph1_sld3_pin_init(void);
+void ph1_ld4_pin_init(void);
+void ph1_pro4_pin_init(void);
+void ph1_sld8_pin_init(void);
+void ph1_pro5_pin_init(void);
+void proxstream2_pin_init(void);
+void ph1_ld6b_pin_init(void);
+
+void ph1_ld4_clk_init(void);
+void ph1_pro4_clk_init(void);
+void ph1_pro5_clk_init(void);
+void proxstream2_clk_init(void);
+
+#define pr_err(fmt, args...) printf(fmt, ##args)
+
+#endif /* __MACH_INIT_H */
diff --git a/arch/arm/mach-uniphier/include/mach/led.h b/arch/arm/mach-uniphier/include/mach/led.h
deleted file mode 100644
index f7749b4..0000000
--- a/arch/arm/mach-uniphier/include/mach/led.h
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef ARCH_LED_H
-#define ARCH_LED_H
-
-#include <config.h>
-
-#define LED_CHAR_0 0x7e
-#define LED_CHAR_1 0x0c
-#define LED_CHAR_2 0xb6
-#define LED_CHAR_3 0x9e
-#define LED_CHAR_4 0xcc
-#define LED_CHAR_5 0xda
-#define LED_CHAR_6 0xfa
-#define LED_CHAR_7 0x4e
-#define LED_CHAR_8 0xfe
-#define LED_CHAR_9 0xde
-
-#define LED_CHAR_A 0xee
-#define LED_CHAR_B 0xf8
-#define LED_CHAR_C 0x72
-#define LED_CHAR_D 0xbc
-#define LED_CHAR_E 0xf2
-#define LED_CHAR_F 0xe2
-#define LED_CHAR_G 0x7a
-#define LED_CHAR_H 0xe8
-#define LED_CHAR_I 0x08
-#define LED_CHAR_J 0x3c
-#define LED_CHAR_K 0xea
-#define LED_CHAR_L 0x70
-#define LED_CHAR_M 0x6e
-#define LED_CHAR_N 0xa8
-#define LED_CHAR_O 0xb8
-#define LED_CHAR_P 0xe6
-#define LED_CHAR_Q 0xce
-#define LED_CHAR_R 0xa0
-#define LED_CHAR_S 0xc8
-#define LED_CHAR_T 0x8c
-#define LED_CHAR_U 0x7c
-#define LED_CHAR_V 0x54
-#define LED_CHAR_W 0xfc
-#define LED_CHAR_X 0xec
-#define LED_CHAR_Y 0xdc
-#define LED_CHAR_Z 0xa4
-
-#define LED_CHAR_SPACE 0x00
-#define LED_CHAR_DOT 0x01
-
-#define LED_CHAR_ (LED_CHAR_SPACE)
-
-/** Macro to translate 4 characters into integer to display led */
-#define LED_C2I(C0, C1, C2, C3) \
- (~( \
- (LED_CHAR_##C0 << 24) | \
- (LED_CHAR_##C1 << 16) | \
- (LED_CHAR_##C2 << 8) | \
- (LED_CHAR_##C3) \
- ))
-
-#if defined(CONFIG_SUPPORT_CARD_LED_BASE)
-
-#define LED_ADDR CONFIG_SUPPORT_CARD_LED_BASE
-
-#ifdef __ASSEMBLY__
-
-#define led_write(C0, C1, C2, C3) raw_led_write LED_C2I(C0, C1, C2, C3)
-.macro raw_led_write data
- ldr r0, =\data
- ldr r1, =LED_ADDR
- str r0, [r1]
-.endm
-
-#else /* __ASSEMBLY__ */
-
-#include <linux/io.h>
-
-#define led_write(C0, C1, C2, C3) \
-do { \
- raw_led_write(LED_C2I(C0, C1, C2, C3)); \
-} while (0)
-
-static inline void raw_led_write(u32 data)
-{
- writel(data, LED_ADDR);
-}
-
-#endif /* __ASSEMBLY__ */
-
-#else /* CONFIG_SUPPORT_CARD_LED_BASE */
-
-#define led_write(C0, C1, C2, C3)
-#define raw_led_write(x)
-
-#endif /* CONFIG_SUPPORT_CARD_LED_BASE */
-
-#endif /* ARCH_LED_H */
diff --git a/arch/arm/mach-uniphier/include/mach/micro-support-card.h b/arch/arm/mach-uniphier/include/mach/micro-support-card.h
new file mode 100644
index 0000000..5da0ada
--- /dev/null
+++ b/arch/arm/mach-uniphier/include/mach/micro-support-card.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef ARCH_BOARD_H
+#define ARCH_BOARD_H
+
+#if defined(CONFIG_MICRO_SUPPORT_CARD)
+void support_card_reset(void);
+void support_card_init(void);
+void support_card_late_init(void);
+int check_support_card(void);
+void led_puts(const char *s);
+#else
+static inline void support_card_reset(void)
+{
+}
+
+static inline void support_card_init(void)
+{
+}
+
+static inline void support_card_late_init(void)
+{
+}
+
+static inline int check_support_card(void)
+{
+ return 0;
+}
+
+static inline void led_puts(const char *s)
+{
+}
+#endif
+
+#endif /* ARCH_BOARD_H */
diff --git a/arch/arm/mach-uniphier/include/mach/platdevice.h b/arch/arm/mach-uniphier/include/mach/platdevice.h
deleted file mode 100644
index cdf7d13..0000000
--- a/arch/arm/mach-uniphier/include/mach/platdevice.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright (C) 2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef ARCH_PLATDEVICE_H
-#define ARCH_PLATDEVICE_H
-
-#include <dm/platdata.h>
-#include <dm/platform_data/serial-uniphier.h>
-
-#define SERIAL_DEVICE(n, ba, clk) \
-static struct uniphier_serial_platform_data serial_device##n = { \
- .base = ba, \
- .uartclk = clk \
-}; \
-U_BOOT_DEVICE(serial##n) = { \
- .name = DRIVER_NAME, \
- .platdata = &serial_device##n \
-};
-
-#endif /* ARCH_PLATDEVICE_H */
diff --git a/arch/arm/mach-uniphier/include/mach/sc-regs.h b/arch/arm/mach-uniphier/include/mach/sc-regs.h
index df50294..474b82d 100644
--- a/arch/arm/mach-uniphier/include/mach/sc-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/sc-regs.h
@@ -9,12 +9,16 @@
#ifndef ARCH_SC_REGS_H
#define ARCH_SC_REGS_H
-#if defined(CONFIG_MACH_PH1_SLD3)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
#define SC_BASE_ADDR 0xf1840000
#else
#define SC_BASE_ADDR 0x61840000
#endif
+#define SC_DPLLOSCCTRL (SC_BASE_ADDR | 0x1110)
+#define SC_DPLLOSCCTRL_DPLLST (0x1 << 1)
+#define SC_DPLLOSCCTRL_DPLLEN (0x1 << 0)
+
#define SC_DPLLCTRL (SC_BASE_ADDR | 0x1200)
#define SC_DPLLCTRL_SSC_EN (0x1 << 31)
#define SC_DPLLCTRL_FOUTMODE_MASK (0xf << 16)
@@ -43,6 +47,7 @@
#define SC_RSTCTRL_NRST_ETHER (0x1 << 12)
#define SC_RSTCTRL_NRST_STDMAC (0x1 << 10)
#define SC_RSTCTRL_NRST_GIO (0x1 << 6)
+/* Pro4 or older */
#define SC_RSTCTRL_NRST_UMC1 (0x1 << 5)
#define SC_RSTCTRL_NRST_UMC0 (0x1 << 4)
#define SC_RSTCTRL_NRST_NAND (0x1 << 2)
@@ -53,6 +58,16 @@
#define SC_RSTCTRL3 (SC_BASE_ADDR | 0x2008)
+/* Pro5 or newer */
+#define SC_RSTCTRL4 (SC_BASE_ADDR | 0x200c)
+#define SC_RSTCTRL4_NRST_UMCSB (0x1 << 12) /* UMC system bus */
+#define SC_RSTCTRL4_NRST_UMCA2 (0x1 << 10) /* UMC ch2 standby */
+#define SC_RSTCTRL4_NRST_UMCA1 (0x1 << 9) /* UMC ch1 standby */
+#define SC_RSTCTRL4_NRST_UMCA0 (0x1 << 8) /* UMC ch0 standby */
+#define SC_RSTCTRL4_NRST_UMC32 (0x1 << 6) /* UMC ch2 */
+#define SC_RSTCTRL4_NRST_UMC31 (0x1 << 5) /* UMC ch1 */
+#define SC_RSTCTRL4_NRST_UMC30 (0x1 << 4) /* UMC ch0 */
+
#define SC_CLKCTRL (SC_BASE_ADDR | 0x2104)
#define SC_CLKCTRL_CEN_USB31 (0x1 << 17) /* USB3 #1 */
#define SC_CLKCTRL_CEN_USB30 (0x1 << 16) /* USB3 #0 */
@@ -60,11 +75,19 @@
#define SC_CLKCTRL_CEN_MIO (0x1 << 11)
#define SC_CLKCTRL_CEN_STDMAC (0x1 << 10)
#define SC_CLKCTRL_CEN_GIO (0x1 << 6)
+/* Pro4 or older */
#define SC_CLKCTRL_CEN_UMC (0x1 << 4)
#define SC_CLKCTRL_CEN_NAND (0x1 << 2)
#define SC_CLKCTRL_CEN_SBC (0x1 << 1)
#define SC_CLKCTRL_CEN_PERI (0x1 << 0)
+/* Pro5 or newer */
+#define SC_CLKCTRL4 (SC_BASE_ADDR | 0x210c)
+#define SC_CLKCTRL4_CEN_UMCSB (0x1 << 12) /* UMC system bus */
+#define SC_CLKCTRL4_CEN_UMC2 (0x1 << 2) /* UMC ch2 */
+#define SC_CLKCTRL4_CEN_UMC1 (0x1 << 1) /* UMC ch1 */
+#define SC_CLKCTRL4_CEN_UMC0 (0x1 << 0) /* UMC ch0 */
+
/* System reset control register */
#define SC_IRQTIMSET (SC_BASE_ADDR | 0x3000)
#define SC_SLFRSTSEL (SC_BASE_ADDR | 0x3010)
diff --git a/arch/arm/mach-uniphier/include/mach/sg-regs.h b/arch/arm/mach-uniphier/include/mach/sg-regs.h
index 43a6c35..678d437 100644
--- a/arch/arm/mach-uniphier/include/mach/sg-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/sg-regs.h
@@ -25,53 +25,43 @@
/* Memory Configuration */
#define SG_MEMCONF (SG_CTRL_BASE | 0x0400)
+#define SG_MEMCONF_CH0_SZ_MASK ((0x1 << 10) | (0x03 << 0))
#define SG_MEMCONF_CH0_SZ_64M ((0x0 << 10) | (0x01 << 0))
#define SG_MEMCONF_CH0_SZ_128M ((0x0 << 10) | (0x02 << 0))
#define SG_MEMCONF_CH0_SZ_256M ((0x0 << 10) | (0x03 << 0))
#define SG_MEMCONF_CH0_SZ_512M ((0x1 << 10) | (0x00 << 0))
#define SG_MEMCONF_CH0_SZ_1G ((0x1 << 10) | (0x01 << 0))
+#define SG_MEMCONF_CH0_NUM_MASK (0x1 << 8)
#define SG_MEMCONF_CH0_NUM_1 (0x1 << 8)
#define SG_MEMCONF_CH0_NUM_2 (0x0 << 8)
+#define SG_MEMCONF_CH1_SZ_MASK ((0x1 << 11) | (0x03 << 2))
#define SG_MEMCONF_CH1_SZ_64M ((0x0 << 11) | (0x01 << 2))
#define SG_MEMCONF_CH1_SZ_128M ((0x0 << 11) | (0x02 << 2))
#define SG_MEMCONF_CH1_SZ_256M ((0x0 << 11) | (0x03 << 2))
#define SG_MEMCONF_CH1_SZ_512M ((0x1 << 11) | (0x00 << 2))
#define SG_MEMCONF_CH1_SZ_1G ((0x1 << 11) | (0x01 << 2))
+#define SG_MEMCONF_CH1_NUM_MASK (0x1 << 9)
#define SG_MEMCONF_CH1_NUM_1 (0x1 << 9)
#define SG_MEMCONF_CH1_NUM_2 (0x0 << 9)
+#define SG_MEMCONF_CH2_SZ_MASK ((0x1 << 26) | (0x03 << 16))
#define SG_MEMCONF_CH2_SZ_64M ((0x0 << 26) | (0x01 << 16))
#define SG_MEMCONF_CH2_SZ_128M ((0x0 << 26) | (0x02 << 16))
#define SG_MEMCONF_CH2_SZ_256M ((0x0 << 26) | (0x03 << 16))
#define SG_MEMCONF_CH2_SZ_512M ((0x1 << 26) | (0x00 << 16))
+#define SG_MEMCONF_CH2_NUM_MASK (0x1 << 24)
#define SG_MEMCONF_CH2_NUM_1 (0x1 << 24)
#define SG_MEMCONF_CH2_NUM_2 (0x0 << 24)
+/* PH1-LD6b, ProXstream2 only */
+#define SG_MEMCONF_CH2_DISABLE (0x1 << 21)
#define SG_MEMCONF_SPARSEMEM (0x1 << 4)
/* Pin Control */
#define SG_PINCTRL_BASE (SG_CTRL_BASE | 0x1000)
-#if defined(CONFIG_MACH_PH1_PRO4)
-# define SG_PINCTRL(n) (SG_PINCTRL_BASE + (n) * 8)
-#elif defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_LD4) || \
- defined(CONFIG_MACH_PH1_SLD8)
-# define SG_PINCTRL(n) (SG_PINCTRL_BASE + (n) * 4)
-#endif
-
-#if defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_PRO4)
-#define SG_PINSELBITS 4
-#elif defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8)
-#define SG_PINSELBITS 8
-#endif
-
-#define SG_PINSEL_ADDR(n) (SG_PINCTRL((n) * (SG_PINSELBITS) / 32))
-#define SG_PINSEL_MASK(n) (~(((1 << (SG_PINSELBITS)) - 1) << \
- ((n) * (SG_PINSELBITS) % 32)))
-#define SG_PINSEL_MODE(n, mode) ((mode) << ((n) * (SG_PINSELBITS) % 32))
-
-/* Only for PH1-Pro4 */
+/* PH1-Pro4, PH1-Pro5 */
#define SG_LOADPINCTRL (SG_CTRL_BASE | 0x1700)
/* Input Enable */
@@ -98,11 +88,11 @@
#ifdef __ASSEMBLY__
- .macro set_pinsel, n, value, ra, rd
- ldr \ra, =SG_PINSEL_ADDR(\n)
+ .macro sg_set_pinsel, pin, muxval, mux_bits, reg_stride, ra, rd
+ ldr \ra, =(SG_PINCTRL_BASE + \pin * \mux_bits / 32 * \reg_stride)
ldr \rd, [\ra]
- and \rd, \rd, #SG_PINSEL_MASK(\n)
- orr \rd, \rd, #SG_PINSEL_MODE(\n, \value)
+ and \rd, \rd, #~(((1 << \mux_bits) - 1) << (\pin * \mux_bits % 32))
+ orr \rd, \rd, #(\muxval << (\pin * \mux_bits % 32))
str \rd, [\ra]
.endm
@@ -111,10 +101,18 @@
#include <linux/types.h>
#include <linux/io.h>
-static inline void sg_set_pinsel(int n, int value)
+static inline void sg_set_pinsel(unsigned pin, unsigned muxval,
+ unsigned mux_bits, unsigned reg_stride)
{
- writel((readl(SG_PINSEL_ADDR(n)) & SG_PINSEL_MASK(n))
- | SG_PINSEL_MODE(n, value), SG_PINSEL_ADDR(n));
+ unsigned shift = pin * mux_bits % 32;
+ unsigned reg = SG_PINCTRL_BASE + pin * mux_bits / 32 * reg_stride;
+ u32 mask = (1U << mux_bits) - 1;
+ u32 tmp;
+
+ tmp = readl(reg);
+ tmp &= ~(mask << shift);
+ tmp |= (mask & muxval) << shift;
+ writel(tmp, reg);
}
#endif /* __ASSEMBLY__ */
diff --git a/arch/arm/mach-uniphier/include/mach/soc_info.h b/arch/arm/mach-uniphier/include/mach/soc_info.h
new file mode 100644
index 0000000..623e7ef
--- /dev/null
+++ b/arch/arm/mach-uniphier/include/mach/soc_info.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __MACH_SOC_INFO_H__
+#define __MACH_SOC_INFO_H__
+
+enum uniphier_soc_id {
+ SOC_UNIPHIER_PH1_SLD3,
+ SOC_UNIPHIER_PH1_LD4,
+ SOC_UNIPHIER_PH1_PRO4,
+ SOC_UNIPHIER_PH1_SLD8,
+ SOC_UNIPHIER_PH1_PRO5,
+ SOC_UNIPHIER_PROXSTREAM2,
+ SOC_UNIPHIER_PH1_LD6B,
+ SOC_UNIPHIER_UNKNOWN,
+};
+
+#define UNIPHIER_NR_ENABLED_SOCS \
+ IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_SLD3) + \
+ IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_LD4) + \
+ IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_PRO4) + \
+ IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_SLD8) + \
+ IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_PRO5) + \
+ IS_ENABLED(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) + \
+ IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_LD6B)
+
+#define UNIPHIER_MULTI_SOC ((UNIPHIER_NR_ENABLED_SOCS) > 1)
+
+#if UNIPHIER_MULTI_SOC
+enum uniphier_soc_id uniphier_get_soc_type(void);
+#else
+static inline enum uniphier_soc_id uniphier_get_soc_type(void)
+{
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
+ return SOC_UNIPHIER_PH1_SLD3;
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4)
+ return SOC_UNIPHIER_PH1_LD4;
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
+ return SOC_UNIPHIER_PH1_PRO4;
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
+ return SOC_UNIPHIER_PH1_SLD8;
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5)
+ return SOC_UNIPHIER_PH1_PRO5;
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2)
+ return SOC_UNIPHIER_PROXSTREAM2;
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B)
+ return SOC_UNIPHIER_PH1_LD6B;
+#endif
+
+ return SOC_UNIPHIER_UNKNOWN;
+}
+#endif
+
+#endif /* __MACH_SOC_INFO_H__ */