1 files changed, 31 insertions, 131 deletions

diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index 7f3b13d..4372a5c 100644
--- a/arch/x86/cpu/ivybridge/sdram.c
+++ b/arch/x86/cpu/ivybridge/sdram.c
@@ -21,10 +21,10 @@
 #include <asm/processor.h>
 #include <asm/gpio.h>
 #include <asm/global_data.h>
+#include <asm/mrccache.h>
 #include <asm/mtrr.h>
 #include <asm/pci.h>
 #include <asm/arch/me.h>
-#include <asm/arch/mrccache.h>
 #include <asm/arch/pei_data.h>
 #include <asm/arch/pch.h>
 #include <asm/post.h>
@@ -89,51 +89,15 @@ void dram_init_banksize(void)
 	}
 }
 
-static int get_mrc_entry(struct udevice **devp, struct fmap_entry *entry)
-{
-	const void *blob = gd->fdt_blob;
-	int node, spi_node, mrc_node;
-	int upto;
-	int ret;
-
-	/* Find the flash chip within the SPI controller node */
-	upto = 0;
-	spi_node = fdtdec_next_alias(blob, "spi", COMPAT_INTEL_ICH_SPI, &upto);
-	if (spi_node < 0)
-		return -ENOENT;
-	node = fdt_first_subnode(blob, spi_node);
-	if (node < 0)
-		return -ECHILD;
-
-	/* Find the place where we put the MRC cache */
-	mrc_node = fdt_subnode_offset(blob, node, "rw-mrc-cache");
-	if (mrc_node < 0)
-		return -EPERM;
-
-	if (fdtdec_read_fmap_entry(blob, mrc_node, "rm-mrc-cache", entry))
-		return -EINVAL;
-
-	if (devp) {
-		debug("getting sf\n");
-		ret = uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node,
-						     devp);
-		debug("ret = %d\n", ret);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
 static int read_seed_from_cmos(struct pei_data *pei_data)
 {
 	u16 c1, c2, checksum, seed_checksum;
 	struct udevice *dev;
-	int rcode = 0;
+	int ret = 0;
 
-	rcode = uclass_get_device(UCLASS_RTC, 0, &dev);
-	if (rcode) {
-		debug("Cannot find RTC: err=%d\n", rcode);
+	ret = uclass_get_device(UCLASS_RTC, 0, &dev);
+	if (ret) {
+		debug("Cannot find RTC: err=%d\n", ret);
 		return -ENODEV;
 	}
 
@@ -143,11 +107,18 @@ static int read_seed_from_cmos(struct pei_data *pei_data)
 	 * the flash too much. So we store these in CMOS and the large MRC
 	 * data in SPI flash.
 	 */
-	rtc_read32(dev, CMOS_OFFSET_MRC_SEED, &pei_data->scrambler_seed);
+	ret = rtc_read32(dev, CMOS_OFFSET_MRC_SEED, &pei_data->scrambler_seed);
+	if (!ret) {
+		ret = rtc_read32(dev, CMOS_OFFSET_MRC_SEED_S3,
+				 &pei_data->scrambler_seed_s3);
+	}
+	if (ret) {
+		debug("Failed to read from RTC %s\n", dev->name);
+		return ret;
+	}
+
 	debug("Read scrambler seed    0x%08x from CMOS 0x%02x\n",
 	      pei_data->scrambler_seed, CMOS_OFFSET_MRC_SEED);
-
-	rtc_read32(dev, CMOS_OFFSET_MRC_SEED_S3, &pei_data->scrambler_seed_s3);
 	debug("Read S3 scrambler seed 0x%08x from CMOS 0x%02x\n",
 	      pei_data->scrambler_seed_s3, CMOS_OFFSET_MRC_SEED_S3);
 
@@ -174,27 +145,21 @@ static int read_seed_from_cmos(struct pei_data *pei_data)
 static int prepare_mrc_cache(struct pei_data *pei_data)
 {
 	struct mrc_data_container *mrc_cache;
-	struct fmap_entry entry;
+	struct mrc_region entry;
 	int ret;
 
 	ret = read_seed_from_cmos(pei_data);
 	if (ret)
 		return ret;
-	ret = get_mrc_entry(NULL, &entry);
+	ret = mrccache_get_region(NULL, &entry);
 	if (ret)
 		return ret;
 	mrc_cache = mrccache_find_current(&entry);
 	if (!mrc_cache)
 		return -ENOENT;
 
-	/*
-	 * TODO(sjg@chromium.org): Skip this for now as it causes boot
-	 * problems
-	 */
-	if (0) {
-		pei_data->mrc_input = mrc_cache->data;
-		pei_data->mrc_input_len = mrc_cache->data_size;
-	}
+	pei_data->mrc_input = mrc_cache->data;
+	pei_data->mrc_input_len = mrc_cache->data_size;
 	debug("%s: at %p, size %x checksum %04x\n", __func__,
 	      pei_data->mrc_input, pei_data->mrc_input_len,
 	      mrc_cache->checksum);
@@ -202,41 +167,15 @@ static int prepare_mrc_cache(struct pei_data *pei_data)
 	return 0;
 }
 
-static int build_mrc_data(struct mrc_data_container **datap)
-{
-	struct mrc_data_container *data;
-	int orig_len;
-	int output_len;
-
-	orig_len = gd->arch.mrc_output_len;
-	output_len = ALIGN(orig_len, 16);
-	data = malloc(output_len + sizeof(*data));
-	if (!data)
-		return -ENOMEM;
-	data->signature = MRC_DATA_SIGNATURE;
-	data->data_size = output_len;
-	data->reserved = 0;
-	memcpy(data->data, gd->arch.mrc_output, orig_len);
-
-	/* Zero the unused space in aligned buffer. */
-	if (output_len > orig_len)
-		memset(data->data + orig_len, 0, output_len - orig_len);
-
-	data->checksum = compute_ip_checksum(data->data, output_len);
-	*datap = data;
-
-	return 0;
-}
-
 static int write_seeds_to_cmos(struct pei_data *pei_data)
 {
 	u16 c1, c2, checksum;
 	struct udevice *dev;
-	int rcode = 0;
+	int ret = 0;
 
-	rcode = uclass_get_device(UCLASS_RTC, 0, &dev);
-	if (rcode) {
-		debug("Cannot find RTC: err=%d\n", rcode);
+	ret = uclass_get_device(UCLASS_RTC, 0, &dev);
+	if (ret) {
+		debug("Cannot find RTC: err=%d\n", ret);
 		return -ENODEV;
 	}
 
@@ -262,42 +201,12 @@ static int write_seeds_to_cmos(struct pei_data *pei_data)
 	return 0;
 }
 
-static int sdram_save_mrc_data(void)
-{
-	struct mrc_data_container *data;
-	struct fmap_entry entry;
-	struct udevice *sf;
-	int ret;
-
-	if (!gd->arch.mrc_output_len)
-		return 0;
-	debug("Saving %d bytes of MRC output data to SPI flash\n",
-	      gd->arch.mrc_output_len);
-
-	ret = get_mrc_entry(&sf, &entry);
-	if (ret)
-		goto err_entry;
-	ret = build_mrc_data(&data);
-	if (ret)
-		goto err_data;
-	ret = mrccache_update(sf, &entry, data);
-	if (!ret)
-		debug("Saved MRC data with checksum %04x\n", data->checksum);
-
-	free(data);
-err_data:
-err_entry:
-	if (ret)
-		debug("%s: Failed: %d\n", __func__, ret);
-	return ret;
-}
-
 /* Use this hook to save our SDRAM parameters */
 int misc_init_r(void)
 {
 	int ret;
 
-	ret = sdram_save_mrc_data();
+	ret = mrccache_save();
 	if (ret)
 		printf("Unable to save MRC data: %d\n", ret);
 
@@ -421,9 +330,11 @@ int sdram_initialise(struct pei_data *pei_data)
 	if (data) {
 		int rv;
 		int (*func)(struct pei_data *);
+		ulong start;
 
 		debug("Calling MRC at %p\n", data);
 		post_code(POST_PRE_MRC);
+		start = get_timer(0);
 		func = (int (*)(struct pei_data *))data;
 		rv = func(pei_data);
 		post_code(POST_MRC);
@@ -441,6 +352,7 @@ int sdram_initialise(struct pei_data *pei_data)
 			printf("Nonzero MRC return value.\n");
 			return -EFAULT;
 		}
+		debug("MRC execution time %lu ms\n", get_timer(start));
 	} else {
 		printf("UEFI PEI System Agent not found.\n");
 		return -ENOSYS;
@@ -455,7 +367,7 @@ int sdram_initialise(struct pei_data *pei_data)
 	debug("System Agent Version %d.%d.%d Build %d\n",
 	      version >> 24 , (version >> 16) & 0xff,
 	      (version >> 8) & 0xff, version & 0xff);
-	debug("MCR output data length %#x at %p\n", pei_data->mrc_output_len,
+	debug("MRC output data length %#x at %p\n", pei_data->mrc_output_len,
 	      pei_data->mrc_output);
 
 	/*
@@ -476,7 +388,7 @@ int sdram_initialise(struct pei_data *pei_data)
 	if (pei_data->boot_mode != PEI_BOOT_RESUME) {
 		/*
 		 * This will be copied to SDRAM in reserve_arch(), then written
-		 * to SPI flash in sdram_save_mrc_data()
+		 * to SPI flash in mrccache_save()
 		 */
 		gd->arch.mrc_output = (char *)pei_data->mrc_output;
 		gd->arch.mrc_output_len = pei_data->mrc_output_len;
@@ -490,19 +402,7 @@ int sdram_initialise(struct pei_data *pei_data)
 
 int reserve_arch(void)
 {
-	u16 checksum;
-
-	checksum = compute_ip_checksum(gd->arch.mrc_output,
-				       gd->arch.mrc_output_len);
-	debug("Saving %d bytes for MRC output data, checksum %04x\n",
-	      gd->arch.mrc_output_len, checksum);
-	gd->start_addr_sp -= gd->arch.mrc_output_len;
-	memcpy((void *)gd->start_addr_sp, gd->arch.mrc_output,
-	       gd->arch.mrc_output_len);
-	gd->arch.mrc_output = (char *)gd->start_addr_sp;
-	gd->start_addr_sp &= ~0xf;
-
-	return 0;
+	return mrccache_reserve();
 }
 
 static int copy_spd(struct pei_data *peid)
@@ -827,7 +727,7 @@ int dram_init(void)
 	int ret;
 
 	debug("Boot mode %d\n", gd->arch.pei_boot_mode);
-	debug("mcr_input %p\n", pei_data.mrc_input);
+	debug("mrc_input %p\n", pei_data.mrc_input);
 	pei_data.boot_mode = gd->arch.pei_boot_mode;
 	ret = copy_spd(&pei_data);
 	if (!ret)