diff options
Diffstat (limited to 'arch/x86/dts/crownbay.dts')
| -rw-r--r-- | arch/x86/dts/crownbay.dts | 150 |
1 files changed, 78 insertions, 72 deletions
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index 84231b3..2a18be0 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -72,17 +72,6 @@ stdout-path = "/serial"; }; - spi { - #address-cells = <1>; - #size-cells = <0>; - compatible = "intel,ich-spi"; - spi-flash@0 { - reg = <0>; - compatible = "sst,25vf016b", "spi-flash"; - memory-map = <0xffe00000 0x00200000>; - }; - }; - microcode { update@0 { #include "microcode/m0220661105_cv.dtsi" @@ -170,68 +159,85 @@ }; }; - irq-router@1f,0 { + pch@1f,0 { reg = <0x0000f800 0 0 0 0>; - compatible = "intel,irq-router"; - intel,pirq-config = "pci"; - intel,pirq-link = <0x60 8>; - intel,pirq-mask = <0xcee0>; - intel,pirq-routing = < - /* TunnelCreek PCI devices */ - PCI_BDF(0, 2, 0) INTA PIRQE - PCI_BDF(0, 3, 0) INTA PIRQF - PCI_BDF(0, 23, 0) INTA PIRQA - PCI_BDF(0, 23, 0) INTB PIRQB - PCI_BDF(0, 23, 0) INTC PIRQC - PCI_BDF(0, 23, 0) INTD PIRQD - PCI_BDF(0, 24, 0) INTA PIRQB - PCI_BDF(0, 24, 0) INTB PIRQC - PCI_BDF(0, 24, 0) INTC PIRQD - PCI_BDF(0, 24, 0) INTD PIRQA - PCI_BDF(0, 25, 0) INTA PIRQC - PCI_BDF(0, 25, 0) INTB PIRQD - PCI_BDF(0, 25, 0) INTC PIRQA - PCI_BDF(0, 25, 0) INTD PIRQB - PCI_BDF(0, 26, 0) INTA PIRQD - PCI_BDF(0, 26, 0) INTB PIRQA - PCI_BDF(0, 26, 0) INTC PIRQB - PCI_BDF(0, 26, 0) INTD PIRQC - PCI_BDF(0, 27, 0) INTA PIRQG - /* - * Topcliff PCI devices - * - * Note on the Crown Bay board, Topcliff chipset - * is connected to TunnelCreek PCIe port 0, so - * its bus number is 1 for its PCIe port and 2 - * for its PCI devices per U-Boot current PCI - * bus enumeration algorithm. - */ - PCI_BDF(1, 0, 0) INTA PIRQA - PCI_BDF(2, 0, 1) INTA PIRQA - PCI_BDF(2, 0, 2) INTA PIRQA - PCI_BDF(2, 2, 0) INTB PIRQD - PCI_BDF(2, 2, 1) INTB PIRQD - PCI_BDF(2, 2, 2) INTB PIRQD - PCI_BDF(2, 2, 3) INTB PIRQD - PCI_BDF(2, 2, 4) INTB PIRQD - PCI_BDF(2, 4, 0) INTC PIRQC - PCI_BDF(2, 4, 1) INTC PIRQC - PCI_BDF(2, 6, 0) INTD PIRQB - PCI_BDF(2, 8, 0) INTA PIRQA - PCI_BDF(2, 8, 1) INTA PIRQA - PCI_BDF(2, 8, 2) INTA PIRQA - PCI_BDF(2, 8, 3) INTA PIRQA - PCI_BDF(2, 10, 0) INTB PIRQD - PCI_BDF(2, 10, 1) INTB PIRQD - PCI_BDF(2, 10, 2) INTB PIRQD - PCI_BDF(2, 10, 3) INTB PIRQD - PCI_BDF(2, 10, 4) INTB PIRQD - PCI_BDF(2, 12, 0) INTC PIRQC - PCI_BDF(2, 12, 1) INTC PIRQC - PCI_BDF(2, 12, 2) INTC PIRQC - PCI_BDF(2, 12, 3) INTC PIRQC - PCI_BDF(2, 12, 4) INTC PIRQC - >; + compatible = "intel,pch7"; + + irq-router { + compatible = "intel,irq-router"; + intel,pirq-config = "pci"; + intel,pirq-link = <0x60 8>; + intel,pirq-mask = <0xcee0>; + intel,pirq-routing = < + /* TunnelCreek PCI devices */ + PCI_BDF(0, 2, 0) INTA PIRQE + PCI_BDF(0, 3, 0) INTA PIRQF + PCI_BDF(0, 23, 0) INTA PIRQA + PCI_BDF(0, 23, 0) INTB PIRQB + PCI_BDF(0, 23, 0) INTC PIRQC + PCI_BDF(0, 23, 0) INTD PIRQD + PCI_BDF(0, 24, 0) INTA PIRQB + PCI_BDF(0, 24, 0) INTB PIRQC + PCI_BDF(0, 24, 0) INTC PIRQD + PCI_BDF(0, 24, 0) INTD PIRQA + PCI_BDF(0, 25, 0) INTA PIRQC + PCI_BDF(0, 25, 0) INTB PIRQD + PCI_BDF(0, 25, 0) INTC PIRQA + PCI_BDF(0, 25, 0) INTD PIRQB + PCI_BDF(0, 26, 0) INTA PIRQD + PCI_BDF(0, 26, 0) INTB PIRQA + PCI_BDF(0, 26, 0) INTC PIRQB + PCI_BDF(0, 26, 0) INTD PIRQC + PCI_BDF(0, 27, 0) INTA PIRQG + /* + * Topcliff PCI devices + * + * Note on the Crown Bay board, Topcliff + * chipset is connected to TunnelCreek + * PCIe port 0, so its bus number is 1 + * for its PCIe port and 2 for its PCI + * devices per U-Boot current PCI bus + * enumeration algorithm. + */ + PCI_BDF(1, 0, 0) INTA PIRQA + PCI_BDF(2, 0, 1) INTA PIRQA + PCI_BDF(2, 0, 2) INTA PIRQA + PCI_BDF(2, 2, 0) INTB PIRQD + PCI_BDF(2, 2, 1) INTB PIRQD + PCI_BDF(2, 2, 2) INTB PIRQD + PCI_BDF(2, 2, 3) INTB PIRQD + PCI_BDF(2, 2, 4) INTB PIRQD + PCI_BDF(2, 4, 0) INTC PIRQC + PCI_BDF(2, 4, 1) INTC PIRQC + PCI_BDF(2, 6, 0) INTD PIRQB + PCI_BDF(2, 8, 0) INTA PIRQA + PCI_BDF(2, 8, 1) INTA PIRQA + PCI_BDF(2, 8, 2) INTA PIRQA + PCI_BDF(2, 8, 3) INTA PIRQA + PCI_BDF(2, 10, 0) INTB PIRQD + PCI_BDF(2, 10, 1) INTB PIRQD + PCI_BDF(2, 10, 2) INTB PIRQD + PCI_BDF(2, 10, 3) INTB PIRQD + PCI_BDF(2, 10, 4) INTB PIRQD + PCI_BDF(2, 12, 0) INTC PIRQC + PCI_BDF(2, 12, 1) INTC PIRQC + PCI_BDF(2, 12, 2) INTC PIRQC + PCI_BDF(2, 12, 3) INTC PIRQC + PCI_BDF(2, 12, 4) INTC PIRQC + >; + }; + + spi { + #address-cells = <1>; + #size-cells = <0>; + compatible = "intel,ich-spi"; + spi-flash@0 { + reg = <0>; + compatible = "sst,25vf016b", + "spi-flash"; + memory-map = <0xffe00000 0x00200000>; + }; + }; }; }; |