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-rw-r--r--arch/arm/dts/Makefile3
-rw-r--r--arch/arm/dts/rk3036-sdk.dts46
-rw-r--r--arch/arm/mach-rockchip/rk3036/Kconfig14
3 files changed, 62 insertions, 1 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 76d1faf..23e7b40 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -21,7 +21,8 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
exynos5422-odroidxu3.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-firefly.dtb \
- rk3288-jerry.dtb
+ rk3288-jerry.dtb \
+ rk3036-sdk.dtb
dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/dts/rk3036-sdk.dts b/arch/arm/dts/rk3036-sdk.dts
new file mode 100644
index 0000000..a83badb
--- /dev/null
+++ b/arch/arm/dts/rk3036-sdk.dts
@@ -0,0 +1,46 @@
+/*
+ * (C) Copyright 2015 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "rk3036.dtsi"
+
+/ {
+ model = "SDK-RK3036";
+ compatible = "sdk,sdk-rk3036", "rockchip,rk3036";
+
+ chosen {
+ stdout-path = &uart2;
+ };
+
+ usb_control {
+ compatible = "rockchip,rk3036-usb-control";
+ host_drv_gpio = <&gpio2 23 GPIO_ACTIVE_LOW>;
+ otg_drv_gpio = <&gpio0 26 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&i2c1 {
+ status = "okay";
+
+ hym8563: hym8563@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "xin32k";
+ };
+};
+
+&usb_host {
+ status = "okay";
+};
+
+&usb_otg {
+ status = "okay";
+
+ dr_mode = "host";
+};
diff --git a/arch/arm/mach-rockchip/rk3036/Kconfig b/arch/arm/mach-rockchip/rk3036/Kconfig
index d76d5e1..0fbc58e 100644
--- a/arch/arm/mach-rockchip/rk3036/Kconfig
+++ b/arch/arm/mach-rockchip/rk3036/Kconfig
@@ -1,3 +1,17 @@
if ROCKCHIP_RK3036
+config TARGET_EVB_RK3036
+ bool "EVB_RK3036"
+
+config SYS_SOC
+ default "rockchip"
+
+config SYS_MALLOC_F_LEN
+ default 0x400
+
+config ROCKCHIP_COMMON
+ bool "Support rk common fuction"
+
+source "board/evb_rk3036/evb_rk3036/Kconfig"
+
endif