diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/sunxi/board.c | 29 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/sunxi/rsb.c | 8 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/sunxi/usbc.c | 77 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 7 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-sunxi/gpio.h | 104 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-sunxi/i2c.h | 17 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-sunxi/usbc.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-kirkwood/include/mach/config.h | 2 |
8 files changed, 154 insertions, 91 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index c02c015..c1b4cf5 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -46,28 +46,33 @@ static int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUNXI_GPIO_INPUT); sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUNXI_GPIO_INPUT); #endif - sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUNXI_GPF2_UART0_TX); - sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUNXI_GPF4_UART0_RX); +#if defined(CONFIG_MACH_SUN8I) + sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUN8I_GPF_UART0_TX); + sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUN8I_GPF_UART0_RX); +#else + sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUNXI_GPF_UART0_TX); + sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUNXI_GPF_UART0_RX); +#endif sunxi_gpio_set_pull(SUNXI_GPF(4), 1); #elif CONFIG_CONS_INDEX == 1 && (defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I)) - sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUN4I_GPB22_UART0_TX); - sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUN4I_GPB23_UART0_RX); + sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUN4I_GPB_UART0); + sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUN4I_GPB_UART0); sunxi_gpio_set_pull(SUNXI_GPB(23), SUNXI_GPIO_PULL_UP); #elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN5I) - sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN5I_GPB19_UART0_TX); - sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN5I_GPB20_UART0_RX); + sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN5I_GPB_UART0); + sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN5I_GPB_UART0); sunxi_gpio_set_pull(SUNXI_GPB(20), SUNXI_GPIO_PULL_UP); #elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN6I) - sunxi_gpio_set_cfgpin(SUNXI_GPH(20), SUN6I_GPH20_UART0_TX); - sunxi_gpio_set_cfgpin(SUNXI_GPH(21), SUN6I_GPH21_UART0_RX); + sunxi_gpio_set_cfgpin(SUNXI_GPH(20), SUN6I_GPH_UART0); + sunxi_gpio_set_cfgpin(SUNXI_GPH(21), SUN6I_GPH_UART0); sunxi_gpio_set_pull(SUNXI_GPH(21), SUNXI_GPIO_PULL_UP); #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) - sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG3_UART1_TX); - sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG4_UART1_RX); + sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1); + sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1); sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP); #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) - sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL2_R_UART_TX); - sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL3_R_UART_RX); + sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART); + sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART); sunxi_gpio_set_pull(SUNXI_GPL(3), SUNXI_GPIO_PULL_UP); #else #error Unsupported console port number. Please fix pin mux settings in board.c diff --git a/arch/arm/cpu/armv7/sunxi/rsb.c b/arch/arm/cpu/armv7/sunxi/rsb.c index b00befb..f115a9c 100644 --- a/arch/arm/cpu/armv7/sunxi/rsb.c +++ b/arch/arm/cpu/armv7/sunxi/rsb.c @@ -21,15 +21,15 @@ static int rsb_set_device_mode(void); static void rsb_cfg_io(void) { #ifdef CONFIG_MACH_SUN8I - sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL0_R_RSB_SCK); - sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL1_R_RSB_SDA); + sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL_R_RSB); + sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL_R_RSB); sunxi_gpio_set_pull(SUNXI_GPL(0), 1); sunxi_gpio_set_pull(SUNXI_GPL(1), 1); sunxi_gpio_set_drv(SUNXI_GPL(0), 2); sunxi_gpio_set_drv(SUNXI_GPL(1), 2); #elif defined CONFIG_MACH_SUN9I - sunxi_gpio_set_cfgpin(SUNXI_GPN(0), SUN9I_GPN0_R_RSB_SCK); - sunxi_gpio_set_cfgpin(SUNXI_GPN(1), SUN9I_GPN1_R_RSB_SDA); + sunxi_gpio_set_cfgpin(SUNXI_GPN(0), SUN9I_GPN_R_RSB); + sunxi_gpio_set_cfgpin(SUNXI_GPN(1), SUN9I_GPN_R_RSB); sunxi_gpio_set_pull(SUNXI_GPN(0), 1); sunxi_gpio_set_pull(SUNXI_GPN(1), 1); sunxi_gpio_set_drv(SUNXI_GPN(0), 2); diff --git a/arch/arm/cpu/armv7/sunxi/usbc.c b/arch/arm/cpu/armv7/sunxi/usbc.c index 524f25c..a0e9604 100644 --- a/arch/arm/cpu/armv7/sunxi/usbc.c +++ b/arch/arm/cpu/armv7/sunxi/usbc.c @@ -41,6 +41,7 @@ static struct sunxi_usbc_hcd { int usb_rst_mask; int ahb_clk_mask; int gpio_vbus; + int gpio_vbus_det; int irq; int id; } sunxi_usbc_hcd[] = { @@ -80,12 +81,6 @@ static struct sunxi_usbc_hcd { static int enabled_hcd_count; -static bool use_axp_drivebus(int index) -{ - return index == 0 && - strcmp(CONFIG_USB0_VBUS_PIN, "axp_drivebus") == 0; -} - void *sunxi_usbc_get_io_base(int index) { switch (index) { @@ -102,9 +97,6 @@ void *sunxi_usbc_get_io_base(int index) static int get_vbus_gpio(int index) { - if (use_axp_drivebus(index)) - return -1; - switch (index) { case 0: return sunxi_name_to_gpio(CONFIG_USB0_VBUS_PIN); case 1: return sunxi_name_to_gpio(CONFIG_USB1_VBUS_PIN); @@ -113,6 +105,14 @@ static int get_vbus_gpio(int index) return -1; } +static int get_vbus_detect_gpio(int index) +{ + switch (index) { + case 0: return sunxi_name_to_gpio(CONFIG_USB0_VBUS_DET); + } + return -1; +} + static void usb_phy_write(struct sunxi_usbc_hcd *sunxi_usbc, int addr, int data, int len) { @@ -192,22 +192,35 @@ void sunxi_usbc_enable_squelch_detect(int index, int enable) int sunxi_usbc_request_resources(int index) { struct sunxi_usbc_hcd *sunxi_usbc = &sunxi_usbc_hcd[index]; + int ret = 0; sunxi_usbc->gpio_vbus = get_vbus_gpio(index); - if (sunxi_usbc->gpio_vbus != -1) - return gpio_request(sunxi_usbc->gpio_vbus, "usbc_vbus"); + if (sunxi_usbc->gpio_vbus != -1) { + ret |= gpio_request(sunxi_usbc->gpio_vbus, "usbc_vbus"); + ret |= gpio_direction_output(sunxi_usbc->gpio_vbus, 0); + } + + sunxi_usbc->gpio_vbus_det = get_vbus_detect_gpio(index); + if (sunxi_usbc->gpio_vbus_det != -1) { + ret |= gpio_request(sunxi_usbc->gpio_vbus_det, "usbc_vbus_det"); + ret |= gpio_direction_input(sunxi_usbc->gpio_vbus_det); + } - return 0; + return ret; } int sunxi_usbc_free_resources(int index) { struct sunxi_usbc_hcd *sunxi_usbc = &sunxi_usbc_hcd[index]; + int ret = 0; if (sunxi_usbc->gpio_vbus != -1) - return gpio_free(sunxi_usbc->gpio_vbus); + ret |= gpio_free(sunxi_usbc->gpio_vbus); - return 0; + if (sunxi_usbc->gpio_vbus_det != -1) + ret |= gpio_free(sunxi_usbc->gpio_vbus_det); + + return ret; } void sunxi_usbc_enable(int index) @@ -258,22 +271,38 @@ void sunxi_usbc_vbus_enable(int index) { struct sunxi_usbc_hcd *sunxi_usbc = &sunxi_usbc_hcd[index]; -#ifdef AXP_DRIVEBUS - if (use_axp_drivebus(index)) - axp_drivebus_enable(); -#endif if (sunxi_usbc->gpio_vbus != -1) - gpio_direction_output(sunxi_usbc->gpio_vbus, 1); + gpio_set_value(sunxi_usbc->gpio_vbus, 1); } void sunxi_usbc_vbus_disable(int index) { struct sunxi_usbc_hcd *sunxi_usbc = &sunxi_usbc_hcd[index]; -#ifdef AXP_DRIVEBUS - if (use_axp_drivebus(index)) - axp_drivebus_disable(); -#endif if (sunxi_usbc->gpio_vbus != -1) - gpio_direction_output(sunxi_usbc->gpio_vbus, 0); + gpio_set_value(sunxi_usbc->gpio_vbus, 0); +} + +int sunxi_usbc_vbus_detect(int index) +{ + struct sunxi_usbc_hcd *sunxi_usbc = &sunxi_usbc_hcd[index]; + int err, retries = 3; + + if (sunxi_usbc->gpio_vbus_det == -1) { + eprintf("Error: invalid vbus detection pin\n"); + return -1; + } + + err = gpio_get_value(sunxi_usbc->gpio_vbus_det); + /* + * Vbus may have been provided by the board and just been turned of + * some milliseconds ago on reset, what we're measuring then is a + * residual charge on Vbus, sleep a bit and try again. + */ + while (err > 0 && retries--) { + mdelay(100); + err = gpio_get_value(sunxi_usbc->gpio_vbus_det); + } + + return err; } diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h index dae6069..f403742 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h @@ -94,6 +94,13 @@ #define SUNXI_TWI0_BASE 0x01c2ac00 #define SUNXI_TWI1_BASE 0x01c2b000 #define SUNXI_TWI2_BASE 0x01c2b400 +#ifdef CONFIG_MACH_SUN6I +#define SUNXI_TWI3_BASE 0x01c0b800 +#endif +#ifdef CONFIG_MACH_SUN7I +#define SUNXI_TWI3_BASE 0x01c2b800 +#define SUNXI_TWI4_BASE 0x01c2c000 +#endif #define SUNXI_CAN_BASE 0x01c2bc00 diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index f2c247d..ae7cbb7 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -84,7 +84,7 @@ struct sunxi_gpio_reg { #define GPIO_CFG_INDEX(pin) (((pin) & 0x1f) >> 3) #define GPIO_CFG_OFFSET(pin) ((((pin) & 0x1f) & 0x7) << 2) -#define GPIO_DRV_INDEX(pin) (((pin) & 0x1f) >> 4) +#define GPIO_DRV_INDEX(pin) (((pin) & 0x1f) >> 4) #define GPIO_DRV_OFFSET(pin) ((((pin) & 0x1f) & 0xf) << 1) #define GPIO_PULL_INDEX(pin) (((pin) & 0x1f) >> 4) @@ -142,71 +142,77 @@ enum sunxi_gpio_number { #define SUNXI_GPIO_INPUT 0 #define SUNXI_GPIO_OUTPUT 1 -#define SUNXI_GPA0_EMAC 2 -#define SUN6I_GPA0_GMAC 2 -#define SUN7I_GPA0_GMAC 5 - -#define SUNXI_GPB0_TWI0 2 - -#define SUN4I_GPB22_UART0_TX 2 -#define SUN4I_GPB23_UART0_RX 2 - -#define SUN5I_GPB19_UART0_TX 2 -#define SUN5I_GPB20_UART0_RX 2 - -#define SUNXI_GPC6_SDC2 3 - -#define SUNXI_GPD0_LCD0 2 -#define SUNXI_GPD0_LVDS0 3 - -#define SUNXI_GPF0_SDC0 2 - -#define SUNXI_GPF2_SDC0 2 - -#ifdef CONFIG_MACH_SUN8I -#define SUNXI_GPF2_UART0_TX 3 -#define SUNXI_GPF4_UART0_RX 3 -#else -#define SUNXI_GPF2_UART0_TX 4 -#define SUNXI_GPF4_UART0_RX 4 -#endif - -#define SUN4I_GPG0_SDC1 4 - -#define SUN5I_GPG3_SDC1 2 - -#define SUN5I_GPG3_UART1_TX 4 -#define SUN5I_GPG4_UART1_RX 4 - -#define SUN4I_GPH22_SDC1 5 - -#define SUN6I_GPH20_UART0_TX 2 -#define SUN6I_GPH21_UART0_RX 2 - -#define SUN4I_GPI4_SDC3 2 +#define SUNXI_GPA_EMAC 2 +#define SUN6I_GPA_GMAC 2 +#define SUN7I_GPA_GMAC 5 +#define SUN6I_GPA_SDC2 5 +#define SUN6I_GPA_SDC3 4 + +#define SUN4I_GPB_TWI0 2 +#define SUN4I_GPB_TWI1 2 +#define SUN5I_GPB_TWI1 2 +#define SUN4I_GPB_TWI2 2 +#define SUN5I_GPB_TWI2 2 +#define SUN4I_GPB_UART0 2 +#define SUN5I_GPB_UART0 2 + +#define SUNXI_GPC_SDC2 3 +#define SUN6I_GPC_SDC3 4 + +#define SUN8I_GPD_SDC1 3 +#define SUNXI_GPD_LCD0 2 +#define SUNXI_GPD_LVDS0 3 + +#define SUN5I_GPE_SDC2 3 +#define SUN8I_GPE_TWI2 3 + +#define SUNXI_GPF_SDC0 2 +#define SUNXI_GPF_UART0 4 +#define SUN8I_GPF_UART0 3 + +#define SUN4I_GPG_SDC1 4 +#define SUN5I_GPG_SDC1 2 +#define SUN6I_GPG_SDC1 2 +#define SUN8I_GPG_SDC1 2 +#define SUN6I_GPG_TWI3 2 +#define SUN5I_GPG_UART1 4 + +#define SUN4I_GPH_SDC1 5 +#define SUN6I_GPH_TWI0 2 +#define SUN8I_GPH_TWI0 2 +#define SUN6I_GPH_TWI1 2 +#define SUN8I_GPH_TWI1 2 +#define SUN6I_GPH_TWI2 2 +#define SUN6I_GPH_UART0 2 + +#define SUNXI_GPI_SDC3 2 +#define SUN7I_GPI_TWI3 3 +#define SUN7I_GPI_TWI4 3 #define SUN6I_GPL0_R_P2WI_SCK 3 #define SUN6I_GPL1_R_P2WI_SDA 3 -#define SUN8I_GPL0_R_RSB_SCK 2 -#define SUN8I_GPL1_R_RSB_SDA 2 -#define SUN8I_GPL2_R_UART_TX 2 -#define SUN8I_GPL3_R_UART_RX 2 +#define SUN8I_GPL_R_RSB 2 +#define SUN8I_GPL_R_UART 2 -#define SUN9I_GPN0_R_RSB_SCK 3 -#define SUN9I_GPN1_R_RSB_SDA 3 +#define SUN9I_GPN_R_RSB 3 /* GPIO pin pull-up/down config */ #define SUNXI_GPIO_PULL_DISABLE 0 #define SUNXI_GPIO_PULL_UP 1 #define SUNXI_GPIO_PULL_DOWN 2 +/* Virtual AXP0 GPIOs */ +#define SUNXI_GPIO_AXP0_VBUS_DETECT 8 +#define SUNXI_GPIO_AXP0_VBUS_ENABLE 9 + void sunxi_gpio_set_cfgbank(struct sunxi_gpio *pio, int bank_offset, u32 val); void sunxi_gpio_set_cfgpin(u32 pin, u32 val); int sunxi_gpio_get_cfgbank(struct sunxi_gpio *pio, int bank_offset); int sunxi_gpio_get_cfgpin(u32 pin); int sunxi_gpio_set_drv(u32 pin, u32 val); int sunxi_gpio_set_pull(u32 pin, u32 val); +int sunxi_name_to_gpio_bank(const char *name); int sunxi_name_to_gpio(const char *name); #define name_to_gpio(name) sunxi_name_to_gpio(name) diff --git a/arch/arm/include/asm/arch-sunxi/i2c.h b/arch/arm/include/asm/arch-sunxi/i2c.h index dc5406b..561cd2b 100644 --- a/arch/arm/include/asm/arch-sunxi/i2c.h +++ b/arch/arm/include/asm/arch-sunxi/i2c.h @@ -8,7 +8,22 @@ #include <asm/arch/cpu.h> -#define CONFIG_I2C_MVTWSI_BASE SUNXI_TWI0_BASE +#ifdef CONFIG_I2C0_ENABLE +#define CONFIG_I2C_MVTWSI_BASE0 SUNXI_TWI0_BASE +#endif +#ifdef CONFIG_I2C1_ENABLE +#define CONFIG_I2C_MVTWSI_BASE1 SUNXI_TWI1_BASE +#endif +#ifdef CONFIG_I2C2_ENABLE +#define CONFIG_I2C_MVTWSI_BASE2 SUNXI_TWI2_BASE +#endif +#ifdef CONFIG_I2C3_ENABLE +#define CONFIG_I2C_MVTWSI_BASE3 SUNXI_TWI3_BASE +#endif +#ifdef CONFIG_I2C4_ENABLE +#define CONFIG_I2C_MVTWSI_BASE4 SUNXI_TWI4_BASE +#endif + /* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */ #define CONFIG_SYS_TCLK 24000000 diff --git a/arch/arm/include/asm/arch-sunxi/usbc.h b/arch/arm/include/asm/arch-sunxi/usbc.h index 1330733..ab0f272 100644 --- a/arch/arm/include/asm/arch-sunxi/usbc.h +++ b/arch/arm/include/asm/arch-sunxi/usbc.h @@ -20,4 +20,5 @@ void sunxi_usbc_enable(int index); void sunxi_usbc_disable(int index); void sunxi_usbc_vbus_enable(int index); void sunxi_usbc_vbus_disable(int index); +int sunxi_usbc_vbus_detect(int index); void sunxi_usbc_enable_squelch_detect(int index, int enable); diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h index e77ac40..d049395 100644 --- a/arch/arm/mach-kirkwood/include/mach/config.h +++ b/arch/arm/mach-kirkwood/include/mach/config.h @@ -44,7 +44,7 @@ #define CONFIG_SYS_INIT_SP_ADDR 0xC8012000 #define CONFIG_NR_DRAM_BANKS_MAX 2 -#define CONFIG_I2C_MVTWSI_BASE KW_TWSI_BASE +#define CONFIG_I2C_MVTWSI_BASE0 KW_TWSI_BASE #define MV_UART_CONSOLE_BASE KW_UART0_BASE #define MV_SATA_BASE KW_SATA_BASE #define MV_SATA_PORT0_OFFSET KW_SATA_PORT0_OFFSET |