diff options
Diffstat (limited to 'board/amcc')
-rw-r--r-- | board/amcc/acadia/memory.c | 8 | ||||
-rw-r--r-- | board/amcc/bamboo/bamboo.c | 8 | ||||
-rw-r--r-- | board/amcc/bubinga/bubinga.c | 8 | ||||
-rw-r--r-- | board/amcc/sequoia/sdram.c | 8 | ||||
-rw-r--r-- | board/amcc/walnut/walnut.c | 8 | ||||
-rw-r--r-- | board/amcc/yosemite/yosemite.c | 7 |
6 files changed, 35 insertions, 12 deletions
diff --git a/board/amcc/acadia/memory.c b/board/amcc/acadia/memory.c index 841bcfa..cd78a14 100644 --- a/board/amcc/acadia/memory.c +++ b/board/amcc/acadia/memory.c @@ -15,6 +15,8 @@ #include <asm/io.h> #include <asm/ppc4xx-gpio.h> +DECLARE_GLOBAL_DATA_PTR; + extern void board_pll_init_f(void); static void cram_bcr_write(u32 wr_val) @@ -41,7 +43,7 @@ static void cram_bcr_write(u32 wr_val) return; } -phys_size_t initdram(void) +int initdram(void) { int i; u32 val; @@ -77,5 +79,7 @@ phys_size_t initdram(void) for (i=0; i<200000; i++) ; - return (CONFIG_SYS_MBYTES_RAM << 20); + gd->ram_size = CONFIG_SYS_MBYTES_RAM << 20; + + return 0; } diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c index ae69f5a..453677a 100644 --- a/board/amcc/bamboo/bamboo.c +++ b/board/amcc/bamboo/bamboo.c @@ -12,6 +12,8 @@ #include <asm/ppc440.h> #include "bamboo.h" +DECLARE_GLOBAL_DATA_PTR; + void ext_bus_cntlr_init(void); void configure_ppc440ep_pins(void); int is_nand_selected(void); @@ -436,9 +438,11 @@ int checkboard(void) } -phys_size_t initdram(void) +int initdram(void) { - return spd_sdram(); + gd->ram_size = spd_sdram(); + + return 0; } /*----------------------------------------------------------------------------+ diff --git a/board/amcc/bubinga/bubinga.c b/board/amcc/bubinga/bubinga.c index e356717..725b9ca 100644 --- a/board/amcc/bubinga/bubinga.c +++ b/board/amcc/bubinga/bubinga.c @@ -9,6 +9,8 @@ #include <asm/processor.h> #include <asm/io.h> +DECLARE_GLOBAL_DATA_PTR; + long int spd_sdram(void); int board_early_init_f(void) @@ -55,7 +57,9 @@ int checkboard(void) initdram() reads EEPROM via I2c. EEPROM contains all of the necessary info for SDRAM controller configuration ------------------------------------------------------------------------- */ -phys_size_t initdram(void) +int initdram(void) { - return spd_sdram(); + gd->ram_size = spd_sdram(); + + return 0; } diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c index bb5c5ee..9bedb5b 100644 --- a/board/amcc/sequoia/sdram.c +++ b/board/amcc/sequoia/sdram.c @@ -20,6 +20,8 @@ #include <asm/io.h> #include <asm/ppc440.h> +DECLARE_GLOBAL_DATA_PTR; + /*-----------------------------------------------------------------------------+ * Prototypes *-----------------------------------------------------------------------------*/ @@ -31,7 +33,7 @@ extern void denali_core_search_data_eye(void); * initdram -- 440EPx's DDR controller is a DENALI Core * ************************************************************************/ -phys_size_t initdram(void) +int initdram(void) { #if !defined(CONFIG_SYS_RAMBOOT) ulong speed = get_bus_freq(0); @@ -88,5 +90,7 @@ phys_size_t initdram(void) */ set_mcsr(get_mcsr()); - return (CONFIG_SYS_MBYTES_SDRAM << 20); + gd->ram_size = CONFIG_SYS_MBYTES_SDRAM << 20; + + return 0; } diff --git a/board/amcc/walnut/walnut.c b/board/amcc/walnut/walnut.c index ca933d7..2a2441e 100644 --- a/board/amcc/walnut/walnut.c +++ b/board/amcc/walnut/walnut.c @@ -9,6 +9,8 @@ #include <asm/processor.h> #include <spd_sdram.h> +DECLARE_GLOBAL_DATA_PTR; + int board_early_init_f(void) { /*-------------------------------------------------------------------------+ @@ -74,7 +76,9 @@ int checkboard(void) * initdram() reads EEPROM via I2c. EEPROM contains all of * the necessary info for SDRAM controller configuration */ -phys_size_t initdram(void) +int initdram(void) { - return spd_sdram(); + gd->ram_size = spd_sdram(); + + return 0; } diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c index f61978c..fde371d 100644 --- a/board/amcc/yosemite/yosemite.c +++ b/board/amcc/yosemite/yosemite.c @@ -286,7 +286,7 @@ void sdram_tr1_set(int ram_address, int* tr1_value) *tr1_value = (first_good + last_bad) / 2; } -phys_size_t initdram(void) +int initdram(void) { register uint reg; int tr1_bank1, tr1_bank2; @@ -334,7 +334,10 @@ phys_size_t initdram(void) sdram_tr1_set(0x08000000, &tr1_bank2); mtsdram(SDRAM0_TR1, (((tr1_bank1+tr1_bank2)/2) | 0x80800800)); - return CONFIG_SYS_SDRAM_BANKS * (CONFIG_SYS_KBYTES_SDRAM * 1024); /* return bytes */ + gd->ram_size = CONFIG_SYS_SDRAM_BANKS * + (CONFIG_SYS_KBYTES_SDRAM * 1024); /* set bytes */ + + return 0; } /************************************************************************* |