1 files changed, 0 insertions, 60 deletions
diff --git a/board/atum8548/init.S b/board/atum8548/init.S
index 654a569..7e161c1 100644
--- a/board/atum8548/init.S
+++ b/board/atum8548/init.S
@@ -30,11 +30,6 @@
 #include <config.h>
 #include <mpc85xx.h>
 
-#define LAWAR_TRGT_PCI1		0x00000000
-#define LAWAR_TRGT_PCI2		0x00100000
-#define LAWAR_TRGT_PCIE		0x00200000
-#define LAWAR_TRGT_DDR		0x00f00000
-
 /*
  * TLB0 and TLB1 Entries
  *
@@ -178,58 +173,3 @@ tlb1_entry:
 
 2:
 	entry_end
-
-/*
- * LAW(Local Access Window) configuration:
- *
- * 0x0000_0000	   0x7fff_ffff	   DDR			   2G
- * 0x8000_0000	   0x9fff_ffff	   PCI1 MEM		   512M
- * 0xa000_0000	   0xbfff_ffff	   PCIe MEM		   512M
- * 0xc000_0000	   0xdfff_ffff	   PCI2 MEM		   512M
- * 0xe000_0000	   0xe000_ffff	   CCSR			   1M
- * 0xe200_0000	   0xe10f_ffff	   PCI1 IO		   1M
- * 0xe280_0000	   0xe20f_ffff	   PCI2 IO		   1M
- * 0xe300_0000	   0xe30f_ffff	   PCIe IO		   1M
- * 0xf800_0000	   0xffff_ffff	   FLASH (boot bank)	   128M
- *
- * Notes:
- *    CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
- *    If flash is 8M at default position (last 8M), no LAW needed.
- *
- * LAW 0 is reserved for boot mapping
- */
-
-	.section .bootpg, "ax"
-	.globl	law_entry
-law_entry:
-	entry_start
-
-	.long (4f-3f)/8
-3:
-	.long  0
-	.long  (LAWAR_TRGT_DDR | (LAWAR_SIZE & LAWAR_SIZE_1G)) & ~LAWAR_EN
-
-	.long	(CFG_PCI1_MEM_PHYS>>12) & 0xfffff
-	.long	LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M)
-
-	.long	(CFG_PCI1_IO_PHYS>>12) & 0xfffff
-	.long	LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_1M)
-
-	.long	(CFG_PCI2_MEM_PHYS>>12) & 0xfffff
-	.long	LAWAR_EN | LAWAR_TRGT_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M)
-
-	.long	(CFG_PCI2_IO_PHYS>>12) & 0xfffff
-	.long	LAWAR_EN | LAWAR_TRGT_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_1M)
-
-	.long	(CFG_PCIE1_MEM_PHYS>>12) & 0xfffff
-	.long	LAWAR_EN | LAWAR_TRGT_PCIE | (LAWAR_SIZE & LAWAR_SIZE_512M)
-
-	.long	(CFG_PCIE1_IO_PHYS>>12) & 0xfffff
-	.long	LAWAR_EN | LAWAR_TRGT_PCIE | (LAWAR_SIZE & LAWAR_SIZE_1M)
-
-	/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */
-	.long	(CFG_LBC_CACHE_BASE>>12) & 0xfffff
-	.long	LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M)
-
-4:
-	entry_end