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Diffstat (limited to 'board/bf518f-ezbrd')
-rw-r--r--board/bf518f-ezbrd/bf518f-ezbrd.c41
1 files changed, 19 insertions, 22 deletions
diff --git a/board/bf518f-ezbrd/bf518f-ezbrd.c b/board/bf518f-ezbrd/bf518f-ezbrd.c
index 85b350f..ff1ac4c 100644
--- a/board/bf518f-ezbrd/bf518f-ezbrd.c
+++ b/board/bf518f-ezbrd/bf518f-ezbrd.c
@@ -14,6 +14,7 @@
#include <spi.h>
#include <asm/blackfin.h>
#include <asm/net.h>
+#include <asm/portmux.h>
#include <asm/mach-common/bits/otp.h>
#include <asm/sdh.h>
@@ -61,6 +62,7 @@ static void board_init_enetaddr(uchar *mac_addr)
#define KSZ_WRITE 0x02
#define KSZ_READ 0x03
+#define KSZ_REG_CHID 0x00 /* Register 0: Chip ID0 */
#define KSZ_REG_STPID 0x01 /* Register 1: Chip ID1 / Start Switch */
#define KSZ_REG_GC9 0x0b /* Register 11: Global Control 9 */
#define KSZ_REG_P3C0 0x30 /* Register 48: Port 3 Control 0 */
@@ -78,15 +80,17 @@ static int ksz8893m_reg_set(struct spi_slave *slave, uchar reg, uchar data)
return ksz8893m_transfer(slave, KSZ_WRITE, reg, data, din);
}
-static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask)
+static int ksz8893m_reg_read(struct spi_slave *slave, uchar reg)
{
- int ret = 0;
+ int ret;
unsigned char din[3];
+ ret = ksz8893m_transfer(slave, KSZ_READ, reg, 0, din);
+ return ret ? ret : din[2];
+}
- ret |= ksz8893m_transfer(slave, KSZ_READ, reg, 0, din);
- ret |= ksz8893m_reg_set(slave, reg, din[2] & mask);
-
- return ret;
+static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask)
+{
+ return ksz8893m_reg_set(slave, reg, ksz8893m_reg_read(slave, reg) & mask);
}
static int ksz8893m_reset(struct spi_slave *slave)
@@ -107,16 +111,16 @@ static int ksz8893m_reset(struct spi_slave *slave)
int board_eth_init(bd_t *bis)
{
- static bool switch_is_alive = false;
+ static bool switch_is_alive = false, phy_is_ksz = true;
int ret;
if (!switch_is_alive) {
struct spi_slave *slave = spi_setup_slave(0, 1, KSZ_MAX_HZ, SPI_MODE_3);
if (slave) {
if (!spi_claim_bus(slave)) {
- ret = ksz8893m_reset(slave);
- if (!ret)
- switch_is_alive = true;
+ phy_is_ksz = (ksz8893m_reg_read(slave, KSZ_REG_CHID) == 0x88);
+ ret = phy_is_ksz ? ksz8893m_reset(slave) : 0;
+ switch_is_alive = (ret == 0);
spi_release_bus(slave);
}
spi_free_slave(slave);
@@ -143,18 +147,11 @@ int misc_init_r(void)
int board_early_init_f(void)
{
-#if !defined(CONFIG_SYS_NO_FLASH)
- /* setup BF518-EZBRD GPIO pin PG11 to AMS2. */
- bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_6_MASK) | PORT_x_MUX_6_FUNC_2);
- bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG11);
-
-# if !defined(CONFIG_BFIN_SPI)
- /* setup BF518-EZBRD GPIO pin PG15 to AMS3. */
- bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_7_MASK) | PORT_x_MUX_7_FUNC_3);
- bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG15);
-# endif
-#endif
- return 0;
+ /* connect async banks by default */
+ const unsigned short pins[] = {
+ P_AMS2, P_AMS3, 0,
+ };
+ return peripheral_request_list(pins, "async");
}
#ifdef CONFIG_BFIN_SDH