summaryrefslogtreecommitdiff
path: root/board/cogent/README
diff options
context:
space:
mode:
Diffstat (limited to 'board/cogent/README')
-rw-r--r--board/cogent/README8
1 files changed, 4 insertions, 4 deletions
diff --git a/board/cogent/README b/board/cogent/README
index e6eef66..31ca187 100644
--- a/board/cogent/README
+++ b/board/cogent/README
@@ -80,16 +80,16 @@ To configure, perform the usual U-Boot configuration task of editing
"include/config_cogent_mpc8xx.h" and reviewing all the options and
settings in there. In particular, check the chip select values
installed into the memory controller's various option and base
-registers - these are set by the defines CFG_CMA_CSn_{BASE,SIZE} and
-CFG_{B,O}Rn_PRELIM. Also be careful of the clock settings installed
-into the SCCR - via the define CFG_SCCR. Finally, decide whether you
+registers - these are set by the defines CONFIG_SYS_CMA_CSn_{BASE,SIZE} and
+CONFIG_SYS_{B,O}Rn_PRELIM. Also be careful of the clock settings installed
+into the SCCR - via the define CONFIG_SYS_SCCR. Finally, decide whether you
want the serial console on motherboard serial port A or on one of the
8xx SMC ports, and set CONFIG_8xx_CONS_{SMC1,SMC2,NONE} accordingly
(NONE means use Cogent motherboard serial port A).
Then edit the file "cogent/config.mk". Firstly, set TEXT_BASE to be
the base address of the EPROM for the CPU module. This should be the
-same as the value selected for CFG_MONITOR_BASE in
+same as the value selected for CONFIG_SYS_MONITOR_BASE in
"include/config_cogent_*.h" (in fact, I have made this automatic via
the -DTEXT_BASE=... option in CPPFLAGS).