diff options
Diffstat (limited to 'board/esd/cpci405')
| -rw-r--r-- | board/esd/cpci405/cpci405.c | 46 | ||||
| -rw-r--r-- | board/esd/cpci405/flash.c | 2 |
2 files changed, 24 insertions, 24 deletions
diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c index fb34957..c5ccb34 100644 --- a/board/esd/cpci405/cpci405.c +++ b/board/esd/cpci405/cpci405.c @@ -110,8 +110,8 @@ int board_early_init_f (void) * First pull fpga-prg pin low, to disable fpga logic (on version 2 board) */ out32(GPIO0_ODR, 0x00000000); /* no open drain pins */ - out32(GPIO0_TCR, CFG_FPGA_PRG); /* setup for output */ - out32(GPIO0_OR, CFG_FPGA_PRG); /* set output pins to high */ + out32(GPIO0_TCR, CONFIG_SYS_FPGA_PRG); /* setup for output */ + out32(GPIO0_OR, CONFIG_SYS_FPGA_PRG); /* set output pins to high */ out32(GPIO0_OR, 0); /* pull prg low */ /* @@ -282,8 +282,8 @@ int misc_init_r (void) cntrl0Reg = mfdcr(cntrl0); mtdcr(cntrl0, cntrl0Reg | 0x00300000); - dst = malloc(CFG_FPGA_MAX_SIZE); - if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) { + dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE); + if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) { printf ("GUNZIP ERROR - must RESET board to recover\n"); do_reset (NULL, 0, 0, NULL); } @@ -347,13 +347,13 @@ int misc_init_r (void) #ifdef CONFIG_CPCI405_6U if (cpci405_version() == 3) { - volatile unsigned short *fpga_mode = (unsigned short *)CFG_FPGA_BASE_ADDR; - volatile unsigned char *leds = (unsigned char *)CFG_LED_ADDR; + volatile unsigned short *fpga_mode = (unsigned short *)CONFIG_SYS_FPGA_BASE_ADDR; + volatile unsigned char *leds = (unsigned char *)CONFIG_SYS_LED_ADDR; /* * Enable outputs in fpga on version 3 board */ - *fpga_mode |= CFG_FPGA_MODE_ENABLE_OUTPUT; + *fpga_mode |= CONFIG_SYS_FPGA_MODE_ENABLE_OUTPUT; /* * Set outputs to 0 @@ -363,9 +363,9 @@ int misc_init_r (void) /* * Reset external DUART */ - *fpga_mode |= CFG_FPGA_MODE_DUART_RESET; + *fpga_mode |= CONFIG_SYS_FPGA_MODE_DUART_RESET; udelay(100); - *fpga_mode &= ~(CFG_FPGA_MODE_DUART_RESET); + *fpga_mode &= ~(CONFIG_SYS_FPGA_MODE_DUART_RESET); } #endif } @@ -445,9 +445,9 @@ int checkboard (void) #if 0 /* test-only */ if (ver >= 2) { - volatile u16 *fpga_status = (u16 *)CFG_FPGA_BASE_ADDR + 1; + volatile u16 *fpga_status = (u16 *)CONFIG_SYS_FPGA_BASE_ADDR + 1; - if (*fpga_status & CFG_FPGA_STATUS_FLASH) { + if (*fpga_status & CONFIG_SYS_FPGA_STATUS_FLASH) { puts ("FLASH Bank B, "); } else { puts ("FLASH Bank A, "); @@ -504,15 +504,15 @@ void reset_phy(void) void ide_set_reset(int on) { - volatile unsigned short *fpga_mode = (unsigned short *)CFG_FPGA_BASE_ADDR; + volatile unsigned short *fpga_mode = (unsigned short *)CONFIG_SYS_FPGA_BASE_ADDR; /* * Assert or deassert CompactFlash Reset Pin */ if (on) { /* assert RESET */ - *fpga_mode &= ~(CFG_FPGA_MODE_CF_RESET); + *fpga_mode &= ~(CONFIG_SYS_FPGA_MODE_CF_RESET); } else { /* release RESET */ - *fpga_mode |= CFG_FPGA_MODE_CF_RESET; + *fpga_mode |= CONFIG_SYS_FPGA_MODE_CF_RESET; } } @@ -555,12 +555,12 @@ int pci_pre_init(struct pci_controller *hose) #ifdef CONFIG_CPCI405AB -#define ONE_WIRE_CLEAR (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \ - |= CFG_FPGA_MODE_1WIRE_DIR) -#define ONE_WIRE_SET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \ - &= ~CFG_FPGA_MODE_1WIRE_DIR) -#define ONE_WIRE_GET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_STATUS) \ - & CFG_FPGA_MODE_1WIRE) +#define ONE_WIRE_CLEAR (*(volatile unsigned short *)(CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_MODE) \ + |= CONFIG_SYS_FPGA_MODE_1WIRE_DIR) +#define ONE_WIRE_SET (*(volatile unsigned short *)(CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_MODE) \ + &= ~CONFIG_SYS_FPGA_MODE_1WIRE_DIR) +#define ONE_WIRE_GET (*(volatile unsigned short *)(CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_STATUS) \ + & CONFIG_SYS_FPGA_MODE_1WIRE) /* * Generate a 1-wire reset, return 1 if no presence detect was found, @@ -690,7 +690,7 @@ U_BOOT_CMD( NULL ); -#define CFG_I2C_EEPROM_ADDR_2 0x51 /* EEPROM CAT28WC32 */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_2 0x51 /* EEPROM CAT28WC32 */ #define CONFIG_ENV_SIZE_2 0x800 /* 2048 bytes may be used for env vars*/ /* @@ -706,7 +706,7 @@ int do_get_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) IPaddr_t ipaddr; buf = malloc(CONFIG_ENV_SIZE_2); - if (eeprom_read(CFG_I2C_EEPROM_ADDR_2, 0, (uchar *)buf, CONFIG_ENV_SIZE_2)) { + if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR_2, 0, (uchar *)buf, CONFIG_ENV_SIZE_2)) { puts("\nError reading backplane EEPROM!\n"); } else { crc = crc32(0, (uchar *)(buf+4), CONFIG_ENV_SIZE_2-4); @@ -771,7 +771,7 @@ int do_set_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) crc = crc32(0, (uchar *)(buf+4), CONFIG_ENV_SIZE_2-4); *(ulong *)buf = crc; - if (eeprom_write(CFG_I2C_EEPROM_ADDR_2, 0, (uchar *)buf, CONFIG_ENV_SIZE_2)) { + if (eeprom_write(CONFIG_SYS_I2C_EEPROM_ADDR_2, 0, (uchar *)buf, CONFIG_ENV_SIZE_2)) { puts("\nError writing backplane EEPROM!\n"); } diff --git a/board/esd/cpci405/flash.c b/board/esd/cpci405/flash.c index e766895..d535924 100644 --- a/board/esd/cpci405/flash.c +++ b/board/esd/cpci405/flash.c @@ -66,7 +66,7 @@ unsigned long flash_init (void) unsigned long base_b0, base_b1; /* Init: no FLASHes known */ - for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { flash_info[i].flash_id = FLASH_UNKNOWN; } |