diff options
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/ls1043ardb/README | 1 | ||||
| -rw-r--r-- | board/freescale/ls1043ardb/cpld.c | 18 | ||||
| -rw-r--r-- | board/freescale/ls1043ardb/cpld.h | 1 | ||||
| -rw-r--r-- | board/freescale/ls1043ardb/ls1043ardb.c | 6 | ||||
| -rw-r--r-- | board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg | 7 |
5 files changed, 33 insertions, 0 deletions
diff --git a/board/freescale/ls1043ardb/README b/board/freescale/ls1043ardb/README index 4f15557..0556e73 100644 --- a/board/freescale/ls1043ardb/README +++ b/board/freescale/ls1043ardb/README @@ -84,3 +84,4 @@ Booting Options --------------- a) NOR boot b) NAND boot +c) SD boot diff --git a/board/freescale/ls1043ardb/cpld.c b/board/freescale/ls1043ardb/cpld.c index f29383d..78c2824 100644 --- a/board/freescale/ls1043ardb/cpld.c +++ b/board/freescale/ls1043ardb/cpld.c @@ -61,6 +61,21 @@ void cpld_set_nand(void) CPLD_WRITE(system_rst, 1); } +void cpld_set_sd(void) +{ + u16 reg = CPLD_CFG_RCW_SRC_SD; + u8 reg5 = (u8)(reg >> 1); + u8 reg6 = (u8)(reg & 1); + + cpld_rev_bit(®5); + + CPLD_WRITE(soft_mux_on, 1); + + CPLD_WRITE(cfg_rcw_src1, reg5); + CPLD_WRITE(cfg_rcw_src2, reg6); + + CPLD_WRITE(system_rst, 1); +} #ifdef DEBUG static void cpld_dump_regs(void) { @@ -109,6 +124,8 @@ int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) cpld_set_altbank(); else if (strcmp(argv[2], "nand") == 0) cpld_set_nand(); + else if (strcmp(argv[2], "sd") == 0) + cpld_set_sd(); else cpld_set_defbank(); #ifdef DEBUG @@ -128,6 +145,7 @@ U_BOOT_CMD( "reset: reset to default bank\n" "cpld reset altbank: reset to alternate bank\n" "cpld reset nand: reset to boot from NAND flash\n" + "cpld reset sd: reset to boot from SD card\n" #ifdef DEBUG "cpld dump - display the CPLD registers\n" #endif diff --git a/board/freescale/ls1043ardb/cpld.h b/board/freescale/ls1043ardb/cpld.h index 5f43a8a..bd59c0e 100644 --- a/board/freescale/ls1043ardb/cpld.h +++ b/board/freescale/ls1043ardb/cpld.h @@ -41,4 +41,5 @@ void cpld_rev_bit(unsigned char *value); #define CPLD_BANK_SEL_MASK 0x07 #define CPLD_BANK_SEL_ALTBANK 0x04 #define CPLD_CFG_RCW_SRC_NAND 0x106 +#define CPLD_CFG_RCW_SRC_SD 0x040 #endif diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c index 461a195..9032ed3 100644 --- a/board/freescale/ls1043ardb/ls1043ardb.c +++ b/board/freescale/ls1043ardb/ls1043ardb.c @@ -25,12 +25,17 @@ DECLARE_GLOBAL_DATA_PTR; int checkboard(void) { static const char *freq[3] = {"100.00MHZ", "156.25MHZ"}; +#ifndef CONFIG_SD_BOOT u8 cfg_rcw_src1, cfg_rcw_src2; u32 cfg_rcw_src; +#endif u32 sd1refclk_sel; printf("Board: LS1043ARDB, boot from "); +#ifdef CONFIG_SD_BOOT + puts("SD\n"); +#else cfg_rcw_src1 = CPLD_READ(cfg_rcw_src1); cfg_rcw_src2 = CPLD_READ(cfg_rcw_src2); cpld_rev_bit(&cfg_rcw_src1); @@ -43,6 +48,7 @@ int checkboard(void) puts("NAND\n"); else printf("Invalid setting of SW4\n"); +#endif printf("CPLD: V%x.%x\nPCBA: V%x.0\n", CPLD_READ(cpld_ver), CPLD_READ(cpld_ver_sub), CPLD_READ(pcba_ver)); diff --git a/board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg b/board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg new file mode 100644 index 0000000..28cd958 --- /dev/null +++ b/board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg @@ -0,0 +1,7 @@ +#PBL preamble and RCW header +aa55aa55 01ee0100 +# RCW +0810000f 0c000000 00000000 00000000 +14550002 80004012 60040000 61002000 +00000000 00000000 00000000 00038800 +00000000 00001100 00000096 00000001 |