summaryrefslogtreecommitdiff
path: root/board/hisilicon
diff options
context:
space:
mode:
Diffstat (limited to 'board/hisilicon')
-rw-r--r--board/hisilicon/hikey/Kconfig7
-rw-r--r--board/hisilicon/hikey/README197
-rw-r--r--board/hisilicon/hikey/build-tf.mak42
-rw-r--r--board/hisilicon/hikey/hikey.c45
4 files changed, 239 insertions, 52 deletions
diff --git a/board/hisilicon/hikey/Kconfig b/board/hisilicon/hikey/Kconfig
index f7f1055..9171502 100644
--- a/board/hisilicon/hikey/Kconfig
+++ b/board/hisilicon/hikey/Kconfig
@@ -12,4 +12,11 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "hikey"
+config CONS_INDEX
+ int "UART used for console"
+ range 1 4
+ default 4
+ help
+ The hi6220 SoC has 5 UARTs. For example to use UART0 enter 1 here.
+
endif
diff --git a/board/hisilicon/hikey/README b/board/hisilicon/hikey/README
index 25c8143..36adbdb 100644
--- a/board/hisilicon/hikey/README
+++ b/board/hisilicon/hikey/README
@@ -25,8 +25,12 @@ Currently the u-boot port supports: -
Compile u-boot
==============
-make CROSS_COMPILE=aarch64-linux-gnu- hikey_config
-make CROSS_COMPILE=aarch64-linux-gnu-
+ > mkdir -p ./aarch64/bin
+ > cd ./aarch64
+ > git clone http://git.denx.de/u-boot.git
+ > make CROSS_COMPILE=aarch64-linux-gnu- hikey_config
+ > make CROSS_COMPILE=aarch64-linux-gnu-
+ > cp u-boot.bin ./aarch64/bin/u-boot-hikey.bin
ARM Trusted Firmware (ATF) & l-loader
=====================================
@@ -34,27 +38,34 @@ ARM Trusted Firmware (ATF) & l-loader
This u-boot port has been tested with l-loader, booting ATF, which then boots
u-boot as the bl33.bin executable.
+Get the BL30 mcu binary.
+ > wget -P aarch64/bin https://builds.96boards.org/releases/hikey/linaro/binaries/15.05/mcuimage.bin
+
1. Get ATF source code
-git clone https://github.com/96boards/arm-trusted-firmware.git
+ > cd ./aarch64
+ > git clone https://github.com/96boards/arm-trusted-firmware.git
+ > cd ./arm-trusted-firmware
-2. Compile ATF I use the makefile here
-http://people.linaro.org/~peter.griffin/hikey/hikey-u-boot-release_r1/build-tf.mak
+2. Compile ATF, I use the build-tf.mak in the directory with this README, and copy it to ATF directory
+ > cp ../u-boot/board/hisilicon/hikey/build-tf.mak .
+ > make -f build-tf.mak build
3. Get l-loader
-git clone https://github.com/96boards/l-loader.git
-
-4. Make sym links to ATF bip / fip binaries
-ln -s /home/griffinp/aarch64/bl1-hikey.bin bl1.bin
-ln -s /home/griffinp/aarch64/fip-hikey.bin fip.bin
+ > cd ../
+ > git clone https://github.com/96boards/l-loader.git
+ > cd ./l-loader
-arm-linux-gnueabihf-gcc -c -o start.o start.S
-arm-linux-gnueabihf-gcc -c -o debug.o debug.S
-arm-linux-gnueabihf-ld -Bstatic -Tl-loader.lds -Ttext 0xf9800800 start.o debug.o -o loader
-arm-linux-gnueabihf-objcopy -O binary loader temp
+4. Make sym links to ATF bl1 / fip binaries
+ > ln -s ../bin/bl1-hikey.bin bl1.bin
+ > ln -s ../bin/fip-hikey.bin fip.bin
-python gen_loader.py -o l-loader.bin --img_loader=temp --img_bl1=bl1.bin
-sudo bash -x generate_ptable.sh
-python gen_loader.py -o ptable.img --img_prm_ptable=prm_ptable.img --img_sec_ptable=sec_ptable.img
+ > arm-linux-gnueabihf-gcc -c -o start.o start.S
+ > arm-linux-gnueabihf-gcc -c -o debug.o debug.S
+ > arm-linux-gnueabihf-ld -Bstatic -Tl-loader.lds -Ttext 0xf9800800 start.o debug.o -o loader
+ > arm-linux-gnueabihf-objcopy -O binary loader temp
+ > python gen_loader.py -o ../bin/l-loader.bin --img_loader=temp --img_bl1=bl1.bin
+ > sudo bash -x generate_ptable.sh
+ > python gen_loader.py -o ../bin/ptable.img --img_prm_ptable=./prm_ptable.img --img_sec_ptable=./sec_ptable.img
These instructions are adapted from
https://github.com/96boards/documentation/wiki/HiKeyUEFI
@@ -62,37 +73,49 @@ https://github.com/96boards/documentation/wiki/HiKeyUEFI
FLASHING
========
-1. Connect jumper J2 to go into recovery mode and flash l-loader.bin with
- fastboot using the hisi-idt.py utility
+1. Connect the second jumper on J15 BOOT SEL, to go into recovery mode and flash l-loader.bin with
+fastboot using the hisi-idt.py utility.
+
+ > cd ../
+ > git clone https://github.com/96boards/burn-boot.git
-> git clone https://github.com/96boards/burn-boot.git
-> sudo python /home/griffinp/Software/hikey/burn-boot/hisi-idt.py -d /dev/ttyUSB0 --img1=/tmp/l-loader.bin
+The command below assumes HiKey enumerated as the first USB serial port
+ > sudo ./burn-boot/hisi-idt.py -d /dev/ttyUSB0 --img1=./bin/l-loader.bin
-2. Once LED 0 comes on solid, it should be detected as a fastboot device
- (on some boards I've found this to be unreliable)
+2. Once LED 0 comes on solid, it should be detected as a fastboot device by plugging a USB A to mini B
+ cable from your PC to the USB OTG port of HiKey (on some boards I've found this to be unreliable).
-sudo fastboot devices
+ > sudo fastboot devices
+
+0123456789ABCDEF fastboot
3. Flash the images
-wget https://builds.96boards.org/releases/hikey/nvme.img
-sudo fastboot flash ptable ptable.img
-sudo fastboot flash fastboot fip.bin
-sudo fastboot flash nvme nvme.img
+ > wget -P aarch64/bin wget https://builds.96boards.org/releases/hikey/linaro/binaries/latest/nvme.img
+ > sudo fastboot flash ptable ./bin/ptable.img
+ > sudo fastboot flash fastboot ./bin/fip-hikey.bin
+ > sudo fastboot flash nvme ./bin/nvme.img
-4. Disconnect jumper J2, and reset the board and you will now (hopefully)
+4. Disconnect second jumper on J15 BOOT SEL, and reset the board and you will now (hopefully)
have ATF, booting u-boot from eMMC. On 'new' boards I've had to do the
flashing twice in the past to avoid an ATF error.
+ Note: To get USB host working, also disconnect the USB OTG cable used for flashing. Otherwise you
+ will get 'dwc_otg_core_host_init: Timeout!' errors.
+
See working boot trace below: -
-debug EMMC boot: print init OK
debug EMMC boot: send RST_N .
debug EMMC boot: start eMMC boot......
load fastboot1!
+
Switch to aarch64 mode. CPU0 executes at 0xf9801000!
+
+INFO: BL1: 0xf9810000 - 0xf9817000 [size = 28672]
NOTICE: Booting Trusted Firmware
-NOTICE: BL1: v1.1(release):a0c0399
-NOTICE: BL1: Built : 13:23:48, May 22 2015
+NOTICE: BL1: v1.1(debug):e8b7174
+NOTICE: BL1: Built : 19:16:44, Sep 8 2015
+INFO: BL1: RAM 0xf9810000 - 0xf9817000
+NOTICE: syspll frequency:1190494208Hz
NOTICE: succeed to init lpddr3 rank0 dram phy
INFO: lpddr3_freq_init, set ddrc 533mhz
INFO: init ddr3 rank0
@@ -101,7 +124,14 @@ INFO: lpddr3_freq_init, set ddrc 800mhz
INFO: init ddr3 rank0
INFO: ddr3 rank1 init pass
INFO: Elpida DDR
+INFO: ddr test value:0xa5a55a5a
+INFO: Hisilicon HiKey platform is initialized
+INFO: Using FIP
+INFO: Loading file 'bl2.bin' at address 0xf9818000
+INFO: File 'bl2.bin' loaded: 0xf9818000 - 0xf9821100
NOTICE: BL1: Booting BL2
+INFO: BL1: BL2 address = 0xf9818000
+INFO: BL1: BL2 spsr = 0x3c5
INFO: [BDID] [fff91c18] midr: 0x410fd033
INFO: [BDID] [fff91c1c] board type: 0
INFO: [BDID] [fff91c20] board id: 0x2b
@@ -112,24 +142,78 @@ INFO: acpu_dvfs_set_freq: support freq num is 5
INFO: acpu_dvfs_set_freq: start prof is 0x4
INFO: acpu_dvfs_set_freq: magic is 0x5a5ac5c5
INFO: acpu_dvfs_set_freq: voltage:
-INFO: - 0: 0x3a
-INFO: - 1: 0x3a
-INFO: - 2: 0x4a
-INFO: - 3: 0x5b
-INFO: - 4: 0x6b
-NOTICE: acpu_dvfs_set_freq: set acpu freq success!NOTICE: BL2: v1.1(debug):a0c0399
-NOTICE: BL2: Built : 10:19:28, May 27 2015
+INFO: - 0: 0x49
+INFO: - 1: 0x49
+INFO: - 2: 0x50
+INFO: - 3: 0x60
+INFO: - 4: 0x78
+NOTICE: acpu_dvfs_set_freq: set acpu freq success!NOTICE: BL2: v1.1(debug):e8b7174
+NOTICE: BL2: Built : 19:16:46, Sep 8 2015
INFO: BL2: Loading BL3-0
INFO: Using FIP
-WARNING: Failed to access image 'bl30.bin' (-1)
-ERROR: Failed to load BL3-0 (-1)
-ERROR: Please burn mcu image:
-ERROR: sudo fastboot flash mcuimage mcuimage.bin
+INFO: Loading file 'bl30.bin' at address 0x1000000
+INFO: Skip reserving memory: 0x1000000 - 0x1023270
+INFO: File 'bl30.bin' loaded: 0x1000000 - 0x1023270
+INFO: bl2_plat_handle_bl30: [1000000] 3a334d43 34313032 2f38302f 30203133
+INFO: bl2_plat_handle_bl30: [10000c8] 0 0 b 0
+INFO: bl2_plat_handle_bl30: [1000190] 17 0 0 0
+INFO: bl2_plat_handle_bl30: [1023260] 0 0 0 0
+INFO: hisi_mcu_load_image: mcu sections 0:
+INFO: hisi_mcu_load_image: src = 0x1000200
+INFO: hisi_mcu_load_image: dst = 0xf6000000
+INFO: hisi_mcu_load_image: size = 512
+INFO: hisi_mcu_load_image: [SRC 0x1000200] 0x7600 0x201 0x1eae1 0x1ea71
+INFO: hisi_mcu_load_image: [DST 0xf6000000] 0x7600 0x201 0x1eae1 0x1ea71
+INFO: hisi_mcu_load_image: mcu sections 1:
+INFO: hisi_mcu_load_image: src = 0x1000400
+INFO: hisi_mcu_load_image: dst = 0xf6000200
+INFO: hisi_mcu_load_image: size = 27828
+INFO: hisi_mcu_load_image: [SRC 0x1000400] 0xbf00bf00 0x4815b672 0x48154780 0x60014915
+INFO: hisi_mcu_load_image: [DST 0xf6000200] 0xbf00bf00 0x4815b672 0x48154780 0x60014915
+INFO: hisi_mcu_load_image: mcu sections 2:
+INFO: hisi_mcu_load_image: src = 0x10070b4
+INFO: hisi_mcu_load_image: dst = 0xf6007200
+INFO: hisi_mcu_load_image: size = 1024
+INFO: hisi_mcu_load_image: [SRC 0x10070b4] 0x55 0x0 0x0 0x0
+INFO: hisi_mcu_load_image: [DST 0xf6007200] 0x55 0x0 0x0 0x0
+INFO: hisi_mcu_load_image: mcu sections 3:
+INFO: hisi_mcu_load_image: src = 0x10074b4
+INFO: hisi_mcu_load_image: dst = 0xfff8e000
+INFO: hisi_mcu_load_image: size = 12704
+INFO: hisi_mcu_load_image: [SRC 0x10074b4] 0x55 0x0 0x0 0x0
+INFO: hisi_mcu_load_image: [DST 0xfff8e000] 0x55 0x0 0x0 0x0
+INFO: hisi_mcu_load_image: mcu sections 4:
+INFO: hisi_mcu_load_image: src = 0x100a654
+INFO: hisi_mcu_load_image: dst = 0x5e00000
+INFO: hisi_mcu_load_image: size = 82912
+INFO: hisi_mcu_load_image: [SRC 0x100a654] 0x4ff0e92d 0x2cc5f645 0x2600b0ab 0x2c7cf6c0
+INFO: hisi_mcu_load_image: [DST 0x5e00000] 0x4ff0e92d 0x2cc5f645 0x2600b0ab 0x2c7cf6c0
+INFO: hisi_mcu_load_image: mcu sections 5:
+INFO: hisi_mcu_load_image: src = 0x101ea34
+INFO: hisi_mcu_load_image: dst = 0x5e143e0
+INFO: hisi_mcu_load_image: size = 12816
+INFO: hisi_mcu_load_image: [SRC 0x101ea34] 0x33323130 0x37363534 0x42413938 0x46454443
+INFO: hisi_mcu_load_image: [DST 0x5e143e0] 0x33323130 0x37363534 0x42413938 0x46454443
+INFO: hisi_mcu_load_image: mcu sections 6:
+INFO: hisi_mcu_load_image: src = 0x1021c44
+INFO: hisi_mcu_load_image: dst = 0x5e1c1d0
+INFO: hisi_mcu_load_image: size = 3060
+INFO: hisi_mcu_load_image: [SRC 0x1021c44] 0x0 0x0 0x0 0x0
+INFO: hisi_mcu_load_image: [DST 0x5e1c1d0] 0x0 0x0 0x0 0x0
+INFO: hisi_mcu_load_image: mcu sections 7:
+INFO: hisi_mcu_load_image: src = 0x1022838
+INFO: hisi_mcu_load_image: dst = 0x5e1cdc4
+INFO: hisi_mcu_load_image: size = 2616
+INFO: hisi_mcu_load_image: [SRC 0x1022838] 0xf80000a0 0x0 0xf80000ac 0x0
+INFO: hisi_mcu_load_image: [DST 0x5e1cdc4] 0xf80000a0 0x0 0xf80000ac 0x0
+INFO: hisi_mcu_start_run: AO_SC_SYS_CTRL2=0
+INFO: bl2_plat_handle_bl30: mcu pc is 42933301
+INFO: bl2_plat_handle_bl30: AO_SC_PERIPH_CLKSTAT4 is 39018f09
INFO: BL2: TrustZone: protecting 16777216 bytes of memory at 0x3f000000
INFO: BL2: Loading BL3-1
INFO: Using FIP
INFO: Loading file 'bl31.bin' at address 0xf9858000
-INFO: File 'bl31.bin' loaded: 0xf9858000 - 0xf9860010
+INFO: File 'bl31.bin' loaded: 0xf9858000 - 0xf9861010
INFO: BL2: Loading BL3-2
INFO: Using FIP
WARNING: Failed to access image 'bl32.bin' (-1)
@@ -137,24 +221,37 @@ WARNING: Failed to load BL3-2 (-1)
INFO: BL2: Loading BL3-3
INFO: Using FIP
INFO: Loading file 'bl33.bin' at address 0x35000000
-INFO: File 'bl33.bin' loaded: 0x35000000 - 0x35042938
+INFO: File 'bl33.bin' loaded: 0x35000000 - 0x3504c468
NOTICE: BL1: Booting BL3-1
-NOTICE: BL3-1: v1.1(debug):a0c0399
-NOTICE: BL3-1: Built : 10:19:31, May 27 2015
+INFO: BL1: BL3-1 address = 0xf9858000
+INFO: BL1: BL3-1 spsr = 0x3cd
+INFO: BL1: BL3-1 params address = 0xf9821920
+INFO: BL1: BL3-1 plat params address = 0x0
+NOTICE: BL3-1: v1.1(debug):e8b7174
+NOTICE: BL3-1: Built : 19:16:49, Sep 8 2015
INFO: BL3-1: Initializing runtime services
INFO: BL3-1: Preparing for EL3 exit to normal world
INFO: BL3-1: Next image address = 0x35000000
INFO: BL3-1: Next image spsr = 0x3c9
-
-U-Boot 2015.04-00007-g1b3d379-dirty (May 27 2015 - 10:18:16) hikey
+U-Boot 2015.10-rc2 (Sep 08 2015 - 20:29:33 +0100)hikey
DRAM: 1008 MiB
-MMC: sd_card_detect: SD card present
+HI6553 PMIC init
+MMC: config_sd_carddetect: SD card not present
HiKey DWMMC: 0, HiKey DWMMC: 1
+Card did not respond to voltage select!
+** Bad device mmc 1 **
+Using default environment
+
In: serial
Out: serial
Err: serial
Net: Net Initialization Skipped
No ethernet found.
Hit any key to stop autoboot: 0
+starting USB...
+USB0: Core Release: 3.00a
+scanning bus 0 for devices... 2 USB Device(s) found
+ scanning usb for storage devices... 0 Storage Device(s) found
+ scanning usb for ethernet devices... 0 Ethernet Device(s) found
diff --git a/board/hisilicon/hikey/build-tf.mak b/board/hisilicon/hikey/build-tf.mak
new file mode 100644
index 0000000..cebb34b
--- /dev/null
+++ b/board/hisilicon/hikey/build-tf.mak
@@ -0,0 +1,42 @@
+CROSS_COMPILE := aarch64-linux-gnu-
+output_dir := $(PWD)/../bin
+makejobs := $(shell grep '^processor' /proc/cpuinfo | sort -u | wc -l)
+makethreads := $(shell dc -e "$(makejobs) 1 + p")
+make_options := GCC49_AARCH64_PREFIX=$CROSS_COMPILE \
+ -j$(makethreads) -l$(makejobs)
+
+BL30_HIKEY := $(output_dir)/mcuimage.bin
+BL33_HIKEY := $(output_dir)/u-boot-hikey.bin
+
+.PHONY: help
+help:
+ @echo "**** Common Makefile ****"
+ @echo "example:"
+ @echo "make -f build-tf.mak build"
+
+.PHONY: have-crosscompiler
+have-crosscompiler:
+ @echo -n "Check that $(CROSS_COMPILE)gcc is available..."
+ @which $(CROSS_COMPILE)gcc > /dev/null ; \
+ if [ ! $$? -eq 0 ] ; then \
+ echo "ERROR: cross-compiler $(CROSS_COMPILE)gcc not in PATH=$$PATH!" ; \
+ echo "ABORTING." ; \
+ exit 1 ; \
+ else \
+ echo "OK" ;\
+ fi
+
+build: have-crosscompiler FORCE
+ @echo "Build TF for Hikey..."
+ rm -rf build/
+ CROSS_COMPILE=$(CROSS_COMPILE) \
+ make all fip \
+ BL30=$(BL30_HIKEY) \
+ BL33=$(BL33_HIKEY) \
+ DEBUG=1 \
+ PLAT=hikey
+ @echo "Copy resulting binaries..."
+ cp build/hikey/debug/bl1.bin $(output_dir)/bl1-hikey.bin
+ cp build/hikey/debug/fip.bin $(output_dir)/fip-hikey.bin
+
+FORCE:
diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c
index 8c1271b..c4ae40b 100644
--- a/board/hisilicon/hikey/hikey.c
+++ b/board/hisilicon/hikey/hikey.c
@@ -6,6 +6,7 @@
*/
#include <common.h>
#include <dm.h>
+#include <dm/platform_data/serial_pl01x.h>
#include <errno.h>
#include <malloc.h>
#include <netdev.h>
@@ -69,6 +70,48 @@ U_BOOT_DEVICES(hi6220_gpios) = {
DECLARE_GLOBAL_DATA_PTR;
+static const struct pl01x_serial_platdata serial_platdata = {
+#if CONFIG_CONS_INDEX == 1
+ .base = HI6220_UART0_BASE,
+#elif CONFIG_CONS_INDEX == 4
+ .base = HI6220_UART3_BASE,
+#else
+#error "Unsuported console index value."
+#endif
+ .type = TYPE_PL011,
+ .clock = 19200000
+};
+
+U_BOOT_DEVICE(hikey_seriala) = {
+ .name = "serial_pl01x",
+ .platdata = &serial_platdata,
+};
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_uart_init(void)
+{
+ switch (CONFIG_CONS_INDEX) {
+ case 1:
+ hi6220_pinmux_config(PERIPH_ID_UART0);
+ break;
+ case 4:
+ hi6220_pinmux_config(PERIPH_ID_UART3);
+ break;
+ default:
+ debug("%s: Unsupported UART selected\n", __func__);
+ return -1;
+ }
+
+ return 0;
+}
+
+int board_early_init_f(void)
+{
+ board_uart_init();
+ return 0;
+}
+#endif
+
struct peri_sc_periph_regs *peri_sc =
(struct peri_sc_periph_regs *)HI6220_PERI_BASE;
@@ -269,8 +312,6 @@ int misc_init_r(void)
int board_init(void)
{
- gd->flags = 0;
-
return 0;
}
generated by cgit v0.10.2 at 2024-08-05 00:51:33 (GMT)