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Diffstat (limited to 'board/renesas/alt')
-rw-r--r--board/renesas/alt/Kconfig9
-rw-r--r--board/renesas/alt/alt.c17
-rw-r--r--board/renesas/alt/qos.c76
3 files changed, 88 insertions, 14 deletions
diff --git a/board/renesas/alt/Kconfig b/board/renesas/alt/Kconfig
index 957962d..39d53c1 100644
--- a/board/renesas/alt/Kconfig
+++ b/board/renesas/alt/Kconfig
@@ -9,4 +9,13 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "alt"
+config R8A7794_ETHERNET_B
+ bool "Use ethernet B function"
+ depends on TARGET_ALT
+ default n
+ help
+ ALT board can use default ethernet and etnernet B function.
+ This config set pin function of ethenet B. You also needt to change
+ DIP switch of board in order to use this function.
+
endif
diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c
index f0010db..3501a17 100644
--- a/board/renesas/alt/alt.c
+++ b/board/renesas/alt/alt.c
@@ -1,7 +1,7 @@
/*
* board/renesas/alt/alt.c
*
- * Copyright (C) 2014 Renesas Electronics Corporation
+ * Copyright (C) 2014, 2015 Renesas Electronics Corporation
*
* SPDX-License-Identifier: GPL-2.0
*/
@@ -94,6 +94,20 @@ int board_init(void)
r8a7794_pinmux_init();
/* Ether Enable */
+#if defined(CONFIG_R8A7794_ETHERNET_B)
+ gpio_request(GPIO_FN_ETH_CRS_DV_B, NULL);
+ gpio_request(GPIO_FN_ETH_RX_ER_B, NULL);
+ gpio_request(GPIO_FN_ETH_RXD0_B, NULL);
+ gpio_request(GPIO_FN_ETH_RXD1_B, NULL);
+ gpio_request(GPIO_FN_ETH_LINK_B, NULL);
+ gpio_request(GPIO_FN_ETH_REFCLK_B, NULL);
+ gpio_request(GPIO_FN_ETH_MDIO_B, NULL);
+ gpio_request(GPIO_FN_ETH_TXD1_B, NULL);
+ gpio_request(GPIO_FN_ETH_TX_EN_B, NULL);
+ gpio_request(GPIO_FN_ETH_MAGIC_B, NULL);
+ gpio_request(GPIO_FN_ETH_TXD0_B, NULL);
+ gpio_request(GPIO_FN_ETH_MDC_B, NULL);
+#else
gpio_request(GPIO_FN_ETH_CRS_DV, NULL);
gpio_request(GPIO_FN_ETH_RX_ER, NULL);
gpio_request(GPIO_FN_ETH_RXD0, NULL);
@@ -106,6 +120,7 @@ int board_init(void)
gpio_request(GPIO_FN_ETH_MAGIC, NULL);
gpio_request(GPIO_FN_ETH_TXD0, NULL);
gpio_request(GPIO_FN_ETH_MDC, NULL);
+#endif
gpio_request(GPIO_FN_IRQ8, NULL);
/* PHY reset */
diff --git a/board/renesas/alt/qos.c b/board/renesas/alt/qos.c
index f0b349f..b6324c8 100644
--- a/board/renesas/alt/qos.c
+++ b/board/renesas/alt/qos.c
@@ -14,7 +14,7 @@
#include <asm/arch/rmobile.h>
#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
-/* QoS version 0.11 */
+/* QoS version 0.311 for ES1 and version 0.321 for ES2 */
enum {
DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
@@ -62,6 +62,24 @@ static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
[DBSC3_15] = DBSC3_0_QOS_W15_BASE,
};
+#if defined(CONFIG_QOS_PRI_MEDIA)
+#define is_qos_pri_media() 1
+#else
+#define is_qos_pri_media() 0
+#endif
+
+#if defined(CONFIG_QOS_PRI_NORMAL)
+#define is_qos_pri_normal() 1
+#else
+#define is_qos_pri_normal() 0
+#endif
+
+#if defined(CONFIG_QOS_PRI_GFX)
+#define is_qos_pri_gfx() 1
+#else
+#define is_qos_pri_gfx() 0
+#endif
+
void qos_init(void)
{
int i;
@@ -77,30 +95,57 @@ void qos_init(void)
/* S3C -QoS */
s3c = (struct rcar_s3c *)S3C_BASE;
- writel(0x1F0D0B0A, &s3c->s3crorr);
- writel(0x1F0D0B09, &s3c->s3cworr);
-
+ if (is_qos_pri_media()) {
+ writel(0x1F0B0604, &s3c->s3crorr);
+ writel(0x1F0E0705, &s3c->s3cworr);
+ } else if (is_qos_pri_normal()) {
+ writel(0x1F0B0908, &s3c->s3crorr);
+ writel(0x1F0E0A08, &s3c->s3cworr);
+ } else if (is_qos_pri_media()) {
+ writel(0x1F0B0B0B, &s3c->s3crorr);
+ writel(0x1F0E0C0C, &s3c->s3cworr);
+ }
/* QoS Control Registers */
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
writel(0x00890089, &s3c_qos->s3cqos0);
writel(0x20960010, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
- writel(0x20AA2200, &s3c_qos->s3cqos3);
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_media())
+ writel(0x20AA2100, &s3c_qos->s3cqos3);
writel(0x00002032, &s3c_qos->s3cqos4);
writel(0x20960010, &s3c_qos->s3cqos5);
writel(0x20302030, &s3c_qos->s3cqos6);
- writel(0x20AA2200, &s3c_qos->s3cqos7);
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_gfx())
+ writel(0x20AA2100, &s3c_qos->s3cqos7);
writel(0x00002032, &s3c_qos->s3cqos8);
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
writel(0x00890089, &s3c_qos->s3cqos0);
writel(0x20960010, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
- writel(0x20AA2200, &s3c_qos->s3cqos3);
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_normal())
+ writel(0x20AA2200, &s3c_qos->s3cqos3);
+ else if (is_qos_pri_gfx())
+ writel(0x20AA2100, &s3c_qos->s3cqos3);
writel(0x00002032, &s3c_qos->s3cqos4);
writel(0x20960010, &s3c_qos->s3cqos5);
writel(0x20302030, &s3c_qos->s3cqos6);
- writel(0x20AA2200, &s3c_qos->s3cqos7);
+ if (is_qos_pri_media())
+ writel(0x20AA2300, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_media())
+ writel(0x20AA2200, &s3c_qos->s3cqos7);
+ else if (is_qos_pri_media())
+ writel(0x20AA2100, &s3c_qos->s3cqos7);
writel(0x00002032, &s3c_qos->s3cqos8);
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
@@ -115,7 +160,7 @@ void qos_init(void)
writel(0x00002032, &s3c_qos->s3cqos8);
s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
- writel(0x00820082, &s3c_qos->s3cqos0);
+ writel(0x00820092, &s3c_qos->s3cqos0);
writel(0x20960020, &s3c_qos->s3cqos1);
writel(0x20302030, &s3c_qos->s3cqos2);
writel(0x20AA20FA, &s3c_qos->s3cqos3);
@@ -157,8 +202,13 @@ void qos_init(void)
}
/* CCI-400 -QoS */
- writel(0x20000800, CCI_400_MAXOT_1);
- writel(0x20000800, CCI_400_MAXOT_2);
+ if (IS_R8A7794_ES2()) {
+ writel(0x20001000, CCI_400_MAXOT_1);
+ writel(0x20001000, CCI_400_MAXOT_2);
+ } else {
+ writel(0x20000800, CCI_400_MAXOT_1);
+ writel(0x20000800, CCI_400_MAXOT_2);
+ }
writel(0x0000000C, CCI_400_QOSCNTL_1);
writel(0x0000000C, CCI_400_QOSCNTL_2);
@@ -166,7 +216,7 @@ void qos_init(void)
/* Transaction Control (MXI) */
mxi = (struct rcar_mxi *)MXI_BASE;
writel(0x00000013, &mxi->mxrtcr);
- writel(0x00000013, &mxi->mxwtcr);
+ writel(0x00000016, &mxi->mxwtcr);
writel(0x00780080, &mxi->mxsaar0);
writel(0x02000800, &mxi->mxsaar1);
@@ -449,7 +499,7 @@ void qos_init(void)
/* QoS Register (RT-AXI) */
axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
- writel(0x00000000, &axi_qos->qosconf);
+ writel(0x00000001, &axi_qos->qosconf);
writel(0x00002053, &axi_qos->qosctset0);
writel(0x00002096, &axi_qos->qosctset1);
writel(0x00002030, &axi_qos->qosctset2);
generated by cgit v0.10.2 at 2024-08-16 07:15:07 (GMT)