diff options
Diffstat (limited to 'board/scalys/grapeboard/grapeboard.c')
| -rw-r--r-- | board/scalys/grapeboard/grapeboard.c | 81 |
1 files changed, 29 insertions, 52 deletions
diff --git a/board/scalys/grapeboard/grapeboard.c b/board/scalys/grapeboard/grapeboard.c index a08cfe3..eade1bd 100644 --- a/board/scalys/grapeboard/grapeboard.c +++ b/board/scalys/grapeboard/grapeboard.c @@ -29,83 +29,54 @@ #include <fsl_csu.h> #include "usb_grapeboard.h" #include <../../../include/generated/autoconf.h> +#include <usb.h> +#include "gpio_grapeboard.h" DECLARE_GLOBAL_DATA_PTR; -/* GPIO1 registers */ -#define CONFIG_SYS_GPIO1 0x2300000 -#define CONFIG_SYS_GPIO2 0x2310000 -#define GPIO_MASK(shift) (0x80000000 >> shift) - -/* ===================================================== - * Grapeboard ExPI mapping (* pin name at ls1012a side) - * Note: The secondary options require modified RCW. - * ===================================================== - * 3V3 -| 1 2|- 5V0 - * I2C_SDA -| 3 4|- 5V0 - * I2C_SCL -| 5 6|- GND - * CLK0_25MHZ -| 7 8|- UART_TXD - * GND -| 9 10|- UART_RXD - * GPIO1_27* -|11 12|- GPIO2_04* - * GPIO2_05* -|13 14|- GND - * GPIO2_06* -|15 16|- GPIO2_07* - * 3V3 -|17 18|- GPIO2_09* - * SPI_MOSI/GPIO1_24* -|19 20|- GND - * SPI_MISO/GPIO1_28* -|21 22|- GPIO2_10* - * SPI_CLK/GPIO1_29* -|23 24|- SPI_CE0/GPIO1_25* - * GND -|25 26|- SPI_CE1/GPIO1_26* - */ - -/* ExPI gpios */ -#define gpio1_27 GPIO_MASK(27) /* ExPI pin 11 */ -#define gpio2_04 GPIO_MASK(4) /* ExPI pin 12 */ -#define gpio2_05 GPIO_MASK(5) /* ExPI pin 13 */ -#define gpio2_06 GPIO_MASK(6) /* ExPI pin 15 */ -#define gpio2_07 GPIO_MASK(7) /* ExPI pin 16 */ -#define gpio2_09 GPIO_MASK(9) /* ExPI pin 18 */ -#define gpio2_10 GPIO_MASK(10) /* ExPI pin 22 */ - -/* M2 gpios */ -#define gpio1_22 GPIO_MASK(22) -#define gpio2_00 GPIO_MASK(0) -#define gpio2_01 GPIO_MASK(1) -#define gpio2_02 GPIO_MASK(2) -#define M2_CFG1 GPIO_MASK(11) /* gpio2_11 */ -#define M2_CFG0 GPIO_MASK(12) /* gpio2_12 */ -#define M2_CFG2 GPIO_MASK(13) /* gpio2_13 */ -#define M2_CFG3 GPIO_MASK(14) /* gpio2_14 */ - -/* Other gpios */ -#define QSPI_MUX_N_MASK (0x80000000 >> 3) /* gpio2_03 */ - int checkboard(void) { struct ccsr_gpio *pgpio = (void *)(CONFIG_SYS_GPIO2); +#if 0 + const void* bcd_dtc_blob; + int ret; +#endif int m2_config = 0; puts("Board: Grape board\n"); - /* set QSPI chip select muxing to 0 */ + /* set QSPI chip select muxing to 0 */ setbits_be32(&pgpio->gpdir, QSPI_MUX_N_MASK); clrbits_be32(&pgpio->gpdat, QSPI_MUX_N_MASK); - usb_hub_init(); +#if 0 /* todo: test */ + bcd_dtc_blob = get_boardinfo_rescue_flash(); + if (bcd_dtc_blob != NULL) { + /* Board Configuration Data is intact, ready for parsing */ + ret = add_mac_addressess_to_env(bcd_dtc_blob); + if (ret != 0) { + printf("Error adding BCD data to environment\n"); + } + } +#endif + /* Configure USB hub */ + usb_hx3_hub_init(); - /* M.2 init: read input values of M.2 config signals */ + /* Scanning for M.2 module */ clrbits_be32(&pgpio->gpdir, (M2_CFG0 | M2_CFG1 | M2_CFG2 | M2_CFG3)); m2_config = (in_be32(&pgpio->gpdat) & (M2_CFG0 | M2_CFG1 | M2_CFG2 | M2_CFG3)); switch(m2_config >> 17) { case 0: printf("M.2: SATA SSD module found on M.2 port\n"); -#ifdef CONFIG_SERDES_D_TO_PCIE +#if defined(CONFIG_SERDES_D_TO_PCIE) && defined(CONFIG_PBL_IMAGE) printf("Warning: SERDES has not been configured in RCW for SATA!\n"); #endif break; case 1: printf("M.2: PCIe SSD module found on M.2 port\n"); -#ifdef CONFIG_SERDES_D_TO_SATA +#if defined(CONFIG_SERDES_D_TO_SATA) && defined(CONFIG_PBL_IMAGE) printf("Warning: SERDES has not been configured in RCW for PCIe!\n"); #endif break; @@ -120,6 +91,13 @@ int checkboard(void) return 0; } +int misc_init_r(void) +{ + + + return 0; +} + int dram_init(void) { static const struct fsl_mmdc_info mparam = { @@ -209,7 +187,6 @@ void scsi_init(void) #endif } - int ft_board_setup(void *blob, bd_t *bd) { arch_fixup_fdt(blob); |