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-rw-r--r--board/sixnet/flash.c44
-rw-r--r--board/sixnet/sixnet.c68
2 files changed, 112 insertions, 0 deletions
diff --git a/board/sixnet/flash.c b/board/sixnet/flash.c
index 225513a..4ab6c1b 100644
--- a/board/sixnet/flash.c
+++ b/board/sixnet/flash.c
@@ -23,6 +23,10 @@
#include <common.h>
#include <mpc8xx.h>
+/* environment.h defines the various CFG_ENV_... values in terms
+ * of whichever ones are given in the configuration file.
+ */
+#include <environment.h>
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
@@ -104,6 +108,19 @@ unsigned long flash_init (void)
&flash_info[0]);
#endif
+#ifdef CFG_ENV_ADDR
+ flash_protect ( FLAG_PROTECT_SET,
+ CFG_ENV_ADDR,
+ CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
+#endif
+
+#ifdef CFG_ENV_ADDR_REDUND
+ flash_protect ( FLAG_PROTECT_SET,
+ CFG_ENV_ADDR_REDUND,
+ CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
+ &flash_info[0]);
+#endif
+
return (size_b);
}
@@ -154,6 +171,21 @@ static void flash_get_offsets (ulong base, flash_info_t *info)
for( i = 0; i < info->sector_count; i++ )
info->start[i] = base + (i * sect_size);
}
+ else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
+ && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM800T) {
+
+ int sect_size; /* number of bytes/sector */
+
+ sect_size = 0x00010000 * (sizeof(FPW)/2);
+
+ /* set up sector start address table (top boot sector type) */
+ for (i = 0; i < info->sector_count - 3; i++)
+ info->start[i] = base + (i * sect_size);
+ i = info->sector_count - 1;
+ info->start[i--] = base + (info->size - 0x00004000) * (sizeof(FPW)/2);
+ info->start[i--] = base + (info->size - 0x00006000) * (sizeof(FPW)/2);
+ info->start[i--] = base + (info->size - 0x00008000) * (sizeof(FPW)/2);
+ }
}
/*-----------------------------------------------------------------------
@@ -196,6 +228,9 @@ void flash_print_info (flash_info_t *info)
}
switch (info->flash_id & FLASH_TYPEMASK) {
+ case FLASH_AM800T:
+ fmt = "29LV800B%s (8 Mbit, %s)\n";
+ break;
case FLASH_AM640U:
fmt = "29LV641D (64 Mbit, uniform sectors)\n";
break;
@@ -295,6 +330,12 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
/* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
if (info->flash_id != FLASH_UNKNOWN) switch (addr[1]) {
+ case (FPW)AMD_ID_LV800T:
+ info->flash_id += FLASH_AM800T;
+ info->sector_count = 19;
+ info->size = 0x00100000 * (sizeof(FPW)/2);
+ break; /* => 1 or 2 MiB */
+
case (FPW)AMD_ID_LV640U: /* 29LV640 and 29LV641 have same ID */
info->flash_id += FLASH_AM640U;
info->sector_count = 128;
@@ -401,6 +442,7 @@ static void flash_sync_real_protect(flash_info_t *info)
break;
case FLASH_AM640U:
+ case FLASH_AM800T:
default:
/* no hardware protect that we support */
break;
@@ -438,6 +480,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
case FLASH_28F320C3B:
case FLASH_28F640C3B:
case FLASH_AM640U:
+ case FLASH_AM800T:
break;
case FLASH_UNKNOWN:
default:
@@ -735,6 +778,7 @@ int flash_real_protect (flash_info_t * info, long sector, int prot)
break;
case FLASH_AM640U:
+ case FLASH_AM800T:
default:
/* no hardware protect that we support */
info->protect[sector] = prot;
diff --git a/board/sixnet/sixnet.c b/board/sixnet/sixnet.c
index e33925c..4025b47 100644
--- a/board/sixnet/sixnet.c
+++ b/board/sixnet/sixnet.c
@@ -24,6 +24,7 @@
#include <common.h>
#include <config.h>
+#include <jffs2/jffs2.h>
#include <mpc8xx.h>
#include <net.h> /* for eth_init() */
#include <rtc.h>
@@ -602,3 +603,70 @@ long int initdram(int board_type)
return (size_sdram);
}
+
+#ifdef CFG_JFFS_CUSTOM_PART
+
+static struct part_info part;
+
+#define jffs2_block(i) \
+ ((struct jffs2_unknown_node*)(CFG_JFFS2_BASE + (i) * 65536))
+
+struct part_info* jffs2_part_info(int part_num)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+ bd_t *bd = gd->bd;
+ char* s;
+ int i;
+ int bootnor = 0; /* assume booting from NAND flash */
+
+ if (part_num != 0)
+ return 0; /* only support one partition */
+
+ if (part.usr_priv == (void*)1)
+ return &part; /* already have part info */
+
+ memset(&part, 0, sizeof(part));
+
+ if (nand_dev_desc[0].ChipID == NAND_ChipID_UNKNOWN)
+ bootnor = 1;
+ else if (bd->bi_flashsize < 0x800000)
+ bootnor = 0;
+ else for (i = 0; !bootnor && i < 4; ++i) {
+ /* boot from NOR if JFFS2 info in any of
+ * first 4 erase blocks
+ */
+
+ if (jffs2_block(i)->magic == JFFS2_MAGIC_BITMASK)
+ bootnor = 1;
+ }
+
+ if (bootnor) {
+ /* no NAND flash or boot in NOR, use NOR flash */
+ part.offset = (unsigned char *)CFG_JFFS2_BASE;
+ part.size = CFG_JFFS2_SIZE;
+ }
+ else {
+ char readcmd[60];
+
+ /* boot info in NAND flash, get and use copy in RAM */
+
+ /* override info from environment if present */
+ s = getenv("fsaddr");
+ part.offset = s ? (void *)simple_strtoul(s, NULL, 16)
+ : (void *)CFG_JFFS2_RAMBASE;
+ s = getenv("fssize");
+ part.size = s ? simple_strtoul(s, NULL, 16)
+ : CFG_JFFS2_RAMSIZE;
+
+ /* read from nand flash */
+ sprintf(readcmd, "nand read.jffs2 %x 0 %x",
+ (uint32_t)part.offset, part.size);
+ run_command(readcmd, 0);
+ }
+
+ part.erasesize = 0; /* unused */
+ part.usr_priv=(void*)1; /* ready */
+
+ return &part;
+}
+#endif /* ifdef CFG_JFFS_CUSTOM_PART */