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-rw-r--r--board/freescale/common/Makefile1
-rw-r--r--board/freescale/common/ngpixis.c56
-rw-r--r--board/freescale/common/ngpixis.h8
-rw-r--r--board/freescale/common/sdhc_boot.c64
-rw-r--r--board/freescale/common/sys_eeprom.c50
-rw-r--r--board/freescale/corenet_ds/corenet_ds.c11
-rw-r--r--board/freescale/corenet_ds/ddr.c49
-rw-r--r--board/freescale/corenet_ds/p4080ds_ddr.c24
-rw-r--r--board/freescale/mpc8536ds/config.mk30
-rw-r--r--board/freescale/mpc8536ds/ddr.c26
-rw-r--r--board/freescale/mpc8540ads/ddr.c30
-rw-r--r--board/freescale/mpc8541cds/ddr.c26
-rw-r--r--board/freescale/mpc8544ds/ddr.c27
-rw-r--r--board/freescale/mpc8548cds/ddr.c27
-rw-r--r--board/freescale/mpc8555cds/ddr.c26
-rw-r--r--board/freescale/mpc8560ads/ddr.c30
-rw-r--r--board/freescale/mpc8568mds/ddr.c28
-rw-r--r--board/freescale/mpc8569mds/config.mk30
-rw-r--r--board/freescale/mpc8569mds/ddr.c28
-rw-r--r--board/freescale/mpc8572ds/config.mk30
-rw-r--r--board/freescale/mpc8572ds/ddr.c28
-rw-r--r--board/freescale/mpc8572ds/mpc8572ds.c11
-rw-r--r--board/freescale/mpc8610hpcd/ddr.c26
-rw-r--r--board/freescale/mpc8641hpcn/ddr.c37
-rw-r--r--board/freescale/mpc8641hpcn/mpc8641hpcn.c11
-rw-r--r--board/freescale/p1022ds/ddr.c23
-rw-r--r--board/freescale/p1022ds/diu.c66
-rw-r--r--board/freescale/p1022ds/p1022ds.c13
-rw-r--r--board/freescale/p1_p2_rdb/config.mk31
-rw-r--r--board/freescale/p1_p2_rdb/ddr.c47
-rw-r--r--board/freescale/p1_p2_rdb/p1_p2_rdb.c66
-rw-r--r--board/freescale/p1_p2_rdb/tlb.c22
-rw-r--r--board/freescale/p2020ds/ddr.c24
-rw-r--r--board/freescale/p2020ds/p2020ds.c23
-rw-r--r--board/freescale/p2020ds/tlb.c13
-rw-r--r--board/sbc8548/ddr.c27
-rw-r--r--board/sbc8560/ddr.c30
-rw-r--r--board/sbc8641d/ddr.c35
-rw-r--r--board/sbc8641d/sbc8641d.c9
-rw-r--r--board/socrates/ddr.c27
-rw-r--r--board/stx/stxgp3/ddr.c30
-rw-r--r--board/stx/stxssa/ddr.c29
-rw-r--r--board/xes/xpedite517x/ddr.c32
-rw-r--r--board/xes/xpedite517x/xpedite517x.c9
-rw-r--r--board/xes/xpedite520x/ddr.c22
-rw-r--r--board/xes/xpedite537x/ddr.c22
-rw-r--r--board/xes/xpedite537x/xpedite537x.c9
-rw-r--r--board/xes/xpedite550x/ddr.c20
-rw-r--r--board/xes/xpedite550x/xpedite550x.c9
49 files changed, 341 insertions, 1011 deletions
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 1abd3e5..8ea5acb 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -36,6 +36,7 @@ COBJS-$(CONFIG_FSL_NGPIXIS) += ngpixis.o
COBJS-$(CONFIG_PQ_MDS_PIB) += pq-mds-pib.o
COBJS-$(CONFIG_ID_EEPROM) += sys_eeprom.o
COBJS-$(CONFIG_FSL_SGMII_RISER) += sgmii_riser.o
+COBJS-$(CONFIG_ENV_IS_IN_MMC) += sdhc_boot.o
COBJS-$(CONFIG_MPC8541CDS) += cds_pci_ft.o
COBJS-$(CONFIG_MPC8548CDS) += cds_pci_ft.o
diff --git a/board/freescale/common/ngpixis.c b/board/freescale/common/ngpixis.c
index a135fbe..4e01e5a 100644
--- a/board/freescale/common/ngpixis.c
+++ b/board/freescale/common/ngpixis.c
@@ -1,5 +1,5 @@
/**
- * Copyright 2010 Freescale Semiconductor
+ * Copyright 2010-2011 Freescale Semiconductor
* Author: Timur Tabi <timur@freescale.com>
*
* This program is free software; you can redistribute it and/or modify it
@@ -35,61 +35,89 @@
#include <common.h>
#include <command.h>
-#include <watchdog.h>
-#include <asm/cache.h>
#include <asm/io.h>
#include "ngpixis.h"
+static u8 __pixis_read(unsigned int reg)
+{
+ void *p = (void *)PIXIS_BASE;
+
+ return in_8(p + reg);
+}
+u8 pixis_read(unsigned int reg) __attribute__((weak, alias("__pixis_read")));
+
+static void __pixis_write(unsigned int reg, u8 value)
+{
+ void *p = (void *)PIXIS_BASE;
+
+ out_8(p + reg, value);
+}
+void pixis_write(unsigned int reg, u8 value)
+ __attribute__((weak, alias("__pixis_write")));
+
/*
* Reset the board. This ignores the ENx registers.
*/
-void pixis_reset(void)
+void __pixis_reset(void)
{
- out_8(&pixis->rst, 0);
+ PIXIS_WRITE(rst, 0);
while (1);
}
+void pixis_reset(void) __attribute__((weak, alias("__pixis_reset")));
/*
* Reset the board. Like pixis_reset(), but it honors the ENx registers.
*/
-void pixis_bank_reset(void)
+void __pixis_bank_reset(void)
{
- out_8(&pixis->vctl, 0);
- out_8(&pixis->vctl, 1);
+ PIXIS_WRITE(vctl, 0);
+ PIXIS_WRITE(vctl, 1);
while (1);
}
+void pixis_bank_reset(void) __attribute__((weak, alias("__pixis_bank_reset")));
/**
* Set the boot bank to the power-on default bank
*/
-void clear_altbank(void)
+void __clear_altbank(void)
{
+ u8 reg;
+
/* Tell the ngPIXIS to use this the bits in the physical switch for the
* boot bank value, instead of the SWx register. We need to be careful
* only to set the bits in SWx that correspond to the boot bank.
*/
- clrbits_8(&PIXIS_EN(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK);
+ reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en);
+ reg &= ~PIXIS_LBMAP_MASK;
+ PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg);
}
+void clear_altbank(void) __attribute__((weak, alias("__clear_altbank")));
/**
* Set the boot bank to the alternate bank
*/
-void set_altbank(void)
+void __set_altbank(void)
{
+ u8 reg;
+
/* Program the alternate bank number into the SWx register.
*/
- clrsetbits_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK,
- PIXIS_LBMAP_ALTBANK);
+ reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].sw);
+ reg = (reg & ~PIXIS_LBMAP_MASK) | PIXIS_LBMAP_ALTBANK;
+ PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].sw, reg);
/* Tell the ngPIXIS to use this the bits in the SWx register for the
* boot bank value, instead of the physical switch. We need to be
* careful only to set the bits in SWx that correspond to the boot bank.
*/
- setbits_8(&PIXIS_EN(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK);
+ reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en);
+ reg |= PIXIS_LBMAP_MASK;
+ PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg);
}
+void set_altbank(void) __attribute__((weak, alias("__set_altbank")));
int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
diff --git a/board/freescale/common/ngpixis.h b/board/freescale/common/ngpixis.h
index 089408b..681b0d0 100644
--- a/board/freescale/common/ngpixis.h
+++ b/board/freescale/common/ngpixis.h
@@ -1,5 +1,5 @@
/**
- * Copyright 2010 Freescale Semiconductor
+ * Copyright 2010-2011 Freescale Semiconductor
* Author: Timur Tabi <timur@freescale.com>
*
* This program is free software; you can redistribute it and/or modify it
@@ -55,3 +55,9 @@ typedef struct ngpixis {
/* The PIXIS EN register that corresponds to board switch X, where x >= 1 */
#define PIXIS_EN(x) (pixis->s[(x) - 1].en)
+
+u8 pixis_read(unsigned int reg);
+void pixis_write(unsigned int reg, u8 value);
+
+#define PIXIS_READ(reg) pixis_read(offsetof(ngpixis_t, reg))
+#define PIXIS_WRITE(reg, value) pixis_write(offsetof(ngpixis_t, reg), value)
diff --git a/board/freescale/common/sdhc_boot.c b/board/freescale/common/sdhc_boot.c
new file mode 100644
index 0000000..964c6b8
--- /dev/null
+++ b/board/freescale/common/sdhc_boot.c
@@ -0,0 +1,64 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mmc.h>
+#include <malloc.h>
+
+/*
+ * The environment variables are written to just after the u-boot image
+ * on SDCard, so we must read the MBR to get the start address and code
+ * length of the u-boot image, then calculate the address of the env.
+ */
+#define ESDHC_BOOT_IMAGE_SIZE 0x48
+#define ESDHC_BOOT_IMAGE_ADDR 0x50
+
+int mmc_get_env_addr(struct mmc *mmc, u32 *env_addr)
+{
+ u8 *tmp_buf;
+ u32 blklen, code_offset, code_len, n;
+
+ blklen = mmc->read_bl_len;
+ tmp_buf = malloc(blklen);
+ if (!tmp_buf)
+ return 1;
+
+ /* read out the first block, get the config data information */
+ n = mmc->block_dev.block_read(mmc->block_dev.dev, 0, 1, tmp_buf);
+ if (!n) {
+ free(tmp_buf);
+ return 1;
+ }
+
+ /* Get the Source Address, from offset 0x50 */
+ code_offset = *(u32 *)(tmp_buf + ESDHC_BOOT_IMAGE_ADDR);
+
+ /* Get the code size from offset 0x48 */
+ code_len = *(u32 *)(tmp_buf + ESDHC_BOOT_IMAGE_SIZE);
+
+ *env_addr = code_offset + code_len;
+
+ free(tmp_buf);
+
+ return 0;
+}
+
diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c
index 3ecfb06..d2ed036 100644
--- a/board/freescale/common/sys_eeprom.c
+++ b/board/freescale/common/sys_eeprom.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2006, 2008-2009 Freescale Semiconductor
+ * Copyright 2006, 2008-2009, 2011 Freescale Semiconductor
* York Sun (yorksun@freescale.com)
* Haiying Wang (haiying.wang@freescale.com)
* Timur Tabi (timur@freescale.com)
@@ -34,12 +34,6 @@
#endif
#ifdef CONFIG_SYS_I2C_EEPROM_NXID
-#define MAX_NUM_PORTS 8
-#define NXID_VERSION 0
-#endif
-
-#ifdef CONFIG_SYS_I2C_EEPROM_NXID_1
-#define CONFIG_SYS_I2C_EEPROM_NXID
#define MAX_NUM_PORTS 23
#define NXID_VERSION 1
#endif
@@ -428,11 +422,16 @@ int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
* This ensures that any user-saved variables are never overwritten.
*
* This function must be called after relocation.
+ *
+ * For NXID v1 EEPROMs, we support loading and up-converting the older NXID v0
+ * format. In a v0 EEPROM, there are only eight MAC addresses and the CRC is
+ * located at a different offset.
*/
int mac_read_from_eeprom(void)
{
unsigned int i;
- u32 crc;
+ u32 crc, crc_offset = offsetof(struct eeprom, crc);
+ u32 *crcp; /* Pointer to the CRC in the data read from the EEPROM */
puts("EEPROM: ");
@@ -447,12 +446,32 @@ int mac_read_from_eeprom(void)
return -1;
}
- crc = crc32(0, (void *)&e, sizeof(e) - 4);
- if (crc != be32_to_cpu(e.crc)) {
+#ifdef CONFIG_SYS_I2C_EEPROM_NXID
+ /*
+ * If we've read an NXID v0 EEPROM, then we need to set the CRC offset
+ * to where it is in v0.
+ */
+ if (e.version == 0)
+ crc_offset = 0x72;
+#endif
+
+ crc = crc32(0, (void *)&e, crc_offset);
+ crcp = (void *)&e + crc_offset;
+ if (crc != be32_to_cpu(*crcp)) {
printf("CRC mismatch (%08x != %08x)\n", crc, be32_to_cpu(e.crc));
return -1;
}
+#ifdef CONFIG_SYS_I2C_EEPROM_NXID
+ /*
+ * MAC address #9 in v1 occupies the same position as the CRC in v0.
+ * Erase it so that it's not mistaken for a MAC address. We'll
+ * update the CRC later.
+ */
+ if (e.version == 0)
+ memset(e.mac[8], 0xff, 6);
+#endif
+
for (i = 0; i < min(e.mac_count, MAX_NUM_PORTS); i++) {
if (memcmp(&e.mac[i], "\0\0\0\0\0\0", 6) &&
memcmp(&e.mac[i], "\xFF\xFF\xFF\xFF\xFF\xFF", 6)) {
@@ -482,6 +501,17 @@ int mac_read_from_eeprom(void)
printf("%c%c%c%c\n", e.id[0], e.id[1], e.id[2], e.id[3]);
#endif
+#ifdef CONFIG_SYS_I2C_EEPROM_NXID
+ /*
+ * Now we need to upconvert the data into v1 format. We do this last so
+ * that at boot time, U-Boot will still say "NXID v0".
+ */
+ if (e.version == 0) {
+ e.version = NXID_VERSION;
+ update_crc();
+ }
+#endif
+
return 0;
}
diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c
index 232dc72..3db93c3 100644
--- a/board/freescale/corenet_ds/corenet_ds.c
+++ b/board/freescale/corenet_ds/corenet_ds.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2009-2010 Freescale Semiconductor, Inc.
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -39,8 +39,6 @@ extern void pci_of_setup(void *blob, bd_t *bd);
DECLARE_GLOBAL_DATA_PTR;
-void cpu_mp_lmb_reserve(struct lmb *lmb);
-
int checkboard (void)
{
u8 sw;
@@ -186,13 +184,6 @@ int misc_init_r(void)
return 0;
}
-#ifdef CONFIG_MP
-void board_lmb_reserve(struct lmb *lmb)
-{
- cpu_mp_lmb_reserve(lmb);
-}
-#endif
-
void ft_board_setup(void *blob, bd_t *bd)
{
phys_addr_t base;
diff --git a/board/freescale/corenet_ds/ddr.c b/board/freescale/corenet_ds/ddr.c
index 07b950f..98024c7 100644
--- a/board/freescale/corenet_ds/ddr.c
+++ b/board/freescale/corenet_ds/ddr.c
@@ -16,9 +16,6 @@
DECLARE_GLOBAL_DATA_PTR;
-extern void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
- unsigned int ctrl_num);
-
/*
* Fixed sdram init -- doesn't use serial presence detect.
@@ -31,19 +28,21 @@ extern fixed_ddr_parm_t fixed_ddr_parm_1[];
phys_size_t fixed_sdram(void)
{
int i;
- sys_info_t sysinfo;
char buf[32];
fsl_ddr_cfg_regs_t ddr_cfg_regs;
phys_size_t ddr_size;
unsigned int lawbar1_target_id;
+ ulong ddr_freq, ddr_freq_mhz;
+
+ ddr_freq = get_ddr_freq(0);
+ ddr_freq_mhz = ddr_freq / 1000000;
- get_sys_info(&sysinfo);
printf("Configuring DDR for %s MT/s data rate\n",
- strmhz(buf, sysinfo.freqDDRBus));
+ strmhz(buf, ddr_freq));
for (i = 0; fixed_ddr_parm_0[i].max_freq > 0; i++) {
- if ((sysinfo.freqDDRBus > fixed_ddr_parm_0[i].min_freq) &&
- (sysinfo.freqDDRBus <= fixed_ddr_parm_0[i].max_freq)) {
+ if ((ddr_freq_mhz > fixed_ddr_parm_0[i].min_freq) &&
+ (ddr_freq_mhz <= fixed_ddr_parm_0[i].max_freq)) {
memcpy(&ddr_cfg_regs,
fixed_ddr_parm_0[i].ddr_settings,
sizeof(ddr_cfg_regs));
@@ -53,7 +52,7 @@ phys_size_t fixed_sdram(void)
if (fixed_ddr_parm_0[i].max_freq == 0)
panic("Unsupported DDR data rate %s MT/s data rate\n",
- strmhz(buf, sysinfo.freqDDRBus));
+ strmhz(buf, ddr_freq));
ddr_size = (phys_size_t) CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
ddr_cfg_regs.ddr_cdr1 = DDR_CDR1_DHC_EN;
@@ -108,38 +107,6 @@ phys_size_t fixed_sdram(void)
return ddr_size;
}
-static void get_spd(ddr3_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- int ret;
-
- ret = i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr3_spd_eeprom_t));
- if (ret) {
- debug("DDR: failed to read SPD from address %u\n", i2c_address);
- memset(spd, 0, sizeof(ddr3_spd_eeprom_t));
- }
-}
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0 && i == 0)
- i2c_address = SPD_EEPROM_ADDRESS1;
- else if (ctrl_num == 1 && i == 0)
- i2c_address = SPD_EEPROM_ADDRESS2;
-
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
typedef struct {
u32 datarate_mhz_low;
u32 datarate_mhz_high;
diff --git a/board/freescale/corenet_ds/p4080ds_ddr.c b/board/freescale/corenet_ds/p4080ds_ddr.c
index 4ad89ff..844e1d7 100644
--- a/board/freescale/corenet_ds/p4080ds_ddr.c
+++ b/board/freescale/corenet_ds/p4080ds_ddr.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2009-2010 Freescale Semiconductor, Inc.
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -9,12 +9,6 @@
#include <common.h>
#include <asm/fsl_ddr_sdram.h>
-#define DATARATE_800MHZ 800000000
-#define DATARATE_900MHZ 900000000
-#define DATARATE_1000MHZ 1000000000
-#define DATARATE_1200MHZ 1200000000
-#define DATARATE_1300MHZ 1300000000
-
#define CONFIG_SYS_DDR_TIMING_3_1200 0x01030000
#define CONFIG_SYS_DDR_TIMING_0_1200 0xCC550104
#define CONFIG_SYS_DDR_TIMING_1_1200 0x868FAA45
@@ -340,17 +334,17 @@ fsl_ddr_cfg_regs_t ddr_cfg_regs_1200_2nd = {
};
fixed_ddr_parm_t fixed_ddr_parm_0[] = {
- {DATARATE_800MHZ, DATARATE_900MHZ, &ddr_cfg_regs_800},
- {DATARATE_900MHZ, DATARATE_1000MHZ, &ddr_cfg_regs_900},
- {DATARATE_1000MHZ, DATARATE_1200MHZ, &ddr_cfg_regs_1000},
- {DATARATE_1200MHZ, DATARATE_1300MHZ, &ddr_cfg_regs_1200},
+ {750, 850, &ddr_cfg_regs_800},
+ {850, 950, &ddr_cfg_regs_900},
+ {950, 1050, &ddr_cfg_regs_1000},
+ {1050, 1250, &ddr_cfg_regs_1200},
{0, 0, NULL}
};
fixed_ddr_parm_t fixed_ddr_parm_1[] = {
- {DATARATE_800MHZ, DATARATE_900MHZ, &ddr_cfg_regs_800_2nd},
- {DATARATE_900MHZ, DATARATE_1000MHZ, &ddr_cfg_regs_900_2nd},
- {DATARATE_1000MHZ, DATARATE_1200MHZ, &ddr_cfg_regs_1000_2nd},
- {DATARATE_1200MHZ, DATARATE_1300MHZ, &ddr_cfg_regs_1200_2nd},
+ {750, 850, &ddr_cfg_regs_800_2nd},
+ {850, 950, &ddr_cfg_regs_900_2nd},
+ {950, 1050, &ddr_cfg_regs_1000_2nd},
+ {1050, 1250, &ddr_cfg_regs_1200_2nd},
{0, 0, NULL}
};
diff --git a/board/freescale/mpc8536ds/config.mk b/board/freescale/mpc8536ds/config.mk
deleted file mode 100644
index 228d8c0..0000000
--- a/board/freescale/mpc8536ds/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# Copyright 2008, 2011 Freescale Semiconductor.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8536ds board
-#
-ifndef NAND_SPL
-ifeq ($(CONFIG_NAND), y)
-LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
-endif
-endif
diff --git a/board/freescale/mpc8536ds/ddr.c b/board/freescale/mpc8536ds/ddr.c
index 2bad787..d10370c 100644
--- a/board/freescale/mpc8536ds/ddr.c
+++ b/board/freescale/mpc8536ds/ddr.c
@@ -7,36 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
-}
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
-
- if (ctrl_num) {
- printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num);
- return;
- }
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS);
- }
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/freescale/mpc8540ads/ddr.c b/board/freescale/mpc8540ads/ddr.c
index 93d1100..5711374 100644
--- a/board/freescale/mpc8540ads/ddr.c
+++ b/board/freescale/mpc8540ads/ddr.c
@@ -7,40 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
-}
-
-
-unsigned int
-fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-
-void
-fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0 && i == 0) {
- i2c_address = SPD_EEPROM_ADDRESS;
- }
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/freescale/mpc8541cds/ddr.c b/board/freescale/mpc8541cds/ddr.c
index c84a6cb..78d73b0 100644
--- a/board/freescale/mpc8541cds/ddr.c
+++ b/board/freescale/mpc8541cds/ddr.c
@@ -7,36 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
-}
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0 && i == 0) {
- i2c_address = SPD_EEPROM_ADDRESS;
- }
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/freescale/mpc8544ds/ddr.c b/board/freescale/mpc8544ds/ddr.c
index b8330eb..94219b9 100644
--- a/board/freescale/mpc8544ds/ddr.c
+++ b/board/freescale/mpc8544ds/ddr.c
@@ -7,37 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
-}
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
-
- if (ctrl_num) {
- printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num);
- return;
- }
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS);
- }
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/freescale/mpc8548cds/ddr.c b/board/freescale/mpc8548cds/ddr.c
index ab64fa8..996ffe2 100644
--- a/board/freescale/mpc8548cds/ddr.c
+++ b/board/freescale/mpc8548cds/ddr.c
@@ -7,37 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
-}
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
-
- if (ctrl_num) {
- printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num);
- return;
- }
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS);
- }
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/freescale/mpc8555cds/ddr.c b/board/freescale/mpc8555cds/ddr.c
index c84a6cb..78d73b0 100644
--- a/board/freescale/mpc8555cds/ddr.c
+++ b/board/freescale/mpc8555cds/ddr.c
@@ -7,36 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
-}
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0 && i == 0) {
- i2c_address = SPD_EEPROM_ADDRESS;
- }
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/freescale/mpc8560ads/ddr.c b/board/freescale/mpc8560ads/ddr.c
index 93d1100..5711374 100644
--- a/board/freescale/mpc8560ads/ddr.c
+++ b/board/freescale/mpc8560ads/ddr.c
@@ -7,40 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
-}
-
-
-unsigned int
-fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-
-void
-fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0 && i == 0) {
- i2c_address = SPD_EEPROM_ADDRESS;
- }
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/freescale/mpc8568mds/ddr.c b/board/freescale/mpc8568mds/ddr.c
index 482fd91..b1f4f1f 100644
--- a/board/freescale/mpc8568mds/ddr.c
+++ b/board/freescale/mpc8568mds/ddr.c
@@ -7,38 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
-}
-
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
-
- if (ctrl_num) {
- printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num);
- return;
- }
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS);
- }
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/freescale/mpc8569mds/config.mk b/board/freescale/mpc8569mds/config.mk
deleted file mode 100644
index 54b2eb1..0000000
--- a/board/freescale/mpc8569mds/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# Copyright (C) 2009 Freescale Semiconductor, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8569mds board
-#
-ifndef NAND_SPL
-ifeq ($(CONFIG_NAND), y)
-LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
-endif
-endif
diff --git a/board/freescale/mpc8569mds/ddr.c b/board/freescale/mpc8569mds/ddr.c
index e3f5b4a..68f686b 100644
--- a/board/freescale/mpc8569mds/ddr.c
+++ b/board/freescale/mpc8569mds/ddr.c
@@ -7,38 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr3_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr3_spd_eeprom_t));
-}
-
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0 && i == 0)
- i2c_address = SPD_EEPROM_ADDRESS1;
- if (ctrl_num == 0 && i == 1)
- i2c_address = SPD_EEPROM_ADDRESS2;
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/freescale/mpc8572ds/config.mk b/board/freescale/mpc8572ds/config.mk
deleted file mode 100644
index 9fd30f9..0000000
--- a/board/freescale/mpc8572ds/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# Copyright 2007-2008,2010-2011 Freescale Semiconductor, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8572ds board
-#
-ifndef NAND_SPL
-ifeq ($(CONFIG_NAND), y)
-LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
-endif
-endif
diff --git a/board/freescale/mpc8572ds/ddr.c b/board/freescale/mpc8572ds/ddr.c
index cdde6ec..ab471af 100644
--- a/board/freescale/mpc8572ds/ddr.c
+++ b/board/freescale/mpc8572ds/ddr.c
@@ -7,38 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
-}
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0 && i == 0) {
- i2c_address = SPD_EEPROM_ADDRESS1;
- }
- if (ctrl_num == 1 && i == 0) {
- i2c_address = SPD_EEPROM_ADDRESS2;
- }
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
typedef struct {
u32 datarate_mhz_low;
u32 datarate_mhz_high;
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index 4b2ef4e..f444805 100644
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2007-2010 Freescale Semiconductor, Inc.
+ * Copyright 2007-2011 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -259,12 +259,3 @@ void ft_board_setup(void *blob, bd_t *bd)
#endif
}
#endif
-
-#ifdef CONFIG_MP
-extern void cpu_mp_lmb_reserve(struct lmb *lmb);
-
-void board_lmb_reserve(struct lmb *lmb)
-{
- cpu_mp_lmb_reserve(lmb);
-}
-#endif
diff --git a/board/freescale/mpc8610hpcd/ddr.c b/board/freescale/mpc8610hpcd/ddr.c
index 0117d13..94219b9 100644
--- a/board/freescale/mpc8610hpcd/ddr.c
+++ b/board/freescale/mpc8610hpcd/ddr.c
@@ -7,36 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
-}
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_bus_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0 && i == 0) {
- i2c_address = SPD_EEPROM_ADDRESS1;
- }
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/freescale/mpc8641hpcn/ddr.c b/board/freescale/mpc8641hpcn/ddr.c
index 8dc249b..bd0b299 100644
--- a/board/freescale/mpc8641hpcn/ddr.c
+++ b/board/freescale/mpc8641hpcn/ddr.c
@@ -7,45 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
-}
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_bus_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0 && i == 0) {
- i2c_address = SPD_EEPROM_ADDRESS1;
- }
- if (ctrl_num == 0 && i == 1) {
- i2c_address = SPD_EEPROM_ADDRESS2;
- }
- if (ctrl_num == 1 && i == 0) {
- i2c_address = SPD_EEPROM_ADDRESS3;
- }
- if (ctrl_num == 1 && i == 1) {
- i2c_address = SPD_EEPROM_ADDRESS4;
- }
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
typedef struct {
u32 datarate_mhz_low;
u32 datarate_mhz_high;
@@ -144,7 +109,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
/* Get clk_adjust, cpo, write_data_delay, according to the board ddr
* freqency and n_banks specified in board_specific_parameters table.
*/
- ddr_freq = fsl_ddr_get_mem_data_rate() / 1000000;
+ ddr_freq = get_ddr_freq(0) / 1000000;
for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
if (pdimm[j].n_ranks > 0) {
for (i = 0; i < num_params; i++) {
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
index 166ff0c..cd2ce4b 100644
--- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2006, 2007, 2010 Freescale Semiconductor.
+ * Copyright 2006, 2007, 2010-2011 Freescale Semiconductor.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -261,12 +261,3 @@ void board_reset(void)
while (1)
;
}
-
-#ifdef CONFIG_MP
-extern void cpu_mp_lmb_reserve(struct lmb *lmb);
-
-void board_lmb_reserve(struct lmb *lmb)
-{
- cpu_mp_lmb_reserve(lmb);
-}
-#endif
diff --git a/board/freescale/p1022ds/ddr.c b/board/freescale/p1022ds/ddr.c
index 7ecfb3e..20b996e 100644
--- a/board/freescale/p1022ds/ddr.c
+++ b/board/freescale/p1022ds/ddr.c
@@ -10,33 +10,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd, unsigned int ctrl_num)
-{
- int ret;
-
- /*
- * The P1022 has only one DDR controller, and the board has only one
- * DIMM slot.
- */
- ret = i2c_read(SPD_EEPROM_ADDRESS1, 0, 1, (u8 *)ctrl_dimms_spd,
- sizeof(ddr3_spd_eeprom_t));
- if (ret) {
- debug("DDR: failed to read SPD from address %u\n",
- SPD_EEPROM_ADDRESS1);
- memset(ctrl_dimms_spd, 0, sizeof(ddr3_spd_eeprom_t));
- }
-}
-
typedef struct {
u32 datarate_mhz_low;
u32 datarate_mhz_high;
diff --git a/board/freescale/p1022ds/diu.c b/board/freescale/p1022ds/diu.c
index 8f5305c..b37e0e2 100644
--- a/board/freescale/p1022ds/diu.c
+++ b/board/freescale/p1022ds/diu.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2010 Freescale Semiconductor, Inc.
+ * Copyright 2010-2011 Freescale Semiconductor, Inc.
* Authors: Timur Tabi <timur@freescale.com>
*
* FSL DIU Framebuffer driver
@@ -139,8 +139,6 @@ int platform_diu_init(unsigned int *xres, unsigned int *yres)
return fsl_diu_init(*xres, pixel_format, 0);
}
-#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
-
/*
* set_mux_to_lbc - disable the DIU so that we can read/write to elbc
*
@@ -211,6 +209,68 @@ static void set_mux_to_diu(void)
in_be32(&gur->pmuxcr);
}
+/*
+ * pixis_read - board-specific function to read from the PIXIS
+ *
+ * This function overrides the generic pixis_read() function, so that it can
+ * use PIXIS indirect mode if necessary.
+ */
+u8 pixis_read(unsigned int reg)
+{
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+ /* Use indirect mode if the mux is currently set to DIU mode */
+ if ((in_be32(&gur->pmuxcr) & PMUXCR_ELBCDIU_MASK) !=
+ PMUXCR_ELBCDIU_NOR16) {
+ out_8(lbc_lcs0_ba, reg);
+ return in_8(lbc_lcs1_ba);
+ } else {
+ void *p = (void *)PIXIS_BASE;
+
+ return in_8(p + reg);
+ }
+}
+
+/*
+ * pixis_write - board-specific function to write to the PIXIS
+ *
+ * This function overrides the generic pixis_write() function, so that it can
+ * use PIXIS indirect mode if necessary.
+ */
+void pixis_write(unsigned int reg, u8 value)
+{
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+ /* Use indirect mode if the mux is currently set to DIU mode */
+ if ((in_be32(&gur->pmuxcr) & PMUXCR_ELBCDIU_MASK) !=
+ PMUXCR_ELBCDIU_NOR16) {
+ out_8(lbc_lcs0_ba, reg);
+ out_8(lbc_lcs1_ba, value);
+ /* Do a read-back to ensure the write completed */
+ in_8(lbc_lcs1_ba);
+ } else {
+ void *p = (void *)PIXIS_BASE;
+
+ out_8(p + reg, value);
+ }
+}
+
+void pixis_bank_reset(void)
+{
+ /*
+ * For some reason, a PIXIS bank reset does not work if the PIXIS is
+ * in indirect mode, so switch to direct mode first.
+ */
+ set_mux_to_lbc();
+
+ out_8(&pixis->vctl, 0);
+ out_8(&pixis->vctl, 1);
+
+ while (1);
+}
+
+#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
+
void flash_write8(u8 value, void *addr)
{
int sw = set_mux_to_lbc();
diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c
index 0ea0bdf..6f20dc3 100644
--- a/board/freescale/p1022ds/p1022ds.c
+++ b/board/freescale/p1022ds/p1022ds.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2010 Freescale Semiconductor, Inc.
+ * Copyright 2010-2011 Freescale Semiconductor, Inc.
* Authors: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
* Timur Tabi <timur@freescale.com>
*
@@ -24,7 +24,6 @@
#include <fdt_support.h>
#include <tsec.h>
#include <asm/fsl_law.h>
-#include <asm/mp.h>
#include <netdev.h>
#include <i2c.h>
#include <hwconfig.h>
@@ -54,6 +53,9 @@ int checkboard(void)
u8 sw;
puts("Board: P1022DS ");
+#ifdef CONFIG_PHYS_64BIT
+ puts("(36-bit addrmap) ");
+#endif
printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver));
@@ -302,10 +304,3 @@ void ft_board_setup(void *blob, bd_t *bd)
ft_codec_setup(blob, "wlf,wm8776");
}
#endif
-
-#ifdef CONFIG_MP
-void board_lmb_reserve(struct lmb *lmb)
-{
- cpu_mp_lmb_reserve(lmb);
-}
-#endif
diff --git a/board/freescale/p1_p2_rdb/config.mk b/board/freescale/p1_p2_rdb/config.mk
deleted file mode 100644
index 0769804..0000000
--- a/board/freescale/p1_p2_rdb/config.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# Copyright 2009, 2011 Freescale Semiconductor, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# p1_p2rdb board
-#
-
-ifndef NAND_SPL
-ifeq ($(CONFIG_NAND), y)
-LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
-endif
-endif
diff --git a/board/freescale/p1_p2_rdb/ddr.c b/board/freescale/p1_p2_rdb/ddr.c
index e54fde2..71c6088 100644
--- a/board/freescale/p1_p2_rdb/ddr.c
+++ b/board/freescale/p1_p2_rdb/ddr.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2009 Freescale Semiconductor, Inc.
+ * Copyright 2009, 2011 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -30,14 +30,6 @@
DECLARE_GLOBAL_DATA_PTR;
-extern void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
- unsigned int ctrl_num);
-
-#define DATARATE_400MHZ 400000000
-#define DATARATE_533MHZ 533333333
-#define DATARATE_667MHZ 666666666
-#define DATARATE_800MHZ 800000000
-
#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003F
#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202
#define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000
@@ -82,13 +74,13 @@ extern void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
#define CONFIG_SYS_DDR_INTERVAL_667 0x0a280100
#define CONFIG_SYS_DDR_TIMING_3_800 0x00040000
-#define CONFIG_SYS_DDR_TIMING_0_800 0x55770802
+#define CONFIG_SYS_DDR_TIMING_0_800 0x00770802
#define CONFIG_SYS_DDR_TIMING_1_800 0x6f6b6543
#define CONFIG_SYS_DDR_TIMING_2_800 0x0fa074d1
#define CONFIG_SYS_DDR_CLK_CTRL_800 0x02800000
#define CONFIG_SYS_DDR_MODE_1_800 0x00040852
#define CONFIG_SYS_DDR_MODE_2_800 0x00000000
-#define CONFIG_SYS_DDR_INTERVAL_800 0x0a280100
+#define CONFIG_SYS_DDR_INTERVAL_800 0x0c300100
fsl_ddr_cfg_regs_t ddr_cfg_regs_400 = {
.cs[0].bnds = CONFIG_SYS_DDR_CS0_BNDS,
@@ -204,38 +196,47 @@ fsl_ddr_cfg_regs_t ddr_cfg_regs_800 = {
phys_size_t fixed_sdram (void)
{
- sys_info_t sysinfo;
char buf[32];
fsl_ddr_cfg_regs_t ddr_cfg_regs;
size_t ddr_size;
struct cpu_type *cpu;
+ ulong ddr_freq, ddr_freq_mhz;
+
+ cpu = gd->cpu;
+ /* P1020 and it's derivatives support max 32bit DDR width */
+ if (cpu->soc_ver == SVR_P1020 || cpu->soc_ver == SVR_P1020_E ||
+ cpu->soc_ver == SVR_P1011 || cpu->soc_ver == SVR_P1011_E) {
+ ddr_size = (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 / 2);
+ } else {
+ ddr_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
+ }
+#if defined(CONFIG_SYS_RAMBOOT)
+ return ddr_size;
+#endif
+ ddr_freq = get_ddr_freq(0);
+ ddr_freq_mhz = ddr_freq / 1000000;
- get_sys_info(&sysinfo);
printf("Configuring DDR for %s MT/s data rate\n",
- strmhz(buf, sysinfo.freqDDRBus));
+ strmhz(buf, ddr_freq));
- if(sysinfo.freqDDRBus <= DATARATE_400MHZ)
+ if(ddr_freq_mhz <= 400)
memcpy(&ddr_cfg_regs, &ddr_cfg_regs_400, sizeof(ddr_cfg_regs));
- else if(sysinfo.freqDDRBus <= DATARATE_533MHZ)
+ else if(ddr_freq_mhz <= 533)
memcpy(&ddr_cfg_regs, &ddr_cfg_regs_533, sizeof(ddr_cfg_regs));
- else if(sysinfo.freqDDRBus <= DATARATE_667MHZ)
+ else if(ddr_freq_mhz <= 667)
memcpy(&ddr_cfg_regs, &ddr_cfg_regs_667, sizeof(ddr_cfg_regs));
- else if(sysinfo.freqDDRBus <= DATARATE_800MHZ)
+ else if(ddr_freq_mhz <= 800)
memcpy(&ddr_cfg_regs, &ddr_cfg_regs_800, sizeof(ddr_cfg_regs));
else
panic("Unsupported DDR data rate %s MT/s data rate\n",
- strmhz(buf, sysinfo.freqDDRBus));
+ strmhz(buf, ddr_freq));
- cpu = gd->cpu;
/* P1020 and it's derivatives support max 32bit DDR width */
if(cpu->soc_ver == SVR_P1020 || cpu->soc_ver == SVR_P1020_E ||
cpu->soc_ver == SVR_P1011 || cpu->soc_ver == SVR_P1011_E) {
ddr_cfg_regs.ddr_sdram_cfg |= SDRAM_CFG_32_BE;
ddr_cfg_regs.cs[0].bnds = 0x0000001F;
- ddr_size = (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 / 2);
}
- else
- ddr_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
fsl_ddr_set_memctl_regs(&ddr_cfg_regs, 0);
diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c
index 0780942..307c3e2 100644
--- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c
+++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c
@@ -35,6 +35,7 @@
#include <vsc7385.h>
#include <netdev.h>
#include <rtc.h>
+#include <i2c.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -54,38 +55,25 @@ DECLARE_GLOBAL_DATA_PTR;
#define SYSCLK_MASK 0x00200000
#define BOARDREV_MASK 0x10100000
-#define BOARDREV_B 0x10100000
#define BOARDREV_C 0x00100000
#define BOARDREV_D 0x00000000
#define SYSCLK_66 66666666
-#define SYSCLK_50 50000000
#define SYSCLK_100 100000000
unsigned long get_board_sys_clk(ulong dummy)
{
volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
- u32 val_gpdat, sysclk_gpio, board_rev_gpio;
+ u32 val_gpdat, sysclk_gpio;
val_gpdat = in_be32(&pgpio->gpdat);
sysclk_gpio = val_gpdat & SYSCLK_MASK;
- board_rev_gpio = val_gpdat & BOARDREV_MASK;
- if (board_rev_gpio == BOARDREV_C) {
- if(sysclk_gpio == 0)
- return SYSCLK_66;
- else
- return SYSCLK_100;
- } else if (board_rev_gpio == BOARDREV_B) {
- if(sysclk_gpio == 0)
- return SYSCLK_66;
- else
- return SYSCLK_50;
- } else if (board_rev_gpio == BOARDREV_D) {
- if(sysclk_gpio == 0)
- return SYSCLK_66;
- else
- return SYSCLK_100;
- }
+
+ if(sysclk_gpio == 0)
+ return SYSCLK_66;
+ else
+ return SYSCLK_100;
+
return 0;
}
@@ -112,8 +100,6 @@ int checkboard (void)
board_rev_gpio = val_gpdat & BOARDREV_MASK;
if (board_rev_gpio == BOARDREV_C)
board_rev = 'C';
- else if (board_rev_gpio == BOARDREV_B)
- board_rev = 'B';
else if (board_rev_gpio == BOARDREV_D)
board_rev = 'D';
else
@@ -121,6 +107,9 @@ int checkboard (void)
cpu = gd->cpu;
printf ("Board: %sRDB Rev%c\n", cpu->name, board_rev);
+#ifdef CONFIG_PHYS_64BIT
+ puts ("(36-bit addrmap) \n");
+#endif
setbits_be32(&pgpio->gpdir, GPIO_DIR);
/*
@@ -142,6 +131,30 @@ int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ unsigned int orig_bus = i2c_get_bus_num();
+ u8 i2c_data;
+
+ i2c_set_bus_num(1);
+ if (i2c_read(CONFIG_SYS_I2C_PCA9557_ADDR, 0,
+ 1, &i2c_data, sizeof(i2c_data)) == 0) {
+ if (i2c_data & 0x2)
+ puts("NOR Flash Bank : Secondary\n");
+ else
+ puts("NOR Flash Bank : Primary\n");
+
+ if (i2c_data & 0x1) {
+ setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
+ puts("SD/MMC : 8-bit Mode\n");
+ puts("eSPI : Disabled\n");
+ } else {
+ puts("SD/MMC : 4-bit Mode\n");
+ puts("eSPI : Enabled\n");
+ }
+ } else {
+ puts("Failed reading I2C Chip 0x18 on bus 1\n");
+ }
+ i2c_set_bus_num(orig_bus);
/*
* Remap Boot flash region to caching-inhibited
@@ -229,12 +242,3 @@ void ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_memory(blob, (u64)base, (u64)size);
}
#endif
-
-#ifdef CONFIG_MP
-extern void cpu_mp_lmb_reserve(struct lmb *lmb);
-
-void board_lmb_reserve(struct lmb *lmb)
-{
- cpu_mp_lmb_reserve(lmb);
-}
-#endif
diff --git a/board/freescale/p1_p2_rdb/tlb.c b/board/freescale/p1_p2_rdb/tlb.c
index a46b1b5..1847935 100644
--- a/board/freescale/p1_p2_rdb/tlb.c
+++ b/board/freescale/p1_p2_rdb/tlb.c
@@ -25,19 +25,20 @@
struct fsl_e_tlb_entry tlb_table[] = {
/* TLB 0 - for temp stack in cache */
- SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR,
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR,
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 0, BOOKE_PAGESZ_4K, 0),
SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024 ,
- CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024,
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS + 4 * 1024,
MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 0, BOOKE_PAGESZ_4K, 0),
SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024 ,
- CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024,
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS + 8 * 1024,
MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 0, BOOKE_PAGESZ_4K, 0),
SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024 ,
- CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024,
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS + 12 * 1024,
MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 0, BOOKE_PAGESZ_4K, 0),
@@ -80,15 +81,10 @@ struct fsl_e_tlb_entry tlb_table[] = {
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 6, BOOKE_PAGESZ_1M, 1),
-#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR)
- /* *I*G - L2SRAM */
- SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 7, BOOKE_PAGESZ_256K, 1),
- SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
- CONFIG_SYS_INIT_L2_ADDR_PHYS + 0x40000,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 8, BOOKE_PAGESZ_256K, 1),
+#if defined(CONFIG_SYS_RAMBOOT)
+ SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 7, BOOKE_PAGESZ_1G, 1)
#endif
};
diff --git a/board/freescale/p2020ds/ddr.c b/board/freescale/p2020ds/ddr.c
index 9a1b075..9bf7d2f 100644
--- a/board/freescale/p2020ds/ddr.c
+++ b/board/freescale/p2020ds/ddr.c
@@ -7,34 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void get_spd(generic_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr3_spd_eeprom_t));
-}
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0 && i == 0)
- i2c_address = SPD_EEPROM_ADDRESS1;
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
typedef struct {
u32 datarate_mhz_low;
u32 datarate_mhz_high;
diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c
index 8546aa9..238b4d9 100644
--- a/board/freescale/p2020ds/p2020ds.c
+++ b/board/freescale/p2020ds/p2020ds.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2007-2010 Freescale Semiconductor, Inc.
+ * Copyright 2007-2011 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -36,7 +36,6 @@
#include <fdt_support.h>
#include <tsec.h>
#include <asm/fsl_law.h>
-#include <asm/mp.h>
#include <netdev.h>
#include "../common/ngpixis.h"
@@ -44,6 +43,19 @@
DECLARE_GLOBAL_DATA_PTR;
+int board_early_init_f(void)
+{
+#ifdef CONFIG_MMC
+ ccsr_gur_t *gur = (ccsr_gur_t *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+ setbits_be32(&gur->pmuxcr,
+ (MPC85xx_PMUXCR_SDHC_CD |
+ MPC85xx_PMUXCR_SDHC_WP));
+#endif
+
+ return 0;
+}
+
int checkboard(void)
{
u8 sw;
@@ -249,10 +261,3 @@ void ft_board_setup(void *blob, bd_t *bd)
#endif
}
#endif
-
-#ifdef CONFIG_MP
-void board_lmb_reserve(struct lmb *lmb)
-{
- cpu_mp_lmb_reserve(lmb);
-}
-#endif
diff --git a/board/freescale/p2020ds/tlb.c b/board/freescale/p2020ds/tlb.c
index 824b3b2..fd914a1 100644
--- a/board/freescale/p2020ds/tlb.c
+++ b/board/freescale/p2020ds/tlb.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2008-2009 Freescale Semiconductor, Inc.
+ * Copyright 2008-2011 Freescale Semiconductor, Inc.
*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -90,6 +90,17 @@ struct fsl_e_tlb_entry tlb_table[] = {
SET_TLB_ENTRY(1, PIXIS_BASE, PIXIS_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 8, BOOKE_PAGESZ_4K, 1),
+
+#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR)
+ /* *I*G - L2SRAM */
+ SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 9, BOOKE_PAGESZ_256K, 1),
+ SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
+ CONFIG_SYS_INIT_L2_ADDR_PHYS + 0x40000,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 10, BOOKE_PAGESZ_256K, 1),
+#endif
};
int num_tlb_entries = ARRAY_SIZE(tlb_table);
diff --git a/board/sbc8548/ddr.c b/board/sbc8548/ddr.c
index ab64fa8..996ffe2 100644
--- a/board/sbc8548/ddr.c
+++ b/board/sbc8548/ddr.c
@@ -7,37 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
-}
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
-
- if (ctrl_num) {
- printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num);
- return;
- }
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS);
- }
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/sbc8560/ddr.c b/board/sbc8560/ddr.c
index 7850794..e9babc6 100644
--- a/board/sbc8560/ddr.c
+++ b/board/sbc8560/ddr.c
@@ -7,40 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
-}
-
-
-unsigned int
-fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-
-void
-fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0 && i == 0) {
- i2c_address = SPD_EEPROM_ADDRESS;
- }
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/sbc8641d/ddr.c b/board/sbc8641d/ddr.c
index 23497f9..996ffe2 100644
--- a/board/sbc8641d/ddr.c
+++ b/board/sbc8641d/ddr.c
@@ -7,45 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
-}
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_bus_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0 && i == 0) {
- i2c_address = SPD_EEPROM_ADDRESS1;
- }
- if (ctrl_num == 0 && i == 1) {
- i2c_address = SPD_EEPROM_ADDRESS2;
- }
- if (ctrl_num == 1 && i == 0) {
- i2c_address = SPD_EEPROM_ADDRESS3;
- }
- if (ctrl_num == 1 && i == 1) {
- i2c_address = SPD_EEPROM_ADDRESS4;
- }
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c
index 5c30b26..dd58541 100644
--- a/board/sbc8641d/sbc8641d.c
+++ b/board/sbc8641d/sbc8641d.c
@@ -273,12 +273,3 @@ void board_reset(void)
__asm__ __volatile__ ("rfi");
#endif
}
-
-#ifdef CONFIG_MP
-extern void cpu_mp_lmb_reserve(struct lmb *lmb);
-
-void board_lmb_reserve(struct lmb *lmb)
-{
- cpu_mp_lmb_reserve(lmb);
-}
-#endif
diff --git a/board/socrates/ddr.c b/board/socrates/ddr.c
index 2b62b84..e9db476 100644
--- a/board/socrates/ddr.c
+++ b/board/socrates/ddr.c
@@ -7,37 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
-}
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
-
- if (ctrl_num) {
- printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num);
- return;
- }
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS);
- }
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/stx/stxgp3/ddr.c b/board/stx/stxgp3/ddr.c
index 93d1100..5711374 100644
--- a/board/stx/stxgp3/ddr.c
+++ b/board/stx/stxgp3/ddr.c
@@ -7,40 +7,10 @@
*/
#include <common.h>
-#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
-}
-
-
-unsigned int
-fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-
-void
-fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0 && i == 0) {
- i2c_address = SPD_EEPROM_ADDRESS;
- }
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/stx/stxssa/ddr.c b/board/stx/stxssa/ddr.c
index 93d1100..56c87b2 100644
--- a/board/stx/stxssa/ddr.c
+++ b/board/stx/stxssa/ddr.c
@@ -12,35 +12,6 @@
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
-{
- i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
-}
-
-
-unsigned int
-fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-
-void
-fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0 && i == 0) {
- i2c_address = SPD_EEPROM_ADDRESS;
- }
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/xes/xpedite517x/ddr.c b/board/xes/xpedite517x/ddr.c
index 1d57d09..3a6e297 100644
--- a/board/xes/xpedite517x/ddr.c
+++ b/board/xes/xpedite517x/ddr.c
@@ -26,40 +26,12 @@
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
+void get_spd(ddr2_spd_eeprom_t *spd, u8 i2c_address)
{
i2c_read(i2c_address, SPD_EEPROM_OFFSET, 2, (uchar *)spd,
sizeof(ddr2_spd_eeprom_t));
}
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_bus_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0) {
- i2c_address = SPD_EEPROM_ADDRESS1;
-#ifdef SPD_EEPROM_ADDRESS2
- } else if (ctrl_num == 1) {
- i2c_address = SPD_EEPROM_ADDRESS2;
-#endif
- } else {
- /* An inalid ctrl number was give, use default SPD */
- printf("ERROR: invalid DDR ctrl: %d\n", ctrl_num);
- i2c_address = SPD_EEPROM_ADDRESS1;
- }
-
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
/*
* There are four board-specific SDRAM timing parameters which must be
* calculated based on the particular PCB artwork. These are:
@@ -144,7 +116,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
unsigned int datarate;
get_sys_info(&sysinfo);
- datarate = fsl_ddr_get_mem_data_rate() / 1000000;
+ datarate = get_ddr_freq(0) / 1000000;
for (i = 0; i < ARRAY_SIZE(bopts_ctrl[ctrl_num]); i++) {
if ((bopts[i].datarate_mhz_low <= datarate) &&
diff --git a/board/xes/xpedite517x/xpedite517x.c b/board/xes/xpedite517x/xpedite517x.c
index 61443aa..179b238 100644
--- a/board/xes/xpedite517x/xpedite517x.c
+++ b/board/xes/xpedite517x/xpedite517x.c
@@ -93,12 +93,3 @@ void ft_board_setup(void *blob, bd_t *bd)
ft_cpu_setup(blob, bd);
}
#endif
-
-#ifdef CONFIG_MP
-extern void cpu_mp_lmb_reserve(struct lmb *lmb);
-
-void board_lmb_reserve(struct lmb *lmb)
-{
- cpu_mp_lmb_reserve(lmb);
-}
-#endif
diff --git a/board/xes/xpedite520x/ddr.c b/board/xes/xpedite520x/ddr.c
index c5616d5..3671cb8 100644
--- a/board/xes/xpedite520x/ddr.c
+++ b/board/xes/xpedite520x/ddr.c
@@ -12,8 +12,7 @@
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void
-get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
+void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
@@ -27,25 +26,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
}
}
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
-
- if (ctrl_num) {
- printf("%s: invalid ctrl_num = %d\n", __func__, ctrl_num);
- return;
- }
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++)
- get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS);
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/xes/xpedite537x/ddr.c b/board/xes/xpedite537x/ddr.c
index 4d3f255..d0662b0 100644
--- a/board/xes/xpedite537x/ddr.c
+++ b/board/xes/xpedite537x/ddr.c
@@ -27,32 +27,12 @@
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
+void get_spd(ddr2_spd_eeprom_t *spd, u8 i2c_address)
{
i2c_read(i2c_address, SPD_EEPROM_OFFSET, 2, (uchar *)spd,
sizeof(ddr2_spd_eeprom_t));
}
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
-void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0)
- i2c_address = SPD_EEPROM_ADDRESS1;
- if (ctrl_num == 1)
- i2c_address = SPD_EEPROM_ADDRESS2;
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
/*
* There are four board-specific SDRAM timing parameters which must be
* calculated based on the particular PCB artwork. These are:
diff --git a/board/xes/xpedite537x/xpedite537x.c b/board/xes/xpedite537x/xpedite537x.c
index d074495..9d9afae 100644
--- a/board/xes/xpedite537x/xpedite537x.c
+++ b/board/xes/xpedite537x/xpedite537x.c
@@ -96,12 +96,3 @@ void ft_board_setup(void *blob, bd_t *bd)
ft_cpu_setup(blob, bd);
}
#endif
-
-#ifdef CONFIG_MP
-extern void cpu_mp_lmb_reserve(struct lmb *lmb);
-
-void board_lmb_reserve(struct lmb *lmb)
-{
- cpu_mp_lmb_reserve(lmb);
-}
-#endif
diff --git a/board/xes/xpedite550x/ddr.c b/board/xes/xpedite550x/ddr.c
index 38a4597..3b6e08b 100644
--- a/board/xes/xpedite550x/ddr.c
+++ b/board/xes/xpedite550x/ddr.c
@@ -27,30 +27,12 @@
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
-static void get_spd(ddr3_spd_eeprom_t *spd, unsigned char i2c_address)
+void get_spd(ddr3_spd_eeprom_t *spd, u8 i2c_address)
{
i2c_read(i2c_address, SPD_EEPROM_OFFSET, 2, (uchar *)spd,
sizeof(ddr3_spd_eeprom_t));
}
-void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd,
- unsigned int ctrl_num)
-{
- unsigned int i;
- unsigned int i2c_address = 0;
-
- for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
- if (ctrl_num == 0 && i == 0)
- i2c_address = SPD_EEPROM_ADDRESS1;
- get_spd(&(ctrl_dimms_spd[i]), i2c_address);
- }
-}
-
-unsigned int fsl_ddr_get_mem_data_rate(void)
-{
- return get_ddr_freq(0);
-}
-
/*
* There are traditionally three board-specific SDRAM timing parameters
* which must be calculated based on the particular PCB artwork. These are:
diff --git a/board/xes/xpedite550x/xpedite550x.c b/board/xes/xpedite550x/xpedite550x.c
index 6f91c83..24b2b0e 100644
--- a/board/xes/xpedite550x/xpedite550x.c
+++ b/board/xes/xpedite550x/xpedite550x.c
@@ -96,12 +96,3 @@ void ft_board_setup(void *blob, bd_t *bd)
ft_cpu_setup(blob, bd);
}
#endif
-
-#ifdef CONFIG_MP
-extern void cpu_mp_lmb_reserve(struct lmb *lmb);
-
-void board_lmb_reserve(struct lmb *lmb)
-{
- cpu_mp_lmb_reserve(lmb);
-}
-#endif