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path: root/cpu/mpc5xxx/pci_mpc5200.c
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Diffstat (limited to 'cpu/mpc5xxx/pci_mpc5200.c')
-rw-r--r--cpu/mpc5xxx/pci_mpc5200.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/cpu/mpc5xxx/pci_mpc5200.c b/cpu/mpc5xxx/pci_mpc5200.c
index 2f01d5c..a3251ab 100644
--- a/cpu/mpc5xxx/pci_mpc5200.c
+++ b/cpu/mpc5xxx/pci_mpc5200.c
@@ -31,8 +31,8 @@
#include <mpc5xxx.h>
/* System RAM mapped over PCI */
-#define CONFIG_PCI_MEMORY_BUS CFG_SDRAM_BASE
-#define CONFIG_PCI_MEMORY_PHYS CFG_SDRAM_BASE
+#define CONFIG_PCI_MEMORY_BUS CONFIG_SYS_SDRAM_BASE
+#define CONFIG_PCI_MEMORY_PHYS CONFIG_SYS_SDRAM_BASE
#define CONFIG_PCI_MEMORY_SIZE (1024 * 1024 * 1024)
/* PCIIWCR bit fields */
@@ -125,11 +125,11 @@ void pci_mpc5xxx_init (struct pci_controller *hose)
/* Set cache line size */
*(vu_long *)MPC5XXX_PCI_CFG = (*(vu_long *)MPC5XXX_PCI_CFG & ~0xff) |
- (CFG_CACHELINE_SIZE / 4);
+ (CONFIG_SYS_CACHELINE_SIZE / 4);
/* Map MBAR to PCI space */
- *(vu_long *)MPC5XXX_PCI_BAR0 = CFG_MBAR;
- *(vu_long *)MPC5XXX_PCI_TBATR0 = CFG_MBAR | 1;
+ *(vu_long *)MPC5XXX_PCI_BAR0 = CONFIG_SYS_MBAR;
+ *(vu_long *)MPC5XXX_PCI_TBATR0 = CONFIG_SYS_MBAR | 1;
/* Map RAM to PCI space */
*(vu_long *)MPC5XXX_PCI_BAR1 = CONFIG_PCI_MEMORY_BUS | (1 << 3);