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-rw-r--r--cpu/mpc85xx/Makefile4
-rw-r--r--cpu/mpc85xx/release.S12
-rw-r--r--cpu/mpc85xx/start.S14
3 files changed, 25 insertions, 5 deletions
diff --git a/cpu/mpc85xx/Makefile b/cpu/mpc85xx/Makefile
index 56de7eb..f064fee 100644
--- a/cpu/mpc85xx/Makefile
+++ b/cpu/mpc85xx/Makefile
@@ -50,7 +50,11 @@ COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
COBJS-$(CONFIG_MPC8569) += ddr-gen3.o
COBJS-$(CONFIG_P1011) += ddr-gen3.o
+COBJS-$(CONFIG_P1012) += ddr-gen3.o
+COBJS-$(CONFIG_P1013) += ddr-gen3.o
COBJS-$(CONFIG_P1020) += ddr-gen3.o
+COBJS-$(CONFIG_P1021) += ddr-gen3.o
+COBJS-$(CONFIG_P1022) += ddr-gen3.o
COBJS-$(CONFIG_P2010) += ddr-gen3.o
COBJS-$(CONFIG_P2020) += ddr-gen3.o
COBJS-$(CONFIG_PPC_P4080) += ddr-gen3.o
diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S
index dab784e..0b5b9da 100644
--- a/cpu/mpc85xx/release.S
+++ b/cpu/mpc85xx/release.S
@@ -1,5 +1,5 @@
/*
- * Copyright 2008-2009 Freescale Semiconductor, Inc.
+ * Copyright 2008-2010 Freescale Semiconductor, Inc.
* Kumar Gala <kumar.gala@freescale.com>
*
* See file CREDITS for list of people who contributed to this
@@ -57,11 +57,19 @@ __secondary_start_page:
#ifndef CONFIG_E500MC
li r3,(HID1_ASTME|HID1_ABE)@l /* Addr streaming & broadcast */
+ mfspr r0,PVR
+ andi. r0,r0,0xff
+ cmpwi r0,0x50@l /* if we are rev 5.0 or greater set MBDD */
+ blt 1f
+ /* Set MBDD bit also */
+ ori r3, r3, HID1_MBDD@l
+1:
mtspr SPRN_HID1,r3
#endif
/* Enable branch prediction */
- li r3,0x201
+ lis r3,BUCSR_ENABLE@h
+ ori r3,r3,BUCSR_ENABLE@l
mtspr SPRN_BUCSR,r3
/* Ensure TB is 0 */
diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index af18c1c..b3cb56a 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -1,5 +1,5 @@
/*
- * Copyright 2004, 2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2004, 2007-2010 Freescale Semiconductor, Inc.
* Copyright (C) 2003 Motorola,Inc.
*
* See file CREDITS for list of people who contributed to this
@@ -208,13 +208,21 @@ _start_e500:
#ifndef CONFIG_E500MC
li r0,(HID1_ASTME|HID1_ABE)@l /* Addr streaming & broadcast */
+ mfspr r3,PVR
+ andi. r3,r3, 0xff
+ cmpwi r3,0x50@l /* if we are rev 5.0 or greater set MBDD */
+ blt 1f
+ /* Set MBDD bit also */
+ ori r0, r0, HID1_MBDD@l
+1:
mtspr HID1,r0
#endif
/* Enable Branch Prediction */
#if defined(CONFIG_BTB)
- li r0,0x201 /* BBFI = 1, BPEN = 1 */
- mtspr BUCSR,r0
+ lis r0,BUCSR_ENABLE@h
+ ori r0,r0,BUCSR_ENABLE@l
+ mtspr SPRN_BUCSR,r0
#endif
#if defined(CONFIG_SYS_INIT_DBCR)