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path: root/drivers/mtd/spi/sf_ops.c
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Diffstat (limited to 'drivers/mtd/spi/sf_ops.c')
-rw-r--r--drivers/mtd/spi/sf_ops.c138
1 files changed, 65 insertions, 73 deletions
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index 900ec1f..f2a9244 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -41,6 +41,20 @@ int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
return 0;
}
+static int read_fsr(struct spi_flash *flash, u8 *fsr)
+{
+ int ret;
+ const u8 cmd = CMD_FLAG_STATUS;
+
+ ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1);
+ if (ret < 0) {
+ debug("SF: fail to read flag status register\n");
+ return ret;
+ }
+
+ return 0;
+}
+
int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
{
u8 cmd;
@@ -95,15 +109,14 @@ int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
#endif
#ifdef CONFIG_SPI_FLASH_BAR
-static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
+static int spi_flash_write_bank(struct spi_flash *flash, u32 offset)
{
- u8 cmd;
+ u8 cmd, bank_sel;
int ret;
- if (flash->bank_curr == bank_sel) {
- debug("SF: not require to enable bank%d\n", bank_sel);
- return 0;
- }
+ bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
+ if (bank_sel == flash->bank_curr)
+ goto bar_end;
cmd = flash->bank_write_cmd;
ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
@@ -111,25 +124,10 @@ static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
debug("SF: fail to write bank register\n");
return ret;
}
- flash->bank_curr = bank_sel;
-
- return 0;
-}
-
-static int spi_flash_bank(struct spi_flash *flash, u32 offset)
-{
- u8 bank_sel;
- int ret;
- bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
-
- ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
- if (ret) {
- debug("SF: fail to set bank%d\n", bank_sel);
- return ret;
- }
-
- return bank_sel;
+bar_end:
+ flash->bank_curr = bank_sel;
+ return flash->bank_curr;
}
#endif
@@ -155,72 +153,65 @@ static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr)
}
#endif
-static int spi_flash_poll_status(struct spi_slave *spi, unsigned long timeout,
- u8 cmd, u8 poll_bit)
+static int spi_flash_sr_ready(struct spi_flash *flash)
{
- unsigned long timebase;
- unsigned long flags = SPI_XFER_BEGIN;
+ u8 sr;
int ret;
- u8 status;
- u8 check_status = 0x0;
- if (cmd == CMD_FLAG_STATUS)
- check_status = poll_bit;
-
-#ifdef CONFIG_SF_DUAL_FLASH
- if (spi->flags & SPI_XFER_U_PAGE)
- flags |= SPI_XFER_U_PAGE;
-#endif
- ret = spi_xfer(spi, 8, &cmd, NULL, flags);
- if (ret) {
- debug("SF: fail to read %s status register\n",
- cmd == CMD_READ_STATUS ? "read" : "flag");
+ ret = spi_flash_cmd_read_status(flash, &sr);
+ if (ret < 0)
return ret;
- }
- timebase = get_timer(0);
- do {
- WATCHDOG_RESET();
+ return !(sr & STATUS_WIP);
+}
- ret = spi_xfer(spi, 8, NULL, &status, 0);
- if (ret)
- return -1;
+static int spi_flash_fsr_ready(struct spi_flash *flash)
+{
+ u8 fsr;
+ int ret;
- if ((status & poll_bit) == check_status)
- break;
+ ret = read_fsr(flash, &fsr);
+ if (ret < 0)
+ return ret;
- } while (get_timer(timebase) < timeout);
+ return fsr & STATUS_PEC;
+}
- spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
+static int spi_flash_ready(struct spi_flash *flash)
+{
+ int sr, fsr;
- if ((status & poll_bit) == check_status)
- return 0;
+ sr = spi_flash_sr_ready(flash);
+ if (sr < 0)
+ return sr;
- /* Timed out */
- debug("SF: time out!\n");
- return -1;
+ fsr = 1;
+ if (flash->flags & SNOR_F_USE_FSR) {
+ fsr = spi_flash_fsr_ready(flash);
+ if (fsr < 0)
+ return fsr;
+ }
+
+ return sr && fsr;
}
int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
{
- struct spi_slave *spi = flash->spi;
- int ret;
- u8 poll_bit = STATUS_WIP;
- u8 cmd = CMD_READ_STATUS;
+ int timebase, ret;
- ret = spi_flash_poll_status(spi, timeout, cmd, poll_bit);
- if (ret < 0)
- return ret;
+ timebase = get_timer(0);
- if (flash->poll_cmd == CMD_FLAG_STATUS) {
- poll_bit = STATUS_PEC;
- cmd = CMD_FLAG_STATUS;
- ret = spi_flash_poll_status(spi, timeout, cmd, poll_bit);
+ while (get_timer(timebase) < timeout) {
+ ret = spi_flash_ready(flash);
if (ret < 0)
return ret;
+ if (ret)
+ return 0;
}
- return 0;
+ printf("SF: Timeout!\n");
+
+ return -ETIMEDOUT;
}
int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
@@ -285,7 +276,7 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
spi_flash_dual_flash(flash, &erase_addr);
#endif
#ifdef CONFIG_SPI_FLASH_BAR
- ret = spi_flash_bank(flash, erase_addr);
+ ret = spi_flash_write_bank(flash, erase_addr);
if (ret < 0)
return ret;
#endif
@@ -327,7 +318,7 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
spi_flash_dual_flash(flash, &write_addr);
#endif
#ifdef CONFIG_SPI_FLASH_BAR
- ret = spi_flash_bank(flash, write_addr);
+ ret = spi_flash_write_bank(flash, write_addr);
if (ret < 0)
return ret;
#endif
@@ -422,9 +413,10 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
spi_flash_dual_flash(flash, &read_addr);
#endif
#ifdef CONFIG_SPI_FLASH_BAR
- bank_sel = spi_flash_bank(flash, read_addr);
- if (bank_sel < 0)
+ ret = spi_flash_write_bank(flash, read_addr);
+ if (ret < 0)
return ret;
+ bank_sel = flash->bank_curr;
#endif
remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
(bank_sel + 1)) - offset;