diff options
Diffstat (limited to 'drivers/mtd/spi/spi_flash.c')
| -rw-r--r-- | drivers/mtd/spi/spi_flash.c | 190 |
1 files changed, 188 insertions, 2 deletions
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index ba9aee6..3a11955 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -16,7 +16,9 @@ #include <spi.h> #include <spi_flash.h> #include <linux/log2.h> +#include <linux/sizes.h> #include <dma.h> +#include <../drivers/spi/fsl_qspi.h> #include "sf_internal.h" @@ -548,7 +550,174 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, return ret; } + #ifdef CONFIG_SPI_FLASH_SST +static bool sst26_process_bpr(u32 bpr_size, u8 *cmd, u32 bit, enum lock_ctl ctl) +{ + switch (ctl) { + case SST26_CTL_LOCK: + cmd[bpr_size - (bit / 8) - 1] |= BIT(bit % 8); + break; + case SST26_CTL_UNLOCK: + cmd[bpr_size - (bit / 8) - 1] &= ~BIT(bit % 8); + break; + case SST26_CTL_CHECK: + return !!(cmd[bpr_size - (bit / 8) - 1] & BIT(bit % 8)); + } + + return false; +} + +/* + * sst26wf016/sst26wf032/sst26wf064 have next block protection: + * 4x - 8 KByte blocks - read & write protection bits - upper addresses + * 1x - 32 KByte blocks - write protection bits + * rest - 64 KByte blocks - write protection bits + * 1x - 32 KByte blocks - write protection bits + * 4x - 8 KByte blocks - read & write protection bits - lower addresses + * + * We'll support only per 64k lock/unlock so lower and upper 64 KByte region + * will be treated as single block. + */ + +/* + * Lock, unlock or check lock status of the flash region of the flash (depending + * on the lock_ctl value) + */ +static int sst26_lock_ctl(struct spi_flash *flash, u32 ofs, size_t len, enum lock_ctl ctl) +{ + u32 i, bpr_ptr, rptr_64k, lptr_64k, bpr_size; + bool lower_64k = false, upper_64k = false; + u8 cmd, bpr_buff[SST26_MAX_BPR_REG_LEN] = {}; + int ret; + + /* Check length and offset for 64k alignment */ + if ((ofs & (SZ_64K - 1)) || (len & (SZ_64K - 1))) { + printf("Offset or lenght not allighned\n"); + return -EINVAL; + } + + if (ofs + len > flash->size) { + printf("Size exceeding flash size\n"); + return -EINVAL; + } + + /* SST26 family has only 4Mbit, 8Mbit, 16 Mbit, 32 Mbit and 64 Mbit IC */ + if (flash->size != SZ_512K && + flash->size != SZ_1M && + flash->size != SZ_2M && + flash->size != SZ_4M && + flash->size != SZ_8M) + return -EINVAL; + + bpr_size = 2 + (flash->size / SZ_64K / 8); + + cmd = SST26_CMD_READ_BPR; + ret = spi_flash_read_common(flash, &cmd, 1, bpr_buff, bpr_size); + if (ret < 0) { + printf("SF: fail to read block-protection register\n"); + return ret; + } + + rptr_64k = min_t(u32, ofs + len , flash->size - SST26_BOUND_REG_SIZE); + lptr_64k = max_t(u32, ofs, SST26_BOUND_REG_SIZE); + + upper_64k = ((ofs + len) > (flash->size - SST26_BOUND_REG_SIZE)); + lower_64k = (ofs < SST26_BOUND_REG_SIZE); + + /* Lower bits in block-protection register are about 64k region */ + bpr_ptr = lptr_64k / SZ_64K - 1; + + /* Process 64K blocks region */ + while (lptr_64k < rptr_64k) { + if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl)) + return EACCES; + + bpr_ptr++; + lptr_64k += SZ_64K; + } + + /* 32K and 8K region bits in BPR are after 64k region bits */ + bpr_ptr = (flash->size - 2 * SST26_BOUND_REG_SIZE) / SZ_64K; + + /* Process lower 32K block region */ + if (lower_64k) + if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl)) + return EACCES; + + bpr_ptr++; + + /* Process upper 32K block region */ + if (upper_64k) + if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl)) + return EACCES; + + bpr_ptr++; + + /* Process lower 8K block regions */ + for (i = 0; i < SST26_BPR_8K_NUM; i++) { + if (lower_64k) + if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl)) + return EACCES; + + /* In 8K area BPR has both read and write protection bits */ + bpr_ptr += 2; + } + + /* Process upper 8K block regions */ + for (i = 0; i < SST26_BPR_8K_NUM; i++) { + if (upper_64k) + if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl)) + return EACCES; + + /* In 8K area BPR has both read and write protection bits */ + bpr_ptr += 2; + } + + /* If we check region status we don't need to write BPR back */ + if (ctl == SST26_CTL_CHECK) + return 0; + + cmd = SST26_CMD_WRITE_BPR; + ret = spi_flash_write_common(flash, &cmd, 1, bpr_buff, bpr_size); + if (ret < 0) { + printf("SF: fail to write block-protection register\n"); + return ret; + } + + return 0; +} +#endif + +static int sst26_unlock(struct spi_flash *flash, u32 ofs, size_t len) +{ + return sst26_lock_ctl(flash, ofs, len, SST26_CTL_UNLOCK); +} + + +static int sst26_lock(struct spi_flash *flash, u32 ofs, size_t len) +{ + return sst26_lock_ctl(flash, ofs, len, SST26_CTL_LOCK); +} + +/* + * Returns EACCES (positive value) if region is locked, 0 if region is unlocked, + * and negative on errors. + */ +static int sst26_is_locked(struct spi_flash *flash, u32 ofs, size_t len) +{ + /* + * is_locked function is used for check before reading or erasing flash + * region, so offset and length might be not 64k allighned, so adjust + * them to be 64k allighned as sst26_lock_ctl works only with 64k + * allighned regions. + */ + ofs -= ofs & (SZ_64K - 1); + len = len & (SZ_64K - 1) ? (len & ~(SZ_64K - 1)) + SZ_64K : len; + + return sst26_lock_ctl(flash, ofs, len, SST26_CTL_CHECK); +} + static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf) { struct spi_slave *spi = flash->spi; @@ -673,7 +842,7 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, spi_release_bus(spi); return ret; } -#endif + #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs, @@ -1039,6 +1208,14 @@ int spi_flash_scan(struct spi_flash *flash) flash->flash_unlock = stm_unlock; flash->flash_is_locked = stm_is_locked; } +/* sst26wf series block protection implementation differs from other series */ +#if defined(CONFIG_SPI_FLASH_SST) + if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST && info->id[1] == 0x26) { + flash->flash_lock = sst26_lock; + flash->flash_unlock = sst26_unlock; + flash->flash_is_locked = sst26_is_locked; +#endif + } #endif /* Compute the flash size */ @@ -1058,6 +1235,12 @@ int spi_flash_scan(struct spi_flash *flash) flash->page_size <<= flash->shift; flash->sector_size = info->sector_size << flash->shift; flash->size = flash->sector_size * info->n_sectors << flash->shift; + + /* update fsl qspi driver LUT for new flash size at runtime */ + if(strcmp(flash->dev->parent->name, "quadspi@1550000") == 0) { + fsl_qspi_update_lut(flash->dev->parent->priv, flash->size); + } + #ifdef CONFIG_SF_DUAL_FLASH if (flash->dual_flash & SF_DUAL_STACKED_FLASH) flash->size <<= 1; @@ -1070,7 +1253,10 @@ int spi_flash_scan(struct spi_flash *flash) flash->erase_size = 4096 << flash->shift; } else #endif - { + if (info->flags & SECT_4K_ONLY) { + flash->erase_cmd = CMD_ERASE_4K; + flash->erase_size = 4096 << flash->shift; + } else { flash->erase_cmd = CMD_ERASE_64K; flash->erase_size = flash->sector_size; } |