diff options
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/pci-uclass.c | 26 | ||||
| -rw-r--r-- | drivers/pci/pci_indirect.c | 17 | ||||
| -rw-r--r-- | drivers/pci/pcie_dw_mvebu.c | 4 | ||||
| -rw-r--r-- | drivers/pci/pcie_layerscape.c | 4 | ||||
| -rw-r--r-- | drivers/pci/pcie_layerscape_fixup.c | 3 |
5 files changed, 22 insertions, 32 deletions
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 504d7e3..b36ef33 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -8,12 +8,11 @@ #include <common.h> #include <dm.h> #include <errno.h> -#include <fdtdec.h> #include <inttypes.h> #include <pci.h> #include <asm/io.h> -#include <dm/lists.h> #include <dm/device-internal.h> +#include <dm/lists.h> #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP) #include <asm/fsp/fsp_support.h> #endif @@ -754,8 +753,8 @@ error: return ret; } -static int decode_regions(struct pci_controller *hose, const void *blob, - int parent_node, int node) +static int decode_regions(struct pci_controller *hose, ofnode parent_node, + ofnode node) { int pci_addr_cells, addr_cells, size_cells; phys_addr_t base = 0, size; @@ -764,12 +763,12 @@ static int decode_regions(struct pci_controller *hose, const void *blob, int len; int i; - prop = fdt_getprop(blob, node, "ranges", &len); + prop = ofnode_read_prop(node, "ranges", &len); if (!prop) return -EINVAL; - pci_addr_cells = fdt_address_cells(blob, node); - addr_cells = fdt_address_cells(blob, parent_node); - size_cells = fdt_size_cells(blob, node); + pci_addr_cells = ofnode_read_addr_cells(node); + addr_cells = ofnode_read_addr_cells(parent_node); + size_cells = ofnode_read_size_cells(node); /* PCI addresses are always 3-cells */ len /= sizeof(u32); @@ -841,9 +840,8 @@ static int pci_uclass_pre_probe(struct udevice *bus) /* For bridges, use the top-level PCI controller */ if (!device_is_on_pci_bus(bus)) { hose->ctlr = bus; - ret = decode_regions(hose, gd->fdt_blob, - dev_of_offset(bus->parent), - dev_of_offset(bus)); + ret = decode_regions(hose, dev_ofnode(bus->parent), + dev_ofnode(bus)); if (ret) { debug("%s: Cannot decode regions\n", __func__); return ret; @@ -906,7 +904,7 @@ static int pci_uclass_child_post_bind(struct udevice *dev) struct fdt_pci_addr addr; int ret; - if (dev_of_offset(dev) == -1) + if (!dev_of_valid(dev)) return 0; /* @@ -914,8 +912,8 @@ static int pci_uclass_child_post_bind(struct udevice *dev) * just check the address. */ pplat = dev_get_parent_platdata(dev); - ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev), - FDT_PCI_SPACE_CONFIG, "reg", &addr); + ret = ofnode_read_pci_addr(dev_ofnode(dev), FDT_PCI_SPACE_CONFIG, "reg", + &addr); if (ret) { if (ret != -ENOENT) diff --git a/drivers/pci/pci_indirect.c b/drivers/pci/pci_indirect.c index aee0bd6..efa13a2 100644 --- a/drivers/pci/pci_indirect.c +++ b/drivers/pci/pci_indirect.c @@ -17,22 +17,7 @@ #define cfg_read(val, addr, type, op) *val = op((type)(addr)) #define cfg_write(val, addr, type, op) op((type *)(addr), (val)) -#if defined(CONFIG_MPC8260) -#define INDIRECT_PCI_OP(rw, size, type, op, mask) \ -static int \ -indirect_##rw##_config_##size(struct pci_controller *hose, \ - pci_dev_t dev, int offset, type val) \ -{ \ - u32 b, d,f; \ - b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \ - b = b - hose->first_busno; \ - dev = PCI_BDF(b, d, f); \ - out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \ - sync(); \ - cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ - return 0; \ -} -#elif defined(CONFIG_E500) || defined(CONFIG_MPC86xx) +#if defined(CONFIG_E500) || defined(CONFIG_MPC86xx) #define INDIRECT_PCI_OP(rw, size, type, op, mask) \ static int \ indirect_##rw##_config_##size(struct pci_controller *hose, \ diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c index 05a0660..202cfe9 100644 --- a/drivers/pci/pcie_dw_mvebu.c +++ b/drivers/pci/pcie_dw_mvebu.c @@ -521,12 +521,12 @@ static int pcie_dw_mvebu_ofdata_to_platdata(struct udevice *dev) struct pcie_dw_mvebu *pcie = dev_get_priv(dev); /* Get the controller base address */ - pcie->ctrl_base = (void *)dev_get_addr_index(dev, 0); + pcie->ctrl_base = (void *)devfdt_get_addr_index(dev, 0); if ((fdt_addr_t)pcie->ctrl_base == FDT_ADDR_T_NONE) return -EINVAL; /* Get the config space base address and size */ - pcie->cfg_base = (void *)dev_get_addr_size_index(dev, 1, + pcie->cfg_base = (void *)devfdt_get_addr_size_index(dev, 1, &pcie->cfg_size); if ((fdt_addr_t)pcie->cfg_base == FDT_ADDR_T_NONE) return -EINVAL; diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index 7565e2f..78cde21 100644 --- a/drivers/pci/pcie_layerscape.c +++ b/drivers/pci/pcie_layerscape.c @@ -13,6 +13,10 @@ #include <errno.h> #include <malloc.h> #include <dm.h> +#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) || \ + defined(CONFIG_ARM) +#include <asm/arch/clock.h> +#endif #include "pcie_layerscape.h" DECLARE_GLOBAL_DATA_PTR; diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c index ce709bf..9e6c2f5 100644 --- a/drivers/pci/pcie_layerscape_fixup.c +++ b/drivers/pci/pcie_layerscape_fixup.c @@ -14,6 +14,9 @@ #ifdef CONFIG_OF_BOARD_SETUP #include <libfdt.h> #include <fdt_support.h> +#ifdef CONFIG_ARM +#include <asm/arch/clock.h> +#endif #include "pcie_layerscape.h" #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2) |