diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpio/Kconfig | 8 | ||||
| -rw-r--r-- | drivers/i2c/fsl_i2c.c | 9 | ||||
| -rw-r--r-- | drivers/i2c/fti2c010.c | 9 | ||||
| -rw-r--r-- | drivers/i2c/mxc_i2c.c | 4 | ||||
| -rw-r--r-- | drivers/i2c/omap24xx_i2c.c | 6 | ||||
| -rw-r--r-- | drivers/power/Kconfig | 1 | ||||
| -rw-r--r-- | drivers/serial/ns16550.c | 10 | ||||
| -rw-r--r-- | drivers/spi/omap3_spi.c | 3 | ||||
| -rw-r--r-- | drivers/usb/host/Kconfig | 19 | ||||
| -rw-r--r-- | drivers/usb/host/Makefile | 2 | ||||
| -rw-r--r-- | drivers/usb/musb-new/linux-compat.h | 2 | ||||
| -rw-r--r-- | drivers/usb/musb-new/omap2430.c | 2 | ||||
| -rw-r--r-- | drivers/usb/musb/omap3.c | 6 | ||||
| -rw-r--r-- | drivers/usb/musb/omap3.h | 2 | ||||
| -rw-r--r-- | drivers/video/Kconfig | 9 | ||||
| -rw-r--r-- | drivers/video/Makefile | 1 | ||||
| -rw-r--r-- | drivers/video/dw_hdmi.c | 31 | ||||
| -rw-r--r-- | drivers/video/rockchip/Kconfig | 1 | ||||
| -rw-r--r-- | drivers/video/rockchip/Makefile | 2 | ||||
| -rw-r--r-- | drivers/video/sunxi/Makefile | 2 | ||||
| -rw-r--r-- | drivers/video/sunxi/sunxi_display.c | 73 | ||||
| -rw-r--r-- | drivers/video/sunxi/tve.c | 86 | ||||
| -rw-r--r-- | drivers/video/video_bmp.c | 4 | ||||
| -rw-r--r-- | drivers/watchdog/Kconfig | 8 |
24 files changed, 172 insertions, 128 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 325d053..15135e5 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -95,6 +95,14 @@ config MSM_GPIO - APQ8016 - MSM8916 +config OMAP_GPIO + bool "TI OMAP GPIO driver" + depends on ARCH_OMAP2PLUS + default y + help + Support GPIO controllers on the TI OMAP3/4/5 and related (such as + AM335x/AM43xx/AM57xx/DRA7xx/etc) families of SoCs. + config PM8916_GPIO bool "Qualcomm PM8916 PMIC GPIO/keypad driver" depends on DM_GPIO && PMIC_PM8916 diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index a1406ba..ff3dc25 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -284,15 +284,6 @@ static void __i2c_init(const struct fsl_i2c_base *base, int speed, int break; } - -#ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT - /* Call board specific i2c bus reset routine AFTER the bus has been - * initialized. Use either this callpoint or i2c_init_board; - * which is called before i2c_init operations. - * For details about this problem see doc/I2C_Edge_Conditions. - */ - i2c_board_late_init(); -#endif } static int diff --git a/drivers/i2c/fti2c010.c b/drivers/i2c/fti2c010.c index b35d0d2..4da959f 100644 --- a/drivers/i2c/fti2c010.c +++ b/drivers/i2c/fti2c010.c @@ -146,15 +146,6 @@ static void fti2c010_init(struct i2c_adapter *adap, int speed, int slaveaddr) set_i2c_bus_speed(chip, speed); /* slave init, don't care */ - -#ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT - /* Call board specific i2c bus reset routine AFTER the bus has been - * initialized. Use either this callpoint or i2c_init_board; - * which is called before fti2c010_init operations. - * For details about this problem see doc/I2C_Edge_Conditions. - */ - i2c_board_late_init(); -#endif } /* diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 13ec0e6..b68e827 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -69,10 +69,6 @@ DECLARE_GLOBAL_DATA_PTR; #define I2SR_IIF_CLEAR (0 << 1) #endif -#if defined(CONFIG_HARD_I2C) && !defined(CONFIG_SYS_I2C_BASE) -#error "define CONFIG_SYS_I2C_BASE to use the mxc_i2c driver" -#endif - #ifdef I2C_QUIRK_REG static u16 i2c_clk_div[60][2] = { { 20, 0x00 }, { 22, 0x01 }, { 24, 0x02 }, { 26, 0x03 }, diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c index a23737a..4b8397a 100644 --- a/drivers/i2c/omap24xx_i2c.c +++ b/drivers/i2c/omap24xx_i2c.c @@ -122,7 +122,7 @@ static int wait_for_bb(struct i2c *i2c_base, int waitdelay) u16 stat; writew(0xFFFF, &i2c_base->stat); /* clear current interrupts...*/ -#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) +#if defined(CONFIG_OMAP34XX) while ((stat = readw(&i2c_base->stat) & I2C_STAT_BB) && timeout--) { #else /* Read RAW status */ @@ -153,7 +153,7 @@ static u16 wait_for_event(struct i2c *i2c_base, int waitdelay) do { udelay(waitdelay); -#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) +#if defined(CONFIG_OMAP34XX) status = readw(&i2c_base->stat); #else /* Read RAW status */ @@ -338,7 +338,7 @@ retry: /* own address */ writew(slaveadd, &i2c_base->oa); -#if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) +#if defined(CONFIG_OMAP34XX) /* * Have to enable interrupts for OMAP2/3, these IPs don't have * an 'irqstatus_raw' register and we shall have to poll 'stat' diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index a7d56e6..d8c107e 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -311,6 +311,7 @@ config SY8106A_VOUT1_VOLT config TWL4030_POWER depends on OMAP34XX bool "Enable driver for TI TWL4030 power management chip" + imply CMD_POWEROFF ---help--- The TWL4030 in a combination audio CODEC/power management with GPIO and it is commonly used with the OMAP3 family of processors diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index ca55df7..0eb7c02 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -175,21 +175,17 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) ; serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); -#if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \ - defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) +#if defined(CONFIG_ARCH_OMAP2PLUS) serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ #endif serial_out(UART_MCRVAL, &com_port->mcr); serial_out(ns16550_getfcr(com_port), &com_port->fcr); if (baud_divisor != -1) NS16550_setbrg(com_port, baud_divisor); -#if defined(CONFIG_OMAP) || \ - defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \ - defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) - +#if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) /* /16 is proper to hit 115200 with 48MHz */ serial_out(0, &com_port->mdr1); -#endif /* CONFIG_OMAP */ +#endif #if defined(CONFIG_SOC_KEYSTONE) serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC); #endif diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index 76d376a..3caea15 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -568,7 +568,8 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, priv->freq = max_hz; priv->mode = mode; priv->wordlen = priv->slave.wordlen; -#ifdef CONFIG_OMAP3_SPI_D0_D1_SWAPPED +#if 0 + /* Please migrate to DM_SPI support for this feature. */ priv->pin_dir = MCSPI_PINDIR_D0_OUT_D1_IN; #endif diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index fb5aa6f..9a67e43 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -57,6 +57,7 @@ endif # USB_XHCI_HCD config USB_EHCI_HCD bool "EHCI HCD (USB 2.0) support" + default y if ARCH_MX5 || ARCH_MX6 select USB_HOST ---help--- The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0 @@ -74,12 +75,6 @@ config USB_EHCI_HCD You may want to read <file:Documentation/usb/ehci.txt>. -config USB_EHCI - bool - default USB_EHCI_HCD - ---help--- - TODO: rename after most boards switch to Kconfig - if USB_EHCI_HCD config USB_EHCI_ATMEL @@ -90,8 +85,8 @@ config USB_EHCI_ATMEL Enables support for the on-chip EHCI controller on Atmel chips. config USB_EHCI_MARVELL - bool "Support for MVEBU (AXP / A38x) on-chip EHCI USB controller" - depends on ARCH_MVEBU + bool "Support for Marvell on-chip EHCI USB controller" + depends on ARCH_MVEBU || KIRKWOOD || ORION5X default y ---help--- Enables support for the on-chip EHCI controller on MVEBU SoCs. @@ -110,6 +105,14 @@ config USB_EHCI_MX7 ---help--- Enables support for the on-chip EHCI controller on i.MX7 SoCs. +config USB_EHCI_OMAP + bool "Support for OMAP3+ on-chip EHCI USB controller" + depends on ARCH_OMAP2PLUS + default y + ---help--- + Enables support for the on-chip EHCI controller on OMAP3 and later + SoCs. + if USB_EHCI_MX7 config MXC_USB_OTG_HACTIVE diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 58c0cf5..bf354fe 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -24,7 +24,7 @@ obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o obj-$(CONFIG_USB_OHCI_GENERIC) += ohci-generic.o # echi -obj-$(CONFIG_USB_EHCI) += ehci-hcd.o +obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o obj-$(CONFIG_USB_EHCI_ARMADA100) += ehci-armada100.o utmi-armada100.o obj-$(CONFIG_USB_EHCI_ATMEL) += ehci-atmel.o ifdef CONFIG_MPC512X diff --git a/drivers/usb/musb-new/linux-compat.h b/drivers/usb/musb-new/linux-compat.h index 9244977..4dae83e 100644 --- a/drivers/usb/musb-new/linux-compat.h +++ b/drivers/usb/musb-new/linux-compat.h @@ -30,7 +30,7 @@ #define CONFIG_SOC_OMAP3430 #endif -#ifdef CONFIG_OMAP4430 +#ifdef CONFIG_OMAP44XX #define CONFIG_ARCH_OMAP4 #endif diff --git a/drivers/usb/musb-new/omap2430.c b/drivers/usb/musb-new/omap2430.c index 684ad95..ba22dfe 100644 --- a/drivers/usb/musb-new/omap2430.c +++ b/drivers/usb/musb-new/omap2430.c @@ -441,7 +441,7 @@ static int omap2430_musb_enable(struct musb *musb) twl6030_usb_device_settings(); #endif -#ifdef CONFIG_OMAP4430 +#ifdef CONFIG_OMAP44XX u32 *usbotghs_control = (u32 *)((*ctrl)->control_usbotghs_ctrl); *usbotghs_control = USBOTGHS_CONTROL_AVALID | USBOTGHS_CONTROL_VBUSVALID | USBOTGHS_CONTROL_IDDIG; diff --git a/drivers/usb/musb/omap3.c b/drivers/usb/musb/omap3.c index 97da529..57889ef 100644 --- a/drivers/usb/musb/omap3.c +++ b/drivers/usb/musb/omap3.c @@ -55,7 +55,7 @@ static struct omap3_otg_regs *otg; #define OMAP3_OTG_SYSSTATUS_RESETDONE 0x0001 /* OMAP4430 has an internal PHY, use it */ -#ifdef CONFIG_OMAP4430 +#ifdef CONFIG_OMAP44XX #define OMAP3_OTG_INTERFSEL_OMAP 0x0000 #else #define OMAP3_OTG_INTERFSEL_OMAP 0x0001 @@ -118,11 +118,11 @@ int musb_platform_init(void) stdby &= ~OMAP3_OTG_FORCESTDBY_STANDBY; writel(stdby, &otg->forcestdby); -#ifdef CONFIG_OMAP3_EVM +#ifdef CONFIG_TARGET_OMAP3_EVM musb_cfg.extvbus = omap3_evm_need_extvbus(); #endif -#ifdef CONFIG_OMAP4430 +#ifdef CONFIG_OMAP44XX u32 *usbotghs_control = (u32 *)((*ctrl)->control_usbotghs_ctrl); *usbotghs_control = 0x15; diff --git a/drivers/usb/musb/omap3.h b/drivers/usb/musb/omap3.h index ae645c7..d91ad0a 100644 --- a/drivers/usb/musb/omap3.h +++ b/drivers/usb/musb/omap3.h @@ -32,7 +32,7 @@ int musb_platform_init(void); -#ifdef CONFIG_OMAP3_EVM +#ifdef CONFIG_TARGET_OMAP3_EVM extern u8 omap3_evm_need_extvbus(void); #endif diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 446cca9..61dfed8 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -619,4 +619,13 @@ config LCD CONFIG option. See the README for details. Drives which have been converted to driver model will instead used CONFIG_DM_VIDEO. +config VIDEO_DW_HDMI + bool + help + Enables the common driver code for the Designware HDMI TX + block found in SoCs from various vendors. + As this does not provide any functionality by itself (but + rather requires a SoC-specific glue driver to call it), it + can not be enabled from the configuration menu. + endmenu diff --git a/drivers/video/Makefile b/drivers/video/Makefile index a80af31..58f5de5 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -57,6 +57,7 @@ obj-$(CONFIG_VIDEO_VESA) += vesa.o obj-$(CONFIG_FORMIKE) += formike.o obj-$(CONFIG_LG4573) += lg4573.o obj-$(CONFIG_AM335X_LCD) += am335x-fb.o +obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o obj-${CONFIG_VIDEO_TEGRA124} += tegra124/ obj-${CONFIG_EXYNOS_FB} += exynos/ diff --git a/drivers/video/dw_hdmi.c b/drivers/video/dw_hdmi.c index 8a53109..6039d67 100644 --- a/drivers/video/dw_hdmi.c +++ b/drivers/video/dw_hdmi.c @@ -414,13 +414,9 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH : HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW); - /* - * TODO(sjg@chromium.org>: Need to check for HDMI / DVI - * inv_val |= (edid->hdmi_monitor_detected ? - * HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE : - * HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE); - */ - inv_val |= HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE; + inv_val |= (edid->hdmi_monitor ? + HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE : + HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE); inv_val |= HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW; @@ -459,7 +455,7 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, } /* hdmi initialization step b.4 */ -static void hdmi_enable_video_path(struct dw_hdmi *hdmi) +static void hdmi_enable_video_path(struct dw_hdmi *hdmi, bool audio) { uint clkdis; @@ -484,8 +480,10 @@ static void hdmi_enable_video_path(struct dw_hdmi *hdmi) clkdis &= ~HDMI_MC_CLKDIS_TMDSCLK_DISABLE; hdmi_write(hdmi, clkdis, HDMI_MC_CLKDIS); - clkdis &= ~HDMI_MC_CLKDIS_AUDCLK_DISABLE; - hdmi_write(hdmi, clkdis, HDMI_MC_CLKDIS); + if (audio) { + clkdis &= ~HDMI_MC_CLKDIS_AUDCLK_DISABLE; + hdmi_write(hdmi, clkdis, HDMI_MC_CLKDIS); + } } /* workaround to clear the overflow condition */ @@ -716,7 +714,8 @@ int dw_hdmi_enable(struct dw_hdmi *hdmi, const struct display_timing *edid) { int ret; - debug("hdmi, mode info : clock %d hdis %d vdis %d\n", + debug("%s, mode info : clock %d hdis %d vdis %d\n", + edid->hdmi_monitor ? "hdmi" : "dvi", edid->pixelclock.typ, edid->hactive.typ, edid->vactive.typ); hdmi_av_composer(hdmi, edid); @@ -725,11 +724,13 @@ int dw_hdmi_enable(struct dw_hdmi *hdmi, const struct display_timing *edid) if (ret) return ret; - hdmi_enable_video_path(hdmi); + hdmi_enable_video_path(hdmi, edid->hdmi_monitor); - hdmi_audio_fifo_reset(hdmi); - hdmi_audio_set_format(hdmi); - hdmi_audio_set_samplerate(hdmi, edid->pixelclock.typ); + if (edid->hdmi_monitor) { + hdmi_audio_fifo_reset(hdmi); + hdmi_audio_set_format(hdmi); + hdmi_audio_set_samplerate(hdmi, edid->pixelclock.typ); + } hdmi_video_packetize(hdmi); hdmi_video_sample(hdmi); diff --git a/drivers/video/rockchip/Kconfig b/drivers/video/rockchip/Kconfig index 9267b28..80e399f 100644 --- a/drivers/video/rockchip/Kconfig +++ b/drivers/video/rockchip/Kconfig @@ -35,6 +35,7 @@ config DISPLAY_ROCKCHIP_LVDS config DISPLAY_ROCKCHIP_HDMI bool "HDMI port" + select VIDEO_DW_HDMI depends on VIDEO_ROCKCHIP help This enables High-Definition Multimedia Interface display support. diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile index c742902..cd54b12 100644 --- a/drivers/video/rockchip/Makefile +++ b/drivers/video/rockchip/Makefile @@ -9,6 +9,6 @@ ifdef CONFIG_VIDEO_ROCKCHIP obj-y += rk_vop.o obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o -obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o ../dw_hdmi.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o endif diff --git a/drivers/video/sunxi/Makefile b/drivers/video/sunxi/Makefile index b8afd89..dbaab61 100644 --- a/drivers/video/sunxi/Makefile +++ b/drivers/video/sunxi/Makefile @@ -5,5 +5,5 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_VIDEO_SUNXI) += sunxi_display.o lcdc.o ../videomodes.o +obj-$(CONFIG_VIDEO_SUNXI) += sunxi_display.o lcdc.o tve.o ../videomodes.o obj-$(CONFIG_VIDEO_DE2) += sunxi_de2.o sunxi_dw_hdmi.o lcdc.o ../dw_hdmi.o diff --git a/drivers/video/sunxi/sunxi_display.c b/drivers/video/sunxi/sunxi_display.c index 92c9d06..de768ba 100644 --- a/drivers/video/sunxi/sunxi_display.c +++ b/drivers/video/sunxi/sunxi_display.c @@ -14,6 +14,7 @@ #include <asm/arch/gpio.h> #include <asm/arch/lcdc.h> #include <asm/arch/pwm.h> +#include <asm/arch/tve.h> #include <asm/global_data.h> #include <asm/gpio.h> #include <asm/io.h> @@ -929,63 +930,19 @@ static void sunxi_tvencoder_mode_set(void) switch (sunxi_display.monitor) { case sunxi_monitor_vga: - writel(SUNXI_TVE_GCTRL_DAC_INPUT(0, 1) | - SUNXI_TVE_GCTRL_DAC_INPUT(1, 2) | - SUNXI_TVE_GCTRL_DAC_INPUT(2, 3), &tve->gctrl); - writel(SUNXI_TVE_CFG0_VGA, &tve->cfg0); - writel(SUNXI_TVE_DAC_CFG0_VGA, &tve->dac_cfg0); - writel(SUNXI_TVE_UNKNOWN1_VGA, &tve->unknown1); + tvencoder_mode_set(tve, tve_mode_vga); break; case sunxi_monitor_composite_pal_nc: - writel(SUNXI_TVE_CHROMA_FREQ_PAL_NC, &tve->chroma_freq); - /* Fall through */ + tvencoder_mode_set(tve, tve_mode_composite_pal_nc); + break; case sunxi_monitor_composite_pal: - writel(SUNXI_TVE_GCTRL_DAC_INPUT(0, 1) | - SUNXI_TVE_GCTRL_DAC_INPUT(1, 2) | - SUNXI_TVE_GCTRL_DAC_INPUT(2, 3) | - SUNXI_TVE_GCTRL_DAC_INPUT(3, 4), &tve->gctrl); - writel(SUNXI_TVE_CFG0_PAL, &tve->cfg0); - writel(SUNXI_TVE_DAC_CFG0_COMPOSITE, &tve->dac_cfg0); - writel(SUNXI_TVE_FILTER_COMPOSITE, &tve->filter); - writel(SUNXI_TVE_PORCH_NUM_PAL, &tve->porch_num); - writel(SUNXI_TVE_LINE_NUM_PAL, &tve->line_num); - writel(SUNXI_TVE_BLANK_BLACK_LEVEL_PAL, &tve->blank_black_level); - writel(SUNXI_TVE_UNKNOWN1_COMPOSITE, &tve->unknown1); - writel(SUNXI_TVE_CBR_LEVEL_PAL, &tve->cbr_level); - writel(SUNXI_TVE_BURST_WIDTH_COMPOSITE, &tve->burst_width); - writel(SUNXI_TVE_UNKNOWN2_PAL, &tve->unknown2); - writel(SUNXI_TVE_ACTIVE_NUM_COMPOSITE, &tve->active_num); - writel(SUNXI_TVE_CHROMA_BW_GAIN_COMP, &tve->chroma_bw_gain); - writel(SUNXI_TVE_NOTCH_WIDTH_COMPOSITE, &tve->notch_width); - writel(SUNXI_TVE_RESYNC_NUM_PAL, &tve->resync_num); - writel(SUNXI_TVE_SLAVE_PARA_COMPOSITE, &tve->slave_para); + tvencoder_mode_set(tve, tve_mode_composite_pal); break; case sunxi_monitor_composite_pal_m: - writel(SUNXI_TVE_CHROMA_FREQ_PAL_M, &tve->chroma_freq); - writel(SUNXI_TVE_COLOR_BURST_PAL_M, &tve->color_burst); - /* Fall through */ + tvencoder_mode_set(tve, tve_mode_composite_pal_m); + break; case sunxi_monitor_composite_ntsc: - writel(SUNXI_TVE_GCTRL_DAC_INPUT(0, 1) | - SUNXI_TVE_GCTRL_DAC_INPUT(1, 2) | - SUNXI_TVE_GCTRL_DAC_INPUT(2, 3) | - SUNXI_TVE_GCTRL_DAC_INPUT(3, 4), &tve->gctrl); - writel(SUNXI_TVE_CFG0_NTSC, &tve->cfg0); - writel(SUNXI_TVE_DAC_CFG0_COMPOSITE, &tve->dac_cfg0); - writel(SUNXI_TVE_FILTER_COMPOSITE, &tve->filter); - writel(SUNXI_TVE_PORCH_NUM_NTSC, &tve->porch_num); - writel(SUNXI_TVE_LINE_NUM_NTSC, &tve->line_num); - writel(SUNXI_TVE_BLANK_BLACK_LEVEL_NTSC, &tve->blank_black_level); - writel(SUNXI_TVE_UNKNOWN1_COMPOSITE, &tve->unknown1); - writel(SUNXI_TVE_CBR_LEVEL_NTSC, &tve->cbr_level); - writel(SUNXI_TVE_BURST_PHASE_NTSC, &tve->burst_phase); - writel(SUNXI_TVE_BURST_WIDTH_COMPOSITE, &tve->burst_width); - writel(SUNXI_TVE_UNKNOWN2_NTSC, &tve->unknown2); - writel(SUNXI_TVE_SYNC_VBI_LEVEL_NTSC, &tve->sync_vbi_level); - writel(SUNXI_TVE_ACTIVE_NUM_COMPOSITE, &tve->active_num); - writel(SUNXI_TVE_CHROMA_BW_GAIN_COMP, &tve->chroma_bw_gain); - writel(SUNXI_TVE_NOTCH_WIDTH_COMPOSITE, &tve->notch_width); - writel(SUNXI_TVE_RESYNC_NUM_NTSC, &tve->resync_num); - writel(SUNXI_TVE_SLAVE_PARA_COMPOSITE, &tve->slave_para); + tvencoder_mode_set(tve, tve_mode_composite_ntsc); break; case sunxi_monitor_none: case sunxi_monitor_dvi: @@ -995,14 +952,6 @@ static void sunxi_tvencoder_mode_set(void) } } -static void sunxi_tvencoder_enable(void) -{ - struct sunxi_tve_reg * const tve = - (struct sunxi_tve_reg *)SUNXI_TVE0_BASE; - - setbits_le32(&tve->gctrl, SUNXI_TVE_GCTRL_ENABLE); -} - #endif /* CONFIG_VIDEO_VGA || defined CONFIG_VIDEO_COMPOSITE */ static void sunxi_drc_init(void) @@ -1080,6 +1029,8 @@ static void sunxi_mode_set(const struct ctfb_res_modes *mode, int __maybe_unused clk_div, clk_double; struct sunxi_lcdc_reg * const lcdc = (struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE; + struct sunxi_tve_reg * __maybe_unused const tve = + (struct sunxi_tve_reg *)SUNXI_TVE0_BASE; switch (sunxi_display.monitor) { case sunxi_monitor_none: @@ -1134,7 +1085,7 @@ static void sunxi_mode_set(const struct ctfb_res_modes *mode, sunxi_tvencoder_mode_set(); sunxi_composer_enable(); lcdc_enable(lcdc, sunxi_display.depth); - sunxi_tvencoder_enable(); + tvencoder_enable(tve); #elif defined CONFIG_VIDEO_VGA_VIA_LCD sunxi_composer_mode_set(mode, address); sunxi_lcdc_tcon0_mode_set(mode, true); @@ -1153,7 +1104,7 @@ static void sunxi_mode_set(const struct ctfb_res_modes *mode, sunxi_tvencoder_mode_set(); sunxi_composer_enable(); lcdc_enable(lcdc, sunxi_display.depth); - sunxi_tvencoder_enable(); + tvencoder_enable(tve); #endif break; } diff --git a/drivers/video/sunxi/tve.c b/drivers/video/sunxi/tve.c new file mode 100644 index 0000000..adea78a --- /dev/null +++ b/drivers/video/sunxi/tve.c @@ -0,0 +1,86 @@ +/* + * TV encoder driver for Allwinner SoCs. + * + * (C) Copyright 2013-2014 Luc Verhaegen <libv@skynet.be> + * (C) Copyright 2014-2015 Hans de Goede <hdegoede@redhat.com> + * (C) Copyright 2017 Jernej Skrabec <jernej.skrabec@siol.net> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> + +#include <asm/arch/tve.h> +#include <asm/io.h> + +void tvencoder_mode_set(struct sunxi_tve_reg * const tve, enum tve_mode mode) +{ + switch (mode) { + case tve_mode_vga: + writel(SUNXI_TVE_GCTRL_DAC_INPUT(0, 1) | + SUNXI_TVE_GCTRL_DAC_INPUT(1, 2) | + SUNXI_TVE_GCTRL_DAC_INPUT(2, 3), &tve->gctrl); + writel(SUNXI_TVE_CFG0_VGA, &tve->cfg0); + writel(SUNXI_TVE_DAC_CFG0_VGA, &tve->dac_cfg0); + writel(SUNXI_TVE_UNKNOWN1_VGA, &tve->unknown1); + break; + case tve_mode_composite_pal_nc: + writel(SUNXI_TVE_CHROMA_FREQ_PAL_NC, &tve->chroma_freq); + /* Fall through */ + case tve_mode_composite_pal: + writel(SUNXI_TVE_GCTRL_DAC_INPUT(0, 1) | + SUNXI_TVE_GCTRL_DAC_INPUT(1, 2) | + SUNXI_TVE_GCTRL_DAC_INPUT(2, 3) | + SUNXI_TVE_GCTRL_DAC_INPUT(3, 4), &tve->gctrl); + writel(SUNXI_TVE_CFG0_PAL, &tve->cfg0); + writel(SUNXI_TVE_DAC_CFG0_COMPOSITE, &tve->dac_cfg0); + writel(SUNXI_TVE_FILTER_COMPOSITE, &tve->filter); + writel(SUNXI_TVE_PORCH_NUM_PAL, &tve->porch_num); + writel(SUNXI_TVE_LINE_NUM_PAL, &tve->line_num); + writel(SUNXI_TVE_BLANK_BLACK_LEVEL_PAL, + &tve->blank_black_level); + writel(SUNXI_TVE_UNKNOWN1_COMPOSITE, &tve->unknown1); + writel(SUNXI_TVE_CBR_LEVEL_PAL, &tve->cbr_level); + writel(SUNXI_TVE_BURST_WIDTH_COMPOSITE, &tve->burst_width); + writel(SUNXI_TVE_UNKNOWN2_PAL, &tve->unknown2); + writel(SUNXI_TVE_ACTIVE_NUM_COMPOSITE, &tve->active_num); + writel(SUNXI_TVE_CHROMA_BW_GAIN_COMP, &tve->chroma_bw_gain); + writel(SUNXI_TVE_NOTCH_WIDTH_COMPOSITE, &tve->notch_width); + writel(SUNXI_TVE_RESYNC_NUM_PAL, &tve->resync_num); + writel(SUNXI_TVE_SLAVE_PARA_COMPOSITE, &tve->slave_para); + break; + case tve_mode_composite_pal_m: + writel(SUNXI_TVE_CHROMA_FREQ_PAL_M, &tve->chroma_freq); + writel(SUNXI_TVE_COLOR_BURST_PAL_M, &tve->color_burst); + /* Fall through */ + case tve_mode_composite_ntsc: + writel(SUNXI_TVE_GCTRL_DAC_INPUT(0, 1) | + SUNXI_TVE_GCTRL_DAC_INPUT(1, 2) | + SUNXI_TVE_GCTRL_DAC_INPUT(2, 3) | + SUNXI_TVE_GCTRL_DAC_INPUT(3, 4), &tve->gctrl); + writel(SUNXI_TVE_CFG0_NTSC, &tve->cfg0); + writel(SUNXI_TVE_DAC_CFG0_COMPOSITE, &tve->dac_cfg0); + writel(SUNXI_TVE_FILTER_COMPOSITE, &tve->filter); + writel(SUNXI_TVE_PORCH_NUM_NTSC, &tve->porch_num); + writel(SUNXI_TVE_LINE_NUM_NTSC, &tve->line_num); + writel(SUNXI_TVE_BLANK_BLACK_LEVEL_NTSC, + &tve->blank_black_level); + writel(SUNXI_TVE_UNKNOWN1_COMPOSITE, &tve->unknown1); + writel(SUNXI_TVE_CBR_LEVEL_NTSC, &tve->cbr_level); + writel(SUNXI_TVE_BURST_PHASE_NTSC, &tve->burst_phase); + writel(SUNXI_TVE_BURST_WIDTH_COMPOSITE, &tve->burst_width); + writel(SUNXI_TVE_UNKNOWN2_NTSC, &tve->unknown2); + writel(SUNXI_TVE_SYNC_VBI_LEVEL_NTSC, &tve->sync_vbi_level); + writel(SUNXI_TVE_ACTIVE_NUM_COMPOSITE, &tve->active_num); + writel(SUNXI_TVE_CHROMA_BW_GAIN_COMP, &tve->chroma_bw_gain); + writel(SUNXI_TVE_NOTCH_WIDTH_COMPOSITE, &tve->notch_width); + writel(SUNXI_TVE_RESYNC_NUM_NTSC, &tve->resync_num); + writel(SUNXI_TVE_SLAVE_PARA_COMPOSITE, &tve->slave_para); + break; + } +} + +void tvencoder_enable(struct sunxi_tve_reg * const tve) +{ + setbits_le32(&tve->gctrl, SUNXI_TVE_GCTRL_ENABLE); +} diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c index 32a4e7f..f803067 100644 --- a/drivers/video/video_bmp.c +++ b/drivers/video/video_bmp.c @@ -316,7 +316,7 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, } break; #endif /* CONFIG_BMP_16BPP */ -#if defined(CONFIG_BMP_24BMP) +#if defined(CONFIG_BMP_24BPP) case 24: for (i = 0; i < height; ++i) { for (j = 0; j < width; j++) { @@ -328,7 +328,7 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, fb -= priv->line_length + width * (bpix / 8); } break; -#endif /* CONFIG_BMP_24BMP */ +#endif /* CONFIG_BMP_24BPP */ #if defined(CONFIG_BMP_32BPP) case 32: for (i = 0; i < height; ++i) { diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index bdaf5d4..22a7c4f 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -12,6 +12,14 @@ config BCM2835_WDT This provides basic infrastructure to support BCM2835/2836 watchdog hardware, with a max timeout of ~15secs. +config OMAP_WATCHDOG + bool "TI OMAP watchdog driver" + depends on ARCH_OMAP2PLUS + select HW_WATCHDOG + default y if AM33XX + help + Say Y here to enable the OMAP3+ watchdog driver. + config ULP_WATCHDOG bool "i.MX7ULP watchdog" help |