diff options
Diffstat (limited to 'include/configs/ls1088aqds.h')
| -rw-r--r-- | include/configs/ls1088aqds.h | 35 |
1 files changed, 15 insertions, 20 deletions
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index e7e3afe..e0ea03e 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -42,8 +42,9 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_CLK_FREQ 100000000 #define CONFIG_DDR_CLK_FREQ 100000000 #else -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() -#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() +#define CONFIG_QIXIS_I2C_ACCESS +#define CONFIG_SYS_CLK_FREQ 100000000 +#define CONFIG_DDR_CLK_FREQ 100000000 #endif #define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4) @@ -88,16 +89,10 @@ unsigned long get_board_ddr_clk(void); CSPR_MSEL_NOR | \ CSPR_V) #define CONFIG_SYS_NOR_CSOR CSOR_NOR_ADM_SHIFT(12) -#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \ - FTIM0_NOR_TEADC(0x5) | \ - FTIM0_NOR_TEAHC(0x5)) -#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \ - FTIM1_NOR_TRAD_NOR(0x1a) |\ - FTIM1_NOR_TSEQRAD_NOR(0x13)) -#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \ - FTIM2_NOR_TCH(0x4) | \ - FTIM2_NOR_TWPH(0x0E) | \ - FTIM2_NOR_TWP(0x1c)) +#define CONFIG_SYS_NOR_FTIM0 (0xc0201410) +#define CONFIG_SYS_NOR_FTIM1 (0x50009028) +#define CONFIG_SYS_NOR_FTIM2 (0x0820501c) +#define CONFIG_SYS_NOR_FTIM3 0x04000000 #define CONFIG_SYS_NOR_FTIM3 0x04000000 #define CONFIG_SYS_IFC_CCR 0x01000000 @@ -194,7 +189,7 @@ unsigned long get_board_ddr_clk(void); | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64*1024) +#define SYS_FPGA_AMASK IFC_AMASK(64 * 1024) #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_SYS_FPGA_CSOR CSOR_GPCM_ADM_SHIFT(0) #else @@ -223,7 +218,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_FPGA_CSPR_EXT #define CONFIG_SYS_CSPR2 CONFIG_SYS_FPGA_CSPR #define CONFIG_SYS_CSPR2_FINAL SYS_FPGA_CSPR_FINAL -#define CONFIG_SYS_AMASK2 CONFIG_SYS_FPGA_AMASK +#define CONFIG_SYS_AMASK2 SYS_FPGA_AMASK #define CONFIG_SYS_CSOR2 CONFIG_SYS_FPGA_CSOR #define CONFIG_SYS_CS2_FTIM0 SYS_FPGA_CS_FTIM0 #define CONFIG_SYS_CS2_FTIM1 SYS_FPGA_CS_FTIM1 @@ -259,13 +254,13 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 #define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR -#define CONFIG_SYS_CSPR3_FINAL CONFIG_SYS_FPGA_CSPR_FINAL -#define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK +#define CONFIG_SYS_CSPR3_FINAL SYS_FPGA_CSPR_FINAL +#define CONFIG_SYS_AMASK3 SYS_FPGA_AMASK #define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR -#define CONFIG_SYS_CS3_FTIM0 CONFIG_SYS_FPGA_CS_FTIM0 -#define CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_FPGA_CS_FTIM1 -#define CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_FPGA_CS_FTIM2 -#define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_CS_FTIM3 +#define CONFIG_SYS_CS3_FTIM0 SYS_FPGA_CS_FTIM0 +#define CONFIG_SYS_CS3_FTIM1 SYS_FPGA_CS_FTIM1 +#define CONFIG_SYS_CS3_FTIM2 SYS_FPGA_CS_FTIM2 +#define CONFIG_SYS_CS3_FTIM3 SYS_FPGA_CS_FTIM3 #endif #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 |