diff options
Diffstat (limited to 'include/configs')
62 files changed, 817 insertions, 257 deletions
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index f99663a..bde71fb 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -11,12 +11,6 @@ #ifndef __T1024RDB_H #define __T1024RDB_H -#if defined(CONFIG_T1023RDB) -#ifdef CONFIG_SPL -#define CONFIG_SYS_NO_FLASH -#endif -#endif - /* High Level Configuration Options */ #define CONFIG_SYS_GENERIC_BOARD #define CONFIG_DISPLAY_BOARDINFO @@ -320,7 +314,7 @@ unsigned long get_board_ddr_clk(void); #if defined(CONFIG_T1024RDB) #define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80 #elif defined(CONFIG_T1023RDB) -#define CONFIG_SYS_NOR_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ +#define CONFIG_SYS_NOR_CSOR (CSOR_NOR_ADM_SHIFT(0) | \ CSOR_NAND_TRHZ_80 | CSOR_NOR_ADM_SHFT_MODE_EN) #endif #define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \ @@ -395,7 +389,9 @@ unsigned long get_board_ddr_clk(void); | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ #define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) #elif defined(CONFIG_T1023RDB) -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_RAL_3 /* RAL 3Bytes */ \ +#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ + | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ + | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ | CSOR_NAND_RAL_3 /* RAL 3Bytes */ \ | CSOR_NAND_PGS_2K /* Page Size = 2K */ \ | CSOR_NAND_SPRZ_128 /* Spare size = 128 */ \ @@ -557,9 +553,8 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 -#define I2C_MUX_PCA_ADDR 0x77 -#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/ - +#define I2C_PCA6408_BUS_NUM 1 +#define I2C_PCA6408_ADDR 0x20 /* I2C bus multiplexer */ #define I2C_MUX_CH_DEFAULT 0x8 @@ -757,8 +752,10 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_DPAA_FMAN +#ifdef CONFIG_T1024RDB #define CONFIG_QE #define CONFIG_U_QE +#endif /* Default address of microcode for the Linux FMan driver */ #if defined(CONFIG_SPIFLASH) /* diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 16d2e0e..e88cad6 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -29,6 +29,14 @@ #ifdef CONFIG_T1042RDB #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_rcw.cfg #endif +#ifdef CONFIG_T1040D4RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1040d4_rcw.cfg +#endif +#ifdef CONFIG_T1042D4RDB +#define CONFIG_SYS_FSL_PBL_RCW \ +$(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg +#endif #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT @@ -220,7 +228,9 @@ #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD +#ifndef CONFIG_SYS_FSL_DDR4 #define CONFIG_SYS_FSL_DDR3 +#endif #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 @@ -278,8 +288,23 @@ #define CPLD_LBMAP_DFLTBANK 0x40 /* BANK OR | BANK0 */ #define CPLD_LBMAP_RESET 0xFF #define CPLD_LBMAP_SHIFT 0x03 -#ifdef CONFIG_T1042RDB_PI + +#if defined(CONFIG_T1042RDB_PI) #define CPLD_DIU_SEL_DFP 0x80 +#elif defined(CONFIG_T1042D4RDB) +#define CPLD_DIU_SEL_DFP 0xc0 +#endif + +#if defined(CONFIG_T1040D4RDB) +#define CPLD_INT_MASK_ALL 0xFF +#define CPLD_INT_MASK_THERM 0x80 +#define CPLD_INT_MASK_DVI_DFP 0x40 +#define CPLD_INT_MASK_QSGMII1 0x20 +#define CPLD_INT_MASK_QSGMII2 0x10 +#define CPLD_INT_MASK_SGMI1 0x08 +#define CPLD_INT_MASK_SGMI2 0x04 +#define CPLD_INT_MASK_TDMR1 0x02 +#define CPLD_INT_MASK_TDMR2 0x01 #endif #define CONFIG_SYS_CPLD_BASE 0xffdf0000 @@ -447,7 +472,7 @@ #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#ifdef CONFIG_T1042RDB_PI +#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T1042D4RDB) /* Video */ #define CONFIG_FSL_DIU_FB @@ -492,11 +517,11 @@ /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR 0x70 -#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) +#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB) #define I2C_MUX_CH_DEFAULT 0x8 #endif -#ifdef CONFIG_T1042RDB_PI +#if defined(CONFIG_T1042RDB_PI) || defined(CONFIG_T104XD4RDB) /* LDI/DVI Encoder for display */ #define CONFIG_SYS_I2C_LDI_ADDR 0x38 #define CONFIG_SYS_I2C_DVI_ADDR 0x75 @@ -664,7 +689,7 @@ #define CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_DPAA_PME -#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) +#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB) #define CONFIG_QE #define CONFIG_U_QE #endif @@ -693,7 +718,7 @@ #define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif -#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) +#if defined(CONFIG_T104xRDB) || defined(CONFIG_T104XD4RDB) #if defined(CONFIG_SPIFLASH) #define CONFIG_SYS_QE_FW_ADDR 0x130000 #elif defined(CONFIG_SDCARD) @@ -718,17 +743,32 @@ #ifdef CONFIG_FMAN_ENET #if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) -#define CONFIG_SYS_SGMII1_PHY_ADDR 0x03 +#define CONFIG_SYS_SGMII1_PHY_ADDR 0x03 +#elif defined(CONFIG_T1040D4RDB) || defined(CONFIG_T1042D4RDB) +#define CONFIG_SYS_SGMII1_PHY_ADDR 0x02 +#define CONFIG_SYS_SGMII2_PHY_ADDR 0x03 +#define CONFIG_SYS_SGMII3_PHY_ADDR 0x01 +#endif + +#ifdef CONFIG_T104XD4RDB +#define CONFIG_SYS_RGMII1_PHY_ADDR 0x04 +#define CONFIG_SYS_RGMII2_PHY_ADDR 0x05 +#else +#define CONFIG_SYS_RGMII1_PHY_ADDR 0x01 +#define CONFIG_SYS_RGMII2_PHY_ADDR 0x02 #endif -#define CONFIG_SYS_RGMII1_PHY_ADDR 0x01 -#define CONFIG_SYS_RGMII2_PHY_ADDR 0x02 /* Enable VSC9953 L2 Switch driver on T1040 SoC */ -#ifdef CONFIG_T1040RDB +#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1040D4RDB) #define CONFIG_VSC9953 #define CONFIG_VSC9953_CMD +#ifdef CONFIG_T1040RDB #define CONFIG_SYS_FM1_QSGMII11_PHY_ADDR 0x04 #define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR 0x08 +#else +#define CONFIG_SYS_FM1_QSGMII11_PHY_ADDR 0x08 +#define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR 0x0c +#endif #endif #define CONFIG_MII /* MII PHY management */ @@ -836,6 +876,10 @@ #define FDTFILE "t1042rdb_pi/t1042rdb_pi.dtb" #elif defined(CONFIG_T1042RDB) #define FDTFILE "t1042rdb/t1042rdb.dtb" +#elif defined(CONFIG_T1040D4RDB) +#define FDTFILE "t1042rdb/t1040d4rdb.dtb" +#elif defined(CONFIG_T1042D4RDB) +#define FDTFILE "t1042rdb/t1042d4rdb.dtb" #endif #ifdef CONFIG_FSL_DIU_FB diff --git a/include/configs/adp-ag101.h b/include/configs/adp-ag101.h index 4d52ba1..141fc99 100644 --- a/include/configs/adp-ag101.h +++ b/include/configs/adp-ag101.h @@ -9,7 +9,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include <asm/arch/ag101.h> +#include <asm/arch-ag101/ag101.h> /* * CPU and Board Configuration Options diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index 06860b5..4296c6b 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -9,7 +9,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include <asm/arch/ag101.h> +#include <asm/arch-ag101/ag101.h> /* * CPU and Board Configuration Options diff --git a/include/configs/adp-ag102.h b/include/configs/adp-ag102.h index 026696c..0c7573a 100644 --- a/include/configs/adp-ag102.h +++ b/include/configs/adp-ag102.h @@ -8,7 +8,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include <asm/arch/ag102.h> +#include <asm/arch-ag102/ag102.h> /* * CPU and Board Configuration Options diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 035c156..633391b 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -287,7 +287,7 @@ #define CONFIG_MUSB_PIO_ONLY #define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_USB_GADGET -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_MUSB_HOST @@ -298,10 +298,11 @@ #ifndef CONFIG_SPL_USBETH_SUPPORT /* Fastboot */ +#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 /* To support eMMC booting */ #define CONFIG_STORAGE_EMMC @@ -344,7 +345,7 @@ /* USB Device Firmware Update support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_CMD_DFU #define DFU_ALT_INFO_MMC \ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index b90a60d..e9808a7 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -42,6 +42,8 @@ #define CONFIG_MISC_INIT_R +#define CONFIG_OF_LIBFDT + #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 33e534a..d148169 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -80,7 +80,7 @@ #endif /* Now bring in the rest of the common code. */ -#include <configs/ti_armv7_common.h> +#include <configs/ti_armv7_omap.h> /* Always 64 KiB env size */ #define CONFIG_ENV_SIZE (64 << 10) @@ -110,6 +110,7 @@ #define CONFIG_CMD_USB #define CONFIG_USB_HOST #define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_DWC3 #define CONFIG_USB_XHCI_OMAP #define CONFIG_USB_STORAGE #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 @@ -127,7 +128,7 @@ #define CONFIG_USB_DWC3_GADGET #define CONFIG_USB_GADGET -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" #define CONFIG_G_DNL_VENDOR_NUM 0x0403 @@ -137,7 +138,7 @@ #ifndef CONFIG_SPL_BUILD /* USB Device Firmware Update support */ -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_RAM #define CONFIG_CMD_DFU diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index 741fb05..fa32fa4 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -444,7 +444,7 @@ DEFAULT_LINUX_BOOT_ENV \ #define CONFIG_MUSB_PIO_ONLY #define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_USB_GADGET -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_MUSB_HOST @@ -455,10 +455,11 @@ DEFAULT_LINUX_BOOT_ENV \ #ifndef CONFIG_SPL_USBETH_SUPPORT /* Fastboot */ +#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 /* To support eMMC booting */ #define CONFIG_STORAGE_EMMC @@ -472,7 +473,7 @@ DEFAULT_LINUX_BOOT_ENV \ #ifdef CONFIG_MUSB_GADGET #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE /* USB TI's IDs */ #define CONFIG_G_DNL_VENDOR_NUM 0x0451 @@ -494,7 +495,7 @@ DEFAULT_LINUX_BOOT_ENV \ /* USB Device Firmware Update support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_CMD_DFU #define DFU_ALT_INFO_MMC \ diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h index 8f0f7f0..b7c5716 100644 --- a/include/configs/bcm28155_ap.h +++ b/include/configs/bcm28155_ap.h @@ -108,6 +108,7 @@ * for example. */ #define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION /* version string, parser, etc */ #define CONFIG_VERSION_VARIABLE @@ -133,4 +134,23 @@ #define CONFIG_FAT_WRITE +/* Fastboot and USB OTG */ +#define CONFIG_USB_FUNCTION_FASTBOOT +#define CONFIG_CMD_FASTBOOT +#define CONFIG_FASTBOOT_FLASH +#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 +#define CONFIG_SYS_CACHELINE_SIZE 64 +#define CONFIG_FASTBOOT_BUF_SIZE (CONFIG_SYS_SDRAM_SIZE - SZ_1M) +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 0 +#define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_USBID_ADDR 0x34052c46 +#define CONFIG_G_DNL_VENDOR_NUM 0x18d1 /* google */ +#define CONFIG_G_DNL_PRODUCT_NUM 0x0d02 /* nexus one */ +#define CONFIG_G_DNL_MANUFACTURER "Broadcom Corporation" + #endif /* __BCM28155_AP_H */ diff --git a/include/configs/beagle_x15.h b/include/configs/beagle_x15.h index 17fdded..d38b7b5 100644 --- a/include/configs/beagle_x15.h +++ b/include/configs/beagle_x15.h @@ -68,6 +68,7 @@ /* USB xHCI HOST */ #define CONFIG_CMD_USB #define CONFIG_USB_HOST +#define CONFIG_USB_XHCI_DWC3 #define CONFIG_USB_XHCI #define CONFIG_USB_XHCI_OMAP #define CONFIG_USB_STORAGE diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index f2f8e2e..ab8d293 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -257,16 +257,16 @@ #define CONFIG_G_DNL_PRODUCT_NUM CONFIG_TRDX_PID_COLIBRI_VF50 /* USB DFU */ -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_CMD_DFU -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_NAND #define CONFIG_DFU_MMC #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024) /* USB Storage */ #define CONFIG_USB_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_CMD_USB_MASS_STORAGE /* Enable SPI support */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 88750e0..9aaa0f5 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -16,6 +16,14 @@ #include "../board/freescale/common/ics307_clk.h" #ifdef CONFIG_RAMBOOT_PBL +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#ifdef CONFIG_NAND +#define CONFIG_RAMBOOT_NAND +#endif +#define CONFIG_BOOTSCRIPT_COPY_RAM +#else #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #define CONFIG_SYS_FSL_PBL_PBI board/freescale/corenet_ds/pbi.cfg @@ -29,6 +37,7 @@ #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5040ds.cfg #endif #endif +#endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE /* Set 1M boot space */ diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index a429107..739c2bf 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -11,6 +11,7 @@ * High Level Configuration Options (easy to change) */ #define CONFIG_ARMADA_XP /* SOC Family Name */ +#define CONFIG_ARMADA_38X #define CONFIG_DB_88F6820_GP /* Board target name for DDR training */ #define CONFIG_SYS_L2_PL310 @@ -108,6 +109,68 @@ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" +/* SPL */ +/* + * Select the boot device here + * + * Currently supported are: + * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash + * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1) + */ +#define SPL_BOOT_SPI_NOR_FLASH 1 +#define SPL_BOOT_SDIO_MMC_CARD 2 +#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH + +/* Defines for SPL */ +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_SIZE (140 << 10) +#define CONFIG_SPL_TEXT_BASE 0x40000030 +#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) + +#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) +#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) + +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ + CONFIG_SPL_BSS_MAX_SIZE) +#define CONFIG_SYS_SPL_MALLOC_SIZE (16 << 10) + +#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) +#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT + +#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH +/* SPL related SPI defines */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 +#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS +#endif + +#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD +/* SPL related MMC defines */ +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_LIBDISK_SUPPORT +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1 +#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10) +#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512) +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS ((512 << 10) / 512) /* 512KiB */ +#ifdef CONFIG_SPL_BUILD +#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ +#endif +#endif + +/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ +#define CONFIG_SYS_MVEBU_DDR_A38X +#define CONFIG_DDR3 + /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index c33a588..41e6fdc 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -27,6 +27,7 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_I2C +#define CONFIG_CMD_IDE #define CONFIG_CMD_PING #define CONFIG_CMD_SF #define CONFIG_CMD_SPI @@ -60,6 +61,34 @@ #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ #define CONFIG_SYS_ALT_MEMTEST +/* SATA support */ +#ifdef CONFIG_CMD_IDE +#define __io +#define CONFIG_IDE_PREINIT +#define CONFIG_MVSATA_IDE + +/* Needs byte-swapping for ATA data register */ +#define CONFIG_IDE_SWAP_IO + +#define CONFIG_SYS_ATA_REG_OFFSET 0x0100 /* Offset for register access */ +#define CONFIG_SYS_ATA_DATA_OFFSET 0x0100 /* Offset for data I/O */ +#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100 + +/* Each 8-bit ATA register is aligned to a 4-bytes address */ +#define CONFIG_SYS_ATA_STRIDE 4 + +/* CONFIG_CMD_IDE requires some #defines for ATA registers */ +#define CONFIG_SYS_IDE_MAXBUS 2 +#define CONFIG_SYS_IDE_MAXDEVICE CONFIG_SYS_IDE_MAXBUS + +/* ATA registers base is at SATA controller base */ +#define CONFIG_SYS_ATA_BASE_ADDR MVEBU_AXP_SATA_BASE +#define CONFIG_SYS_ATA_IDE0_OFFSET 0x2000 +#define CONFIG_SYS_ATA_IDE1_OFFSET 0x4000 + +#define CONFIG_DOS_PARTITION +#endif /* CONFIG_CMD_IDE */ + /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros @@ -109,7 +138,7 @@ #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SYS_MVEBU_DDR +#define CONFIG_SYS_MVEBU_DDR_AXP #define CONFIG_SPD_EEPROM 0x4e #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index d84427d..7499447 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -89,10 +89,11 @@ DFU_ALT_INFO_RAM /* Fastboot */ +#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x2F000000 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x2F000000 #define CONFIG_FASTBOOT_FLASH #define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 #endif @@ -175,6 +176,7 @@ #define CONFIG_CMD_USB #define CONFIG_USB_HOST #define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_DWC3 #define CONFIG_USB_XHCI_OMAP #define CONFIG_USB_STORAGE #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 @@ -189,7 +191,7 @@ #define CONFIG_USB_DWC3_GADGET #define CONFIG_USB_GADGET -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" #define CONFIG_G_DNL_VENDOR_NUM 0x0451 @@ -197,7 +199,7 @@ #define CONFIG_USB_GADGET_DUALSPEED /* USB Device Firmware Update support */ -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_RAM #define CONFIG_CMD_DFU diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index 08e2009..ec1f882 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -28,13 +28,13 @@ #define CONFIG_CMD_GPT /* USB Composite download gadget - g_dnl */ -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD /* TIZEN THOR downloader support */ #define CONFIG_CMD_THOR_DOWNLOAD -#define CONFIG_THOR_FUNCTION +#define CONFIG_USB_FUNCTION_THOR -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M #define DFU_DEFAULT_POLL_TIMEOUT 300 @@ -57,7 +57,7 @@ #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE /* Common environment variables */ #define CONFIG_EXTRA_ENV_ITB \ diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 5476248..e04dec7 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -182,6 +182,7 @@ /* USB */ #define CONFIG_CMD_USB #define CONFIG_USB_STORAGE +#define CONFIG_USB_XHCI_DWC3 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index df1ff43..7c90812 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -200,8 +200,8 @@ /* USB Mass Storage Gadget */ #define CONFIG_USB_GADGET #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 /* Netchip IDs */ diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h index a28ceb7..4f4ebf5 100644 --- a/include/configs/k2e_evm.h +++ b/include/configs/k2e_evm.h @@ -15,19 +15,17 @@ #define CONFIG_K2E_EVM /* U-Boot general configuration */ -#define CONFIG_SYS_PROMPT "K2E EVM # " - #define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ "addr_mon=0x0c140000\0" \ "args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \ "root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0" \ - "name_fdt=uImage-k2e-evm.dtb\0" \ - "name_mon=skern-k2e-evm.bin\0" \ + "name_fdt=k2e-evm.dtb\0" \ + "name_mon=skern-k2e.bin\0" \ "name_ubi=k2e-evm-ubifs.ubi\0" \ "name_uboot=u-boot-spi-k2e-evm.gph\0" \ "name_fs=arago-console-image-k2e-evm.cpio.gz\0" -#include <configs/ks2_evm.h> +#include <configs/ti_armv7_keystone2.h> /* SPL SPI Loader Configuration */ #define CONFIG_SPL_TEXT_BASE 0x0c100000 diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h index eae7721..6c6dcb1 100644 --- a/include/configs/k2hk_evm.h +++ b/include/configs/k2hk_evm.h @@ -15,19 +15,17 @@ #define CONFIG_K2HK_EVM /* U-Boot general configuration */ -#define CONFIG_SYS_PROMPT "K2HK EVM # " - #define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ "addr_mon=0x0c5f0000\0" \ "args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \ "root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0" \ - "name_fdt=uImage-k2hk-evm.dtb\0" \ - "name_mon=skern-k2hk-evm.bin\0" \ + "name_fdt=k2hk-evm.dtb\0" \ + "name_mon=skern-k2hk.bin\0" \ "name_ubi=k2hk-evm-ubifs.ubi\0" \ "name_uboot=u-boot-spi-k2hk-evm.gph\0" \ "name_fs=arago-console-image-k2hk-evm.cpio.gz\0" -#include <configs/ks2_evm.h> +#include <configs/ti_armv7_keystone2.h> /* SPL SPI Loader Configuration */ #define CONFIG_SPL_TEXT_BASE 0x0c200000 diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h index 57da057..9bacfa4 100644 --- a/include/configs/k2l_evm.h +++ b/include/configs/k2l_evm.h @@ -15,19 +15,17 @@ #define CONFIG_K2L_EVM /* U-Boot general configuration */ -#define CONFIG_SYS_PROMPT "K2L EVM # " - #define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ "addr_mon=0x0c140000\0" \ "args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \ "root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,4096\0" \ - "name_fdt=uImage-k2l-evm.dtb\0" \ - "name_mon=skern-k2l-evm.bin\0" \ + "name_fdt=k2l-evm.dtb\0" \ + "name_mon=skern-k2l.bin\0" \ "name_ubi=k2l-evm-ubifs.ubi\0" \ "name_uboot=u-boot-spi-k2l-evm.gph\0" \ "name_fs=arago-console-image-k2l-evm.cpio.gz\0" -#include <configs/ks2_evm.h> +#include <configs/ti_armv7_keystone2.h> /* SPL SPI Loader Configuration */ #define CONFIG_SPL_TEXT_BASE 0x0c100000 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 8a5a707..13f9338 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -9,6 +9,8 @@ #define CONFIG_LS102XA +#define CONFIG_ARMV7_PSCI + #define CONFIG_SYS_GENERIC_BOARD #define CONFIG_DISPLAY_CPUINFO @@ -430,19 +432,31 @@ unsigned long get_board_ddr_clk(void); /* * USB */ -#define CONFIG_HAS_FSL_DR_USB +/* EHCI Support - disbaled by default */ +/*#define CONFIG_HAS_FSL_DR_USB*/ #ifdef CONFIG_HAS_FSL_DR_USB #define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#endif + +/*XHCI Support - enabled by default*/ +#define CONFIG_HAS_FSL_XHCI_USB -#ifdef CONFIG_USB_EHCI +#ifdef CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_XHCI +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#endif + +#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB) #define CONFIG_CMD_USB #define CONFIG_USB_STORAGE -#define CONFIG_USB_EHCI_FSL -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_CMD_EXT2 #endif -#endif /* * Video diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 233b3d0..cf2aaa3 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -9,6 +9,8 @@ #define CONFIG_LS102XA +#define CONFIG_ARMV7_PSCI + #define CONFIG_SYS_GENERIC_BOARD #define CONFIG_DISPLAY_CPUINFO @@ -26,6 +28,44 @@ #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE /* + * USB + */ + +/* + * EHCI Support - disbaled by default as + * there is no signal coming out of soc on + * this board for this controller. However, + * the silicon still has this controller, + * and anyone can use this controller by + * taking signals out on their board. + */ + +/*#define CONFIG_HAS_FSL_DR_USB*/ + +#ifdef CONFIG_HAS_FSL_DR_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#endif + +/* XHCI Support - enabled by default */ +#define CONFIG_HAS_FSL_XHCI_USB + +#ifdef CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_XHCI +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#endif + +#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB) +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_EXT2 +#endif + +/* * Generic Timer Definitions */ #define GENERIC_TIMER_CLK 12500000 diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 72ba3b3..5afee55 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -19,6 +19,7 @@ #define CONFIG_ARM_ERRATA_828024 #define CONFIG_ARM_ERRATA_826974 +#include <asm/arch-fsl-lsch3/ls2085a_stream_id.h> #include <asm/arch-fsl-lsch3/config.h> #if (defined(CONFIG_SYS_FSL_SRDS_1) || defined(CONFIG_SYS_FSL_SRDS_2)) #define CONFIG_SYS_HAS_SERDES @@ -163,21 +164,30 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SYS_NAND_BASE_PHYS 0x30000000 /* Debug Server firmware */ -#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) +#define CONFIG_FSL_DEBUG_SERVER /* 2 sec timeout */ #define CONFIG_SYS_DEBUG_SERVER_TIMEOUT (2 * 1000 * 1000) /* MC firmware */ #define CONFIG_FSL_MC_ENET -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024) /* TODO Actual DPL max length needs to be confirmed with the MC FW team */ #define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000 #define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000 #define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000 #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000 +#define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH 0x200000 +#define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 0x07000000 -/* Carve out a DDR region which will not be used by u-boot/Linux */ +/* + * Carve out a DDR region which will not be used by u-boot/Linux + * + * It will be used by MC and Debug Server. The MC region must be + * 512MB aligned, so the min size to hide is 512MB. + */ #if defined(CONFIG_FSL_MC_ENET) || defined(CONFIG_FSL_DEBUG_SERVER) +#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) +#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) +#define CONFIG_SYS_MEM_TOP_HIDE_MIN (512UL * 1024 * 1024) #define CONFIG_SYS_MEM_TOP_HIDE get_dram_size_to_hide() #endif @@ -186,7 +196,8 @@ unsigned long long get_qixis_addr(void); #define CONFIG_PCIE2 /* PCIE controler 2 */ #define CONFIG_PCIE3 /* PCIE controler 3 */ #define CONFIG_PCIE4 /* PCIE controler 4 */ -#define FSL_PCIE_COMPAT "fsl,20851a-pcie" +#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ +#define FSL_PCIE_COMPAT "fsl,ls2085a-pcie" #define CONFIG_SYS_PCI_64BIT @@ -236,13 +247,13 @@ unsigned long long get_qixis_addr(void); "initrd_high=0xffffffffffffffff\0" \ "kernel_start=0x581200000\0" \ "kernel_load=0xa0000000\0" \ - "kernel_size=0x1000000\0" \ + "kernel_size=0x2800000\0" \ "console=ttyAMA0,38400n8\0" #define CONFIG_BOOTARGS "console=ttyS1,115200 root=/dev/ram0 " \ "earlycon=uart8250,mmio,0x21c0600,115200 " \ - "default_hugepagesz=2m hugepagesz=2m " \ - "hugepages=16" + "ramdisk_size=0x2000000 default_hugepagesz=2m" \ + " hugepagesz=2m hugepages=16" #define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \ "$kernel_size && bootm $kernel_load" #define CONFIG_BOOTDELAY 10 @@ -289,4 +300,7 @@ unsigned long get_dram_size_to_hide(void); #define CONFIG_SYS_SPL_MALLOC_START 0x80200000 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ + + #endif /* __LS2_COMMON_H */ diff --git a/include/configs/ls2085aqds.h b/include/configs/ls2085aqds.h index e488ac8..a6ef356 100644 --- a/include/configs/ls2085aqds.h +++ b/include/configs/ls2085aqds.h @@ -9,9 +9,6 @@ #include "ls2085a_common.h" -#define CONFIG_IDENT_STRING " LS2085A-QDS" -#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-QDS" - #define CONFIG_DISPLAY_BOARDINFO #ifndef __ASSEMBLY__ @@ -263,6 +260,8 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_LS_MC_DPC_ADDR 0x580800000ULL #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 +#define CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR +#define CONFIG_SYS_LS_MC_AIOP_IMG_ADDR 0x580900000ULL /* * I2C @@ -273,6 +272,15 @@ unsigned long get_board_ddr_clk(void); /* I2C bus multiplexer */ #define I2C_MUX_CH_DEFAULT 0x8 +/* SPI */ +#ifdef CONFIG_FSL_DSPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_EON +#endif + /* * MMC */ @@ -287,6 +295,7 @@ unsigned long get_board_ddr_clk(void); #define RTC #define CONFIG_RTC_DS3231 1 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CONFIG_CMD_DATE /* EEPROM */ #define CONFIG_ID_EEPROM @@ -332,7 +341,7 @@ unsigned long get_board_ddr_clk(void); "initrd_high=0xffffffffffffffff\0" \ "kernel_start=0x581100000\0" \ "kernel_load=0xa0000000\0" \ - "kernel_size=0x1000000\0" + "kernel_size=0x28000000\0" #ifdef CONFIG_FSL_MC_ENET #define CONFIG_FSL_MEMAC diff --git a/include/configs/ls2085ardb.h b/include/configs/ls2085ardb.h index 600261e..41eb55b 100644 --- a/include/configs/ls2085ardb.h +++ b/include/configs/ls2085ardb.h @@ -8,8 +8,6 @@ #define __LS2_RDB_H #include "ls2085a_common.h" -#define CONFIG_IDENT_STRING " LS2085A-RDB" -#define CONFIG_BOOTP_VCI_STRING "U-boot.LS2085A-RDB" #undef CONFIG_CONS_INDEX #define CONFIG_CONS_INDEX 2 @@ -30,8 +28,8 @@ unsigned long get_board_sys_clk(void); #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 -#define SPD_EEPROM_ADDRESS3 0x54 -#define SPD_EEPROM_ADDRESS4 0x53 /* Board error */ +#define SPD_EEPROM_ADDRESS3 0x53 +#define SPD_EEPROM_ADDRESS4 0x54 #define SPD_EEPROM_ADDRESS5 0x55 #define SPD_EEPROM_ADDRESS6 0x56 /* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 @@ -235,22 +233,33 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_LS_MC_DPC_ADDR 0x580800000ULL #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 +#define CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR +#define CONFIG_SYS_LS_MC_AIOP_IMG_ADDR 0x580900000ULL /* * I2C */ -#define I2C_MUX_PCA_ADDR 0x77 -#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/ +#define I2C_MUX_PCA_ADDR 0x75 +#define I2C_MUX_PCA_ADDR_PRI 0x75 /* Primary Mux*/ /* I2C bus multiplexer */ #define I2C_MUX_CH_DEFAULT 0x8 +/* SPI */ +#ifdef CONFIG_FSL_DSPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_BAR +#endif + /* * RTC configuration */ #define RTC #define CONFIG_RTC_DS3231 1 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CONFIG_CMD_DATE /* EEPROM */ #define CONFIG_ID_EEPROM @@ -284,6 +293,8 @@ unsigned long get_board_sys_clk(void); #define CONFIG_DOS_PARTITION #endif +#define CONFIG_MISC_INIT_R + /* Initial environment variables */ #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -296,6 +307,30 @@ unsigned long get_board_sys_clk(void); "initrd_high=0xffffffffffffffff\0" \ "kernel_start=0x581100000\0" \ "kernel_load=0xa0000000\0" \ - "kernel_size=0x1000000\0" + "kernel_size=0x2800000\0" + +/* MAC/PHY configuration */ +#ifdef CONFIG_FSL_MC_ENET +#define CONFIG_PHYLIB_10G +#define CONFIG_PHY_CORTINA +#define CONFIG_PHYLIB +#define CONFIG_SYS_CORTINA_FW_IN_NOR +#define CONFIG_CORTINA_FW_ADDR 0x581000000 +#define CONFIG_CORTINA_FW_LENGTH 0x40000 + +#define CORTINA_PHY_ADDR1 0x10 +#define CORTINA_PHY_ADDR2 0x11 +#define CORTINA_PHY_ADDR3 0x12 +#define CORTINA_PHY_ADDR4 0x13 +#define AQ_PHY_ADDR1 0x00 +#define AQ_PHY_ADDR2 0x01 +#define AQ_PHY_ADDR3 0x02 +#define AQ_PHY_ADDR4 0x03 + +#define CONFIG_MII +#define CONFIG_ETHPRIME "DPNI1" +#define CONFIG_PHY_GIGE +#define CONFIG_PHY_AQUANTIA +#endif #endif /* __LS2_RDB_H */ diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 4826044..0fb117f 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -108,7 +108,7 @@ #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SYS_MVEBU_DDR +#define CONFIG_SYS_MVEBU_DDR_AXP #define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */ #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index af36ac5..4781e79 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -60,9 +60,6 @@ #define CONFIG_FIT_SIGNATURE #define CONFIG_RSA -/* Avoid a warning in the Realtek Ethernet driver */ -#define CONFIG_SYS_CACHELINE_SIZE 16 - #define CONFIG_ENV_SECT_SIZE 0x1000 #define CONFIG_ENV_OFFSET 0x007fe000 diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index b654fff..b90de14 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -95,7 +95,7 @@ #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ #define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ /* ====> Include platform Common Definitions */ #include <asm/arch/config.h> diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 6722c9d..6a57841 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -231,8 +231,8 @@ #define CONFIG_USB_GADGET #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 2e81ad4..dd4cb0f 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -332,8 +332,8 @@ #define CONFIG_USB_GADGET #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 /* Netchip IDs */ @@ -341,9 +341,10 @@ #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 #define CONFIG_G_DNL_MANUFACTURER "Boundary" +#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 #endif /* __CONFIG_H */ diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index efc583f..6e3ce4d 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -109,7 +109,7 @@ /* USB */ #define CONFIG_MUSB_UDC -#define CONFIG_MUSB_HDC +#define CONFIG_MUSB_HCD #define CONFIG_USB_OMAP3 #define CONFIG_TWL4030_USB diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index cf17f3d..8d5c736 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -60,10 +60,10 @@ #define CONFIG_G_DNL_VENDOR_NUM 0x04E8 #define CONFIG_G_DNL_PRODUCT_NUM 0x6601 #define CONFIG_G_DNL_MANUFACTURER "Samsung" -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD /* DFU */ -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_CMD_DFU #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M @@ -72,13 +72,13 @@ /* THOR */ #define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D -#define CONFIG_THOR_FUNCTION +#define CONFIG_USB_FUNCTION_THOR #define CONFIG_CMD_THOR_DOWNLOAD /* UMS */ #define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 #define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_CMD_USB_MASS_STORAGE /* FIXME: MUST BE REMOVED AFTER TMU IS TURNED ON */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index e574742..804e307 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -68,14 +68,15 @@ #define CONFIG_USB_ETHER_RNDIS #define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_VBUS_DRAW 0 -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_G_DNL_VENDOR_NUM 0x0451 #define CONFIG_G_DNL_PRODUCT_NUM 0xd022 #define CONFIG_G_DNL_MANUFACTURER "TI" +#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 /* USB EHCI */ #define CONFIG_CMD_USB diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 76bf3b6..a1a90ec 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -105,7 +105,7 @@ "defaultdisplay=dvi\0" \ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ - "mmcrootfstype=ext3 rootwait\0" \ + "mmcrootfstype=ext4 rootwait\0" \ "nandroot=ubi0:rootfs ubi.mtd=4\0" \ "nandrootfstype=ubifs\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" \ diff --git a/include/configs/p2571.h b/include/configs/p2571.h new file mode 100644 index 0000000..77faf5f --- /dev/null +++ b/include/configs/p2571.h @@ -0,0 +1,75 @@ +/* + * (C) Copyright 2013-2015 + * NVIDIA Corporation <www.nvidia.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _P2571_H +#define _P2571_H + +#include <linux/sizes.h> + +/* enable PMIC */ +#define CONFIG_MAX77620_POWER + +#include "tegra210-common.h" + +/* High-level configuration options */ +#define V_PROMPT "Tegra210 (P2571) # " +#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2571" + +/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA_ENABLE_UARTA +#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE + +/* I2C */ +#define CONFIG_SYS_I2C_TEGRA +#define CONFIG_CMD_I2C + +/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA_MMC +#define CONFIG_CMD_MMC + +/* Environment in eMMC, at the end of 2nd "boot sector" */ +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) + +/* SPI */ +#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */ +#define CONFIG_TEGRA114_SPI_CTRLS 6 +#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 24000000 +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH_SIZE (4 << 20) + +/* USB2.0 Host support */ +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_TEGRA +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_USB + +/* USB networking support */ +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX + +/* General networking support */ +#define CONFIG_CMD_DHCP + +/* + * TODO(twarren@nvidia.com) - add tegra-common-usb-gadget.h back + * breaks 64-bit build in ci_udc.c + */ +#include "tegra-common-post.h" + +#define COUNTER_FREQUENCY 38400000 + +#endif /* _P2571_H */ diff --git a/include/configs/pepper.h b/include/configs/pepper.h index 16149f6..0bdcf22 100644 --- a/include/configs/pepper.h +++ b/include/configs/pepper.h @@ -41,7 +41,7 @@ "optargs=\0" \ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ - "mmcrootfstype=ext3 rootwait\0" \ + "mmcrootfstype=ext4 rootwait\0" \ "mmcargs=setenv bootargs console=${console} " \ "${optargs} " \ "root=${mmcroot} " \ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 7994ecf..235bba5 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -68,15 +68,15 @@ #define CONFIG_CMD_GPT /* USB Composite download gadget - g_dnl */ -#define CONFIG_USBDOWNLOAD_GADGET -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M #define DFU_DEFAULT_POLL_TIMEOUT 300 /* TIZEN THOR downloader support */ #define CONFIG_CMD_THOR_DOWNLOAD -#define CONFIG_THOR_FUNCTION +#define CONFIG_USB_FUNCTION_THOR /* USB Samsung's IDs */ #define CONFIG_G_DNL_VENDOR_NUM 0x04E8 @@ -275,7 +275,7 @@ #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_OF_LIBFDT diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index e5fd147..f7bef70 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -133,7 +133,7 @@ #define CONFIG_I2C #define CONFIG_CMD_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_OMAP24_I2C_SPEED OMAP_I2C_STANDARD +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 #define CONFIG_SYS_I2C_OMAP24XX @@ -249,7 +249,7 @@ #endif /* CONFIG_MUSB_GADGET */ #define CONFIG_USB_GADGET -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD /* USB DRACO ID as default */ #define CONFIG_USBD_HS @@ -258,7 +258,7 @@ #define CONFIG_G_DNL_MANUFACTURER "Siemens AG" /* USB Device Firmware Update support */ -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_NAND #define CONFIG_CMD_DFU #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1 << 20) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 4c3366a..e8473b8 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -243,10 +243,10 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_USB_GADGET_VBUS_DRAW 2 /* USB Composite download gadget - g_dnl */ -#define CONFIG_USBDOWNLOAD_GADGET -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_USB_FUNCTION_MASS_STORAGE -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_SYS_DFU_DATA_BUF_SIZE (32 * 1024 * 1024) #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index 1b4fd21..1ac3db6 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -15,6 +15,7 @@ #define CONFIG_OF_LIBFDT #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R #define CONFIG_SYS_FLASH_BASE 0x08000000 @@ -61,6 +62,8 @@ #define CONFIG_STM32_HSE_HZ 8000000 +#define CONFIG_SYS_CLK_FREQ 180000000 /* 180 MHz */ + #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ #define CONFIG_CMDLINE_TAG @@ -80,7 +83,7 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTARGS \ - "console=ttystm0,115200 earlyprintk consoleblank=0 ignore_loglevel" + "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" #define CONFIG_BOOTCOMMAND \ "run bootcmd_romfs" diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 9576bc1..5adcc39 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -330,11 +330,6 @@ extern int soft_i2c_gpio_scl; #define CONFIG_MUSB_PIO_ONLY #endif -#if defined CONFIG_USB_EHCI || defined CONFIG_USB_MUSB_SUNXI -#define CONFIG_CMD_USB -#define CONFIG_USB_STORAGE -#endif - #ifdef CONFIG_USB_KEYBOARD #define CONFIG_CONSOLE_MUX #define CONFIG_PREBOOT diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 5bc1209..14985f8 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -133,10 +133,10 @@ #define CONFIG_CI_UDC #define CONFIG_USBD_HS #define CONFIG_USB_GADGET -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 0 -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_G_DNL_VENDOR_NUM 0x0525 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 #define CONFIG_G_DNL_MANUFACTURER "TBS" diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 483222f..e67ff7b 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -62,11 +62,19 @@ #define CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS #endif +#ifdef CONFIG_ARM64 +#define FDT_HIGH "ffffffffffffffff" +#define INITRD_HIGH "ffffffffffffffff" +#else +#define FDT_HIGH "ffffffff" +#define INITRD_HIGH "ffffffff" +#endif + #define CONFIG_EXTRA_ENV_SETTINGS \ TEGRA_DEVICE_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ - "fdt_high=ffffffff\0" \ - "initrd_high=ffffffff\0" \ + "fdt_high=" FDT_HIGH "\0" \ + "initrd_high=" INITRD_HIGH "\0" \ BOOTENV \ BOARD_EXTRA_ENV_SETTINGS \ CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS diff --git a/include/configs/tegra-common-usb-gadget.h b/include/configs/tegra-common-usb-gadget.h index 287460c..d70a4e7 100644 --- a/include/configs/tegra-common-usb-gadget.h +++ b/include/configs/tegra-common-usb-gadget.h @@ -18,12 +18,12 @@ #define CONFIG_G_DNL_VENDOR_NUM 0x0955 #define CONFIG_G_DNL_PRODUCT_NUM 0x701A #define CONFIG_G_DNL_MANUFACTURER "NVIDIA" -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD /* USB mass storage protocol */ -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_CMD_USB_MASS_STORAGE /* DFU protocol */ -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1 * 1024 * 1024) #define CONFIG_CMD_DFU #ifdef CONFIG_MMC diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 7b4c0d7..ffe167e 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -18,8 +18,11 @@ #include <asm/arch/tegra.h> /* get chip and board defs */ +/* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */ +#ifndef CONFIG_ARM64 #define CONFIG_SYS_TIMER_RATE 1000000 #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE +#endif /* * Display CPU and Board information @@ -43,7 +46,9 @@ #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */ #endif +#ifndef CONFIG_ARM64 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ +#endif /* * NS16550 Configuration @@ -101,9 +106,11 @@ #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000) #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) +#ifndef CONFIG_ARM64 #ifndef CONFIG_SPL_BUILD #define CONFIG_USE_ARCH_MEMCPY #endif +#endif /*----------------------------------------------------------------------- * Physical Memory Map diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index 1aee5c8..af7698d 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -26,7 +26,7 @@ /*----------------------------------------------------------------------- * Physical Memory Map */ -#define CONFIG_SYS_TEXT_BASE 0x8010E000 +#define CONFIG_SYS_TEXT_BASE 0x80110000 /* * Memory layout for where various images get loaded by boot scripts: diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h new file mode 100644 index 0000000..0348d47 --- /dev/null +++ b/include/configs/tegra210-common.h @@ -0,0 +1,76 @@ +/* + * (C) Copyright 2013-2015 + * NVIDIA Corporation <www.nvidia.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _TEGRA210_COMMON_H_ +#define _TEGRA210_COMMON_H_ + +#include "tegra-common.h" + +/* Cortex-A57 uses a cache line size of 64 bytes */ +#define CONFIG_SYS_CACHELINE_SIZE 64 + +/* + * NS16550 Configuration + */ +#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ + +/* + * Miscellaneous configurable options + */ +#define CONFIG_STACKBASE 0x82800000 /* 40MB */ + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_SYS_TEXT_BASE 0x8010E000 + +/* Generic Interrupt Controller */ +#define CONFIG_GICV2 + +/* + * Memory layout for where various images get loaded by boot scripts: + * + * scriptaddr can be pretty much anywhere that doesn't conflict with something + * else. Put it above BOOTMAPSZ to eliminate conflicts. + * + * pxefile_addr_r can be pretty much anywhere that doesn't conflict with + * something else. Put it above BOOTMAPSZ to eliminate conflicts. + * + * kernel_addr_r must be within the first 128M of RAM in order for the + * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will + * decompress itself to 0x8000 after the start of RAM, kernel_addr_r + * should not overlap that area, or the kernel will have to copy itself + * somewhere else before decompression. Similarly, the address of any other + * data passed to the kernel shouldn't overlap the start of RAM. Pushing + * this up to 16M allows for a sizable kernel to be decompressed below the + * compressed load address. + * + * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for + * the compressed kernel to be up to 16M too. + * + * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows + * for the FDT/DTB to be up to 1M, which is hopefully plenty. + */ +#define CONFIG_LOADADDR 0x81000000 +#define MEM_LAYOUT_ENV_SETTINGS \ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "fdt_addr_r=0x82000000\0" \ + "ramdisk_addr_r=0x82100000\0" + +/* Defines for SPL */ +#define CONFIG_SPL_TEXT_BASE 0x80108000 +#define CONFIG_SYS_SPL_MALLOC_START 0x80090000 +#define CONFIG_SPL_STACK 0x800ffffc + +/* For USB EHCI controller */ +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 + +#endif /* _TEGRA210_COMMON_H_ */ diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index 4d2ae28..9697431 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -94,6 +94,6 @@ #endif /* Now bring in the rest of the common code. */ -#include <configs/ti_armv7_common.h> +#include <configs/ti_armv7_omap.h> #endif /* __CONFIG_TI_AM335X_COMMON_H__ */ diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 0aea7d1..6dc5ebd 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -18,8 +18,6 @@ #define __CONFIG_TI_ARMV7_COMMON_H__ /* Common define for many platforms. */ -#define CONFIG_OMAP -#define CONFIG_OMAP_COMMON #define CONFIG_SYS_GENERIC_BOARD /* @@ -76,8 +74,11 @@ #define CONFIG_NR_DRAM_BANKS 1 #endif #define CONFIG_SYS_SDRAM_BASE 0x80000000 + +#ifndef CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ GENERATED_GBL_DATA_SIZE) +#endif /* Timer information. */ #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ @@ -86,39 +87,20 @@ #define CONFIG_I2C #define CONFIG_CMD_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 -#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 -#define CONFIG_SYS_I2C_OMAP24XX /* MMC/SD IP block */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_CMD_MMC /* McSPI IP block */ #define CONFIG_SPI -#define CONFIG_OMAP3_SPI #define CONFIG_CMD_SPI /* GPIO block */ -#define CONFIG_OMAP_GPIO #define CONFIG_CMD_GPIO /* - * GPMC NAND block. We support 1 device and the physical address to - * access CS0 at is 0x8000000. - */ -#ifdef CONFIG_NAND -#define CONFIG_NAND_OMAP_GPMC -#ifndef CONFIG_SYS_NAND_BASE -#define CONFIG_SYS_NAND_BASE 0x8000000 -#endif -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_CMD_NAND -#endif - -/* * The following are general good-enough settings for U-Boot. We set a * large malloc pool as we generally have a lot of DDR, and we opt for * function over binary size in the main portion of U-Boot as this is @@ -161,7 +143,7 @@ * mtdparts, both for ease of use in U-Boot and for passing information * on to the Linux kernel. */ -#if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NOR) || defined(CONFIG_NAND) +#if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NOR) || defined(CONFIG_NAND) || defined(CONFIG_NAND_DAVINCI) #define CONFIG_MTD_DEVICE /* Required for mtdparts */ #define CONFIG_CMD_MTDPARTS #endif @@ -252,15 +234,14 @@ #define CONFIG_SPL_EXT_SUPPORT #endif -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ -#endif +#define CONFIG_SYS_THUMB_BUILD /* General parts of the framework, required. */ #define CONFIG_SPL_I2C_SUPPORT #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SPL_BOARD_INIT diff --git a/include/configs/ks2_evm.h b/include/configs/ti_armv7_keystone2.h index e05d56c..2b6a229 100644 --- a/include/configs/ks2_evm.h +++ b/include/configs/ti_armv7_keystone2.h @@ -14,10 +14,7 @@ /* U-Boot Build Configuration */ #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */ -#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */ -#define CONFIG_SYS_CONSOLE_INFO_QUIET #define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_SYS_THUMB_BUILD /* SoC Configuration */ #define CONFIG_ARCH_CPU_INIT @@ -28,11 +25,9 @@ /* Memory Configuration */ #define CONFIG_NR_DRAM_BANKS 2 -#define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000 #define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */ #define CONFIG_STACKSIZE (512 << 10) /* 512 KiB */ -#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4 MiB */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - \ GENERATED_GBL_DATA_SIZE) @@ -49,15 +44,10 @@ #define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_START + \ CONFIG_SYS_SPL_MALLOC_SIZE + \ CONFIG_SPL_STACK_SIZE - 4) -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO -#define CONFIG_SPL_FRAMEWORK /* UART Configuration */ #define CONFIG_SYS_NS16550 @@ -68,13 +58,10 @@ #define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE #define CONFIG_SYS_NS16550_CLK clk_get_rate(KS2_CLK1_6) #define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 /* SPI Configuration */ -#define CONFIG_SPI #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_DAVINCI_SPI -#define CONFIG_CMD_SPI #define CONFIG_SYS_SPI_CLK clk_get_rate(KS2_CLK1_6) #define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED @@ -148,7 +135,6 @@ #define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE /* I2C Configuration */ -#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_DAVINCI #define CONFIG_SYS_DAVINCI_I2C_SPEED 100000 #define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */ @@ -185,7 +171,6 @@ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x100000 #define CONFIG_MTD_PARTITIONS -#define CONFIG_MTD_DEVICE #define CONFIG_RBTREE #define CONFIG_LZO #define MTDIDS_DEFAULT "nand0=davinci_nand.0" @@ -195,10 +180,9 @@ /* USB Configuration */ #define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_DWC3 #define CONFIG_USB_XHCI_KEYSTONE #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 -#define CONFIG_USB_STORAGE -#define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION #define CONFIG_FS_FAT #define CONFIG_SYS_CACHELINE_SIZE 64 @@ -208,65 +192,46 @@ #define CONFIG_USB_PHY_CFG_BASE KS2_USB_PHY_CFG_BASE /* U-Boot command configuration */ -#define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP -#define CONFIG_CMD_I2C #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES -#define CONFIG_CMD_MTDPARTS #define CONFIG_CMD_NAND #define CONFIG_CMD_UBI #define CONFIG_CMD_UBIFS #define CONFIG_CMD_SF #define CONFIG_CMD_EEPROM #define CONFIG_CMD_USB -#define CONFIG_CMD_FAT -#define CONFIG_CMD_FS_GENERIC /* U-Boot general configuration */ -#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_MISC_INIT_R -#define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_PBSIZE 2048 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_LONGHELP #define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC -#define CONFIG_CMDLINE_EDITING -#define CONFIG_VERSION_VARIABLE #define CONFIG_TIMESTAMP /* EDMA3 */ #define CONFIG_TI_EDMA3 -#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTFILE "uImage" #define CONFIG_EXTRA_ENV_SETTINGS \ + DEFAULT_LINUX_BOOT_ENV \ CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ "boot=ubi\0" \ "tftp_root=/\0" \ "nfs_root=/export\0" \ "mem_lpae=1\0" \ "mem_reserve=512M\0" \ - "addr_fdt=0x87000000\0" \ - "addr_kern=0x88000000\0" \ - "addr_uboot=0x87000000\0" \ - "addr_fs=0x82000000\0" \ "addr_ubi=0x82000000\0" \ "addr_secdb_key=0xc000000\0" \ - "fdt_high=0xffffffff\0" \ - "name_kern=uImage-keystone-evm.bin\0" \ + "name_kern=zImage\0" \ "run_mon=mon_install ${addr_mon}\0" \ - "run_kern=bootm ${addr_kern} - ${addr_fdt}\0" \ + "run_kern=bootz ${loadaddr} - ${fdtaddr}\0" \ "init_net=run args_all args_net\0" \ "init_ubi=run args_all args_ubi; " \ "ubi part ubifs; ubifsmount ubi:boot;" \ "ubifsload ${addr_secdb_key} securedb.key.bin;\0" \ - "get_fdt_net=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0" \ - "get_fdt_ubi=ubifsload ${addr_fdt} ${name_fdt}\0" \ - "get_kern_net=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0" \ - "get_kern_ubi=ubifsload ${addr_kern} ${name_kern}\0" \ + "get_fdt_net=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \ + "get_fdt_ubi=ubifsload ${fdtaddr} ${name_fdt}\0" \ + "get_kern_net=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \ + "get_kern_ubi=ubifsload ${loadaddr} ${name_kern}\0" \ "get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \ "get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0" \ "get_uboot_net=dhcp ${addr_uboot} ${tftp_root}/${name_uboot}\0" \ @@ -279,10 +244,10 @@ "root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}," \ "${nfs_options} ip=dhcp\0" \ "nfs_options=v3,tcp,rsize=4096,wsize=4096\0" \ - "get_fdt_ramfs=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0" \ - "get_kern_ramfs=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0" \ + "get_fdt_ramfs=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \ + "get_kern_ramfs=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \ "get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \ - "get_fs_ramfs=dhcp ${addr_fs} ${tftp_root}/${name_fs}\0" \ + "get_fs_ramfs=dhcp ${rdaddr} ${tftp_root}/${name_fs}\0" \ "get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0" \ "burn_ubi=nand erase.part ubifs; " \ "nand write ${addr_ubi} ubifs ${filesize}\0" \ @@ -301,15 +266,26 @@ #define CONFIG_BOOTARGS \ /* Linux interfacing */ -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP -#define CONFIG_SYS_BARGSIZE 1024 -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x08000000) -#define CONFIG_LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100) -#define CONFIG_SUPPORT_RAW_INITRD +/* Now for the remaining common defines */ +#include <configs/ti_armv7_common.h> + +/* We wont be loading up OS from SPL for now.. */ +#undef CONFIG_SPL_OS_BOOT + +/* We do not have MMC support.. yet.. */ +#undef CONFIG_SPL_LIBDISK_SUPPORT +#undef CONFIG_SPL_MMC_SUPPORT +#undef CONFIG_SPL_FAT_SUPPORT +#undef CONFIG_SPL_EXT_SUPPORT +#undef CONFIG_MMC +#undef CONFIG_GENERIC_MMC +#undef CONFIG_CMD_MMC + +/* And no support for GPIO, yet.. */ +#undef CONFIG_SPL_GPIO_SUPPORT +#undef CONFIG_CMD_GPIO /* we may include files below only after all above definitions */ #include <asm/arch/hardware.h> diff --git a/include/configs/ti_armv7_omap.h b/include/configs/ti_armv7_omap.h new file mode 100644 index 0000000..7548170 --- /dev/null +++ b/include/configs/ti_armv7_omap.h @@ -0,0 +1,49 @@ +/* + * ti_armv7_omap.h + * + * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + * + * The various ARMv7 SoCs from TI all share a number of IP blocks when + * implementing a given feature. This is meant to isolate the features + * that are based on OMAP architecture. + */ +#ifndef __CONFIG_TI_ARMV7_OMAP_H__ +#define __CONFIG_TI_ARMV7_OMAP_H__ + +/* Common defines for all OMAP architecture based SoCs */ +#define CONFIG_OMAP +#define CONFIG_OMAP_COMMON + +/* I2C IP block */ +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 +#define CONFIG_SYS_I2C_OMAP24XX + +/* MMC/SD IP block */ +#define CONFIG_OMAP_HSMMC + +/* SPI IP Block */ +#define CONFIG_OMAP3_SPI + +/* GPIO block */ +#define CONFIG_OMAP_GPIO + +/* + * GPMC NAND block. We support 1 device and the physical address to + * access CS0 at is 0x8000000. + */ +#ifdef CONFIG_NAND +#define CONFIG_NAND_OMAP_GPMC +#ifndef CONFIG_SYS_NAND_BASE +#define CONFIG_SYS_NAND_BASE 0x8000000 +#endif +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_CMD_NAND +#endif + +/* Now for the remaining common defines */ +#include <configs/ti_armv7_common.h> + +#endif /* __CONFIG_TI_ARMV7_OMAP_H__ */ diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index 429b109..be231a5 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -84,6 +84,6 @@ #endif /* Now bring in the rest of the common code. */ -#include <configs/ti_armv7_common.h> +#include <configs/ti_armv7_omap.h> #endif /* __CONFIG_TI_OMAP3_COMMON_H__ */ diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index e966134..b299aed 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -52,7 +52,7 @@ #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS #endif -#include <configs/ti_armv7_common.h> +#include <configs/ti_armv7_omap.h> /* * Hardware drivers @@ -171,6 +171,7 @@ /* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */ #undef CONFIG_SYS_I2C #undef CONFIG_SYS_I2C_OMAP24XX +#undef CONFIG_SPL_I2C_SUPPORT #endif #endif /* __CONFIG_TI_OMAP4_COMMON_H */ diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index f3e5a75..fe04692 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -40,14 +40,12 @@ #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS #endif -#ifndef CONFIG_SPL_BUILD #define CONFIG_PALMAS_POWER -#endif #include <asm/arch/cpu.h> #include <asm/arch/omap.h> -#include <configs/ti_armv7_common.h> +#include <configs/ti_armv7_omap.h> /* * Hardware drivers @@ -135,7 +133,7 @@ "if test ${dofastboot} -eq 1; then " \ "echo Boot fastboot requested, resetting dofastboot ...;" \ "setenv dofastboot 0; saveenv;" \ - "echo Booting into fastboot ...; fastboot;" \ + "echo Booting into fastboot ...; fastboot 0;" \ "fi;" \ "run findfdt; " \ "run mmcboot;" \ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 5c7a342..908be26 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -9,15 +9,18 @@ #ifndef __CONFIG_UNIPHIER_COMMON_H__ #define __CONFIG_UNIPHIER_COMMON_H__ -#if defined(CONFIG_MACH_PH1_PRO4) +#if defined(CONFIG_MACH_PH1_SLD3) #define CONFIG_DDR_NUM_CH0 2 -#define CONFIG_DDR_NUM_CH1 2 +#define CONFIG_DDR_NUM_CH1 1 +#define CONFIG_DDR_NUM_CH2 1 /* Physical start address of SDRAM */ #define CONFIG_SDRAM0_BASE 0x80000000 #define CONFIG_SDRAM0_SIZE 0x20000000 -#define CONFIG_SDRAM1_BASE 0xa0000000 +#define CONFIG_SDRAM1_BASE 0xc0000000 #define CONFIG_SDRAM1_SIZE 0x20000000 +#define CONFIG_SDRAM2_BASE 0xc0000000 +#define CONFIG_SDRAM2_SIZE 0x10000000 #endif #if defined(CONFIG_MACH_PH1_LD4) @@ -31,6 +34,17 @@ #define CONFIG_SDRAM1_SIZE 0x10000000 #endif +#if defined(CONFIG_MACH_PH1_PRO4) +#define CONFIG_DDR_NUM_CH0 2 +#define CONFIG_DDR_NUM_CH1 2 + +/* Physical start address of SDRAM */ +#define CONFIG_SDRAM0_BASE 0x80000000 +#define CONFIG_SDRAM0_SIZE 0x20000000 +#define CONFIG_SDRAM1_BASE 0xa0000000 +#define CONFIG_SDRAM1_SIZE 0x20000000 +#endif + #if defined(CONFIG_MACH_PH1_SLD8) #define CONFIG_DDR_NUM_CH0 1 #define CONFIG_DDR_NUM_CH1 1 @@ -177,8 +191,13 @@ #define CONFIG_NAND_DENALI_ECC_SIZE 1024 +#ifdef CONFIG_MACH_PH1_SLD3 +#define CONFIG_SYS_NAND_REGS_BASE 0xf8100000 +#define CONFIG_SYS_NAND_DATA_BASE 0xf8000000 +#else #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 +#endif #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10) @@ -209,7 +228,6 @@ #define CONFIG_LOADADDR 0x84000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_BOOTFILE "fit.itb" #define CONFIG_CMDLINE_EDITING /* add command line history */ @@ -222,25 +240,61 @@ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \ "tftpboot; bootm;" -#define CONFIG_BOOTARGS " user_debug=0x1f init=/sbin/init" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "image_offset=0x00080000\0" \ - "image_size=0x00f00000\0" \ - "verify=n\0" \ - "nandupdate=nand erase 0 0x100000 &&" \ - "tftpboot u-boot-spl.bin &&" \ - "nand write $loadaddr 0 0x10000 &&" \ - "tftpboot u-boot-dtb.img &&" \ - "nand write $loadaddr 0x10000 0xf0000\0" \ - "norboot=run add_default_bootargs &&" \ - "bootm $image_offset\0" \ - "nandboot=run add_default_bootargs &&" \ - "nand read $loadaddr $image_offset $image_size &&" \ - "bootm\0" \ - "add_default_bootargs=setenv bootargs $bootargs" \ - " console=ttyS0,$baudrate\0" \ +#define CONFIG_BOOTARGS " earlyprintk loglevel=8" + +#ifdef CONFIG_FIT +#define CONFIG_BOOTFILE "fitImage" +#define LINUXBOOT_ENV_SETTINGS \ + "fit_addr=0x00100000\0" \ + "fit_addr_r=0x84100000\0" \ + "fit_size=0x00f00000\0" \ + "norboot=run add_default_bootargs &&" \ + "bootm $fit_addr\0" \ + "nandboot=run add_default_bootargs &&" \ + "nand read $fit_addr_r $fit_addr $fit_size &&" \ + "bootm $fit_addr_r\0" \ + "tftpboot=run add_default_bootargs &&" \ + "tftpboot $fit_addr_r $bootfile &&" \ + "bootm $fit_addr_r\0" +#else +#define CONFIG_BOOTFILE "uImage" +#define LINUXBOOT_ENV_SETTINGS \ + "fdt_addr=0x00100000\0" \ + "fdt_addr_r=0x84100000\0" \ + "fdt_size=0x00008000\0" \ + "fdt_file=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "kernel_addr=0x00200000\0" \ + "kernel_addr_r=0x84200000\0" \ + "kernel_size=0x00800000\0" \ + "ramdisk_addr=0x00a00000\0" \ + "ramdisk_addr_r=0x84a00000\0" \ + "ramdisk_size=0x00600000\0" \ + "ramdisk_file=rootfs.cpio.uboot\0" \ + "norboot=run add_default_bootargs &&" \ + "bootm $kernel_addr $ramdisk_addr $fdt_addr\0" \ + "nandboot=run add_default_bootargs &&" \ + "nand read $kernel_addr_r $kernel_addr $kernel_size &&" \ + "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \ + "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \ + "bootm $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \ + "tftpboot=run add_default_bootargs &&" \ + "tftpboot $kernel_addr_r $bootfile &&" \ + "tftpboot $ramdisk_addr_r $ramdisk_file &&" \ + "tftpboot $fdt_addr_r $fdt_file &&" \ + "bootm $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "verify=n\0" \ + "nandupdate=nand erase 0 0x00100000 &&" \ + "tftpboot u-boot-spl.bin &&" \ + "nand write $loadaddr 0 0x00010000 &&" \ + "tftpboot u-boot-dtb.img &&" \ + "nand write $loadaddr 0x00010000 0x000f0000\0" \ + "add_default_bootargs=setenv bootargs $bootargs" \ + " console=ttyS0,$baudrate\0" \ + LINUXBOOT_ENV_SETTINGS /* Open Firmware flat tree */ #define CONFIG_OF_LIBFDT @@ -259,7 +313,8 @@ #define CONFIG_SYS_SDRAM_SIZE (CONFIG_SDRAM0_SIZE) #endif -#if defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8) +#if defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_LD4) || \ + defined(CONFIG_MACH_PH1_SLD8) #define CONFIG_SPL_TEXT_BASE 0x00040000 #endif #if defined(CONFIG_MACH_PH1_PRO4) diff --git a/include/configs/warp.h b/include/configs/warp.h index d5c3215..fa102bb 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -80,8 +80,8 @@ #define CONFIG_USB_GADGET #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 @@ -89,7 +89,7 @@ #define CONFIG_G_DNL_MANUFACTURER "FSL" #define CONFIG_CMD_DFU -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index ad82ed6..68853b6 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -40,7 +40,6 @@ #define CONFIG_IDENT_STRING " Xilinx ZynqMP" -#define CONFIG_SYS_TEXT_BASE 0x8000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) /* Flat Device Tree Definitions */ @@ -53,16 +52,20 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x400000) /* Serial setup */ -#define CONFIG_ZYNQ_SERIAL_UART0 -#define CONFIG_ZYNQ_SERIAL +#if defined(CONFIG_ZYNQMP_DCC) +# define CONFIG_ARM_DCC +# define CONFIG_CPU_ARMV8 +#else +# if defined(CONFIG_ZYNQ_SERIAL_UART0) || defined(CONFIG_ZYNQ_SERIAL_UART1) +# define CONFIG_ZYNQ_SERIAL +# endif +#endif #define CONFIG_CONS_INDEX 0 #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } -#define CONFIG_ZYNQ_SDHCI0 - /* Command line configuration */ #define CONFIG_CMD_ENV #define CONFIG_CMD_EXT2 @@ -73,6 +76,16 @@ #define CONFIG_CMD_ELF #define CONFIG_MP +#define CONFIG_CMD_MII + +/* BOOTP options */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_MAY_FAIL +#define CONFIG_BOOTP_SERVERIP + /* SPI */ #ifdef CONFIG_ZYNQ_SPI # define CONFIG_SPI_FLASH_SST @@ -127,8 +140,16 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_MAXARGS 64 -#define CONFIG_ZYNQ_I2C0 -#define CONFIG_SYS_I2C_ZYNQ +/* Ethernet driver */ +#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) || \ + defined(CONFIG_ZYNQ_GEM2) || defined(CONFIG_ZYNQ_GEM3) +# define CONFIG_NET_MULTI +# define CONFIG_ZYNQ_GEM +# define CONFIG_MII +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +# define CONFIG_PHYLIB +# define CONFIG_PHY_MARVELL +#endif /* I2C */ #if defined(CONFIG_SYS_I2C_ZYNQ) @@ -138,8 +159,6 @@ # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 #endif -#define CONFIG_ZYNQMP_EEPROM - /* EEPROM */ #ifdef CONFIG_ZYNQMP_EEPROM # define CONFIG_CMD_EEPROM @@ -150,6 +169,17 @@ # define CONFIG_SYS_EEPROM_SIZE (64 * 1024) #endif +#ifdef CONFIG_AHCI +#define CONFIG_LIBATA +#define CONFIG_SCSI_AHCI +#define CONFIG_SCSI_AHCI_PLAT +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 +#define CONFIG_SYS_SCSI_MAX_LUN 1 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ + CONFIG_SYS_SCSI_MAX_LUN) +#define CONFIG_CMD_SCSI +#endif + #define CONFIG_FIT #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h new file mode 100644 index 0000000..c872f7c --- /dev/null +++ b/include/configs/xilinx_zynqmp_ep.h @@ -0,0 +1,27 @@ +/* + * Configuration for Xilinx ZynqMP emulation + * platforms. See zynqmp-common.h for ZynqMP + * common configs + * + * (C) Copyright 2014 - 2015 Xilinx, Inc. + * Michal Simek <michal.simek@xilinx.com> + * Siva Durga Prasad Paladugu <sivadur@xilinx.com> + * + * Based on Configuration for Versatile Express + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQMP_EP_H +#define __CONFIG_ZYNQMP_EP_H + +#define CONFIG_ZYNQ_SERIAL_UART0 +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_I2C0 +#define CONFIG_SYS_I2C_ZYNQ +#define CONFIG_ZYNQ_EEPROM +#define CONFIG_AHCI + +#include <configs/xilinx_zynqmp.h> + +#endif /* __CONFIG_ZYNQMP_EP_H */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 5526214..98bebd0 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -110,10 +110,10 @@ # define CONFIG_CI_UDC /* ChipIdea CI13xxx UDC */ # define CONFIG_USB_GADGET # define CONFIG_USB_GADGET_DUALSPEED -# define CONFIG_USBDOWNLOAD_GADGET +# define CONFIG_USB_GADGET_DOWNLOAD # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 # define DFU_DEFAULT_POLL_TIMEOUT 300 -# define CONFIG_DFU_FUNCTION +# define CONFIG_USB_FUNCTION_DFU # define CONFIG_DFU_RAM # define CONFIG_USB_GADGET_VBUS_DRAW 2 # define CONFIG_G_DNL_VENDOR_NUM 0x03FD @@ -123,7 +123,7 @@ # define CONFIG_USB_CABLE_CHECK # define CONFIG_CMD_DFU # define CONFIG_CMD_THOR_DOWNLOAD -# define CONFIG_THOR_FUNCTION +# define CONFIG_USB_FUNCTION_THOR # define DFU_ALT_INFO_RAM \ "dfu_ram_info=" \ "set dfu_alt_info " \ diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h index 16b9047..7a1b872 100644 --- a/include/configs/zynq_zc770.h +++ b/include/configs/zynq_zc770.h @@ -21,6 +21,9 @@ # define CONFIG_ZYNQ_SDHCI0 # define CONFIG_ZYNQ_SPI +#elif defined(CONFIG_ZC770_XM011) +# define CONFIG_ZYNQ_SERIAL_UART1 + #elif defined(CONFIG_ZC770_XM012) # define CONFIG_ZYNQ_SERIAL_UART1 # undef CONFIG_SYS_NO_FLASH |