diff options
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/mbus.h | 73 | ||||
| -rw-r--r-- | include/linux/string.h | 7 | ||||
| -rw-r--r-- | include/linux/usb/dwc3.h | 8 | ||||
| -rw-r--r-- | include/linux/usb/musb.h | 2 |
4 files changed, 89 insertions, 1 deletions
diff --git a/include/linux/mbus.h b/include/linux/mbus.h new file mode 100644 index 0000000..717cbea --- /dev/null +++ b/include/linux/mbus.h @@ -0,0 +1,73 @@ +/* + * Marvell MBUS common definitions. + * + * Copyright (C) 2008 Marvell Semiconductor + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __LINUX_MBUS_H +#define __LINUX_MBUS_H + +struct resource; + +struct mbus_dram_target_info { + /* + * The 4-bit MBUS target ID of the DRAM controller. + */ + u8 mbus_dram_target_id; + + /* + * The base address, size, and MBUS attribute ID for each + * of the possible DRAM chip selects. Peripherals are + * required to support at least 4 decode windows. + */ + int num_cs; + struct mbus_dram_window { + u8 cs_index; + u8 mbus_attr; + u32 base; + u32 size; + } cs[4]; +}; + +struct mvebu_mbus_state { + void __iomem *mbuswins_base; + void __iomem *sdramwins_base; + struct dentry *debugfs_root; + struct dentry *debugfs_sdram; + struct dentry *debugfs_devs; + const struct mvebu_mbus_soc_data *soc; + int hw_io_coherency; +}; + +/* Flags for PCI/PCIe address decoding regions */ +#define MVEBU_MBUS_PCI_IO 0x1 +#define MVEBU_MBUS_PCI_MEM 0x2 +#define MVEBU_MBUS_PCI_WA 0x3 + +/* + * Magic value that explicits that we don't need a remapping-capable + * address decoding window. + */ +#define MVEBU_MBUS_NO_REMAP (0xffffffff) + +/* Maximum size of a mbus window name */ +#define MVEBU_MBUS_MAX_WINNAME_SZ 32 + +const struct mbus_dram_target_info *mvebu_mbus_dram_info(void); +void mvebu_mbus_get_pcie_mem_aperture(struct resource *res); +void mvebu_mbus_get_pcie_io_aperture(struct resource *res); +int mvebu_mbus_add_window_remap_by_id(unsigned int target, + unsigned int attribute, + phys_addr_t base, size_t size, + phys_addr_t remap); +int mvebu_mbus_add_window_by_id(unsigned int target, unsigned int attribute, + phys_addr_t base, size_t size); +int mvebu_mbus_del_window(phys_addr_t base, size_t size); +int mbus_dt_setup_win(struct mvebu_mbus_state *mbus, + u32 base, u32 size, u8 target, u8 attr); + +#endif /* __LINUX_MBUS_H */ diff --git a/include/linux/string.h b/include/linux/string.h index 8e44855..96348d6 100644 --- a/include/linux/string.h +++ b/include/linux/string.h @@ -20,6 +20,10 @@ extern __kernel_size_t strspn(const char *,const char *); */ #include <asm/string.h> +#ifndef __HAVE_ARCH_BCOPY +char *bcopy(const char *src, char *dest, int count); +#endif + #ifndef __HAVE_ARCH_STRCPY extern char * strcpy(char *,const char *); #endif @@ -89,6 +93,9 @@ extern void * memchr(const void *,int,__kernel_size_t); void *memchr_inv(const void *, int, size_t); #endif +unsigned long ustrtoul(const char *cp, char **endp, unsigned int base); +unsigned long long ustrtoull(const char *cp, char **endp, unsigned int base); + #ifdef __cplusplus } #endif diff --git a/include/linux/usb/dwc3.h b/include/linux/usb/dwc3.h index 97d179a..7edc760 100644 --- a/include/linux/usb/dwc3.h +++ b/include/linux/usb/dwc3.h @@ -41,7 +41,8 @@ #define DWC3_REG_OFFSET 0xC100 struct g_event_buffer { - u64 g_evntadr; + u32 g_evntadrlo; + u32 g_evntadrhi; u32 g_evntsiz; u32 g_evntcount; }; @@ -185,4 +186,9 @@ struct dwc3 { /* offset: 0xC100 */ #define DWC3_GTXFIFOSIZ_TXFDEF(n) ((n) & 0xffff) #define DWC3_GTXFIFOSIZ_TXFSTADDR(n) ((n) & 0xffff0000) +/* Device Control Register */ +#define DWC3_DCTL_RUN_STOP (1 << 31) +#define DWC3_DCTL_CSFTRST (1 << 30) +#define DWC3_DCTL_LSFTRST (1 << 29) + #endif /* __DWC3_H_ */ diff --git a/include/linux/usb/musb.h b/include/linux/usb/musb.h index 9f65ef9..075d222 100644 --- a/include/linux/usb/musb.h +++ b/include/linux/usb/musb.h @@ -14,6 +14,8 @@ #define __deprecated #endif +#include <linux/compat.h> + /* The USB role is defined by the connector used on the board, so long as * standards are being followed. (Developer boards sometimes won't.) */ |