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-rw-r--r--include/configs/ls1012a_common.h3
-rw-r--r--include/configs/ls1021aqds.h10
-rw-r--r--include/configs/ls1021atwr.h10
-rw-r--r--include/configs/ls1043a_common.h12
-rw-r--r--include/configs/ls1043aqds.h10
-rw-r--r--include/configs/ls1043ardb.h21
-rw-r--r--include/configs/ls1046a_common.h20
-rw-r--r--include/configs/ls1046aqds.h10
-rw-r--r--include/configs/ls1046ardb.h20
-rw-r--r--include/configs/ls2080a_common.h15
-rw-r--r--include/configs/ls2080aqds.h27
-rw-r--r--include/configs/ls2080ardb.h104
12 files changed, 176 insertions, 86 deletions
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index 561b81a..bd9b0d3 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -55,9 +55,8 @@
#define CONFIG_FSL_QSPI
#define QSPI0_AMBA_BASE 0x40000000
#define CONFIG_SPI_FLASH_SPANSION
-#define CONFIG_SPI_FLASH_BAR
-#define FSL_QSPI_FLASH_SIZE (1 << 24)
+#define FSL_QSPI_FLASH_SIZE SZ_64M
#define FSL_QSPI_FLASH_NUM 2
/*
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index a27d70e..8cf4eaa 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -69,7 +69,7 @@ unsigned long get_board_ddr_clk(void);
#endif
#ifdef CONFIG_QSPI_BOOT
-#define CONFIG_SYS_TEXT_BASE 0x40010000
+#define CONFIG_SYS_TEXT_BASE 0x40100000
#endif
#ifdef CONFIG_NAND_BOOT
@@ -497,7 +497,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_FSL_DEVICE_DISABLE
-#define CONFIG_SYS_QE_FW_ADDR 0x600c0000
+#define CONFIG_SYS_QE_FW_ADDR 0x60940000
#ifdef CONFIG_LPUART
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -548,14 +548,14 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_ENV_OVERWRITE
#if defined(CONFIG_SD_BOOT)
-#define CONFIG_ENV_OFFSET 0x100000
+#define CONFIG_ENV_OFFSET 0x300000
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_SIZE 0x2000
#elif defined(CONFIG_QSPI_BOOT)
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
-#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */
+#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
#define CONFIG_ENV_SECT_SIZE 0x10000
#elif defined(CONFIG_NAND_BOOT)
#define CONFIG_ENV_IS_IN_NAND
@@ -563,7 +563,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_ENV_OFFSET (10 * CONFIG_SYS_NAND_BLOCK_SIZE)
#else
#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000)
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
#endif
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 60c3d5d..f0033b8 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -132,7 +132,7 @@
#endif
#ifdef CONFIG_QSPI_BOOT
-#define CONFIG_SYS_TEXT_BASE 0x40010000
+#define CONFIG_SYS_TEXT_BASE 0x40100000
#endif
#ifndef CONFIG_SYS_TEXT_BASE
@@ -408,7 +408,7 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#endif
-#define CONFIG_SYS_QE_FW_ADDR 0x600c0000
+#define CONFIG_SYS_QE_FW_ADDR 0x60940000
/*
* Environment
@@ -416,18 +416,18 @@
#define CONFIG_ENV_OVERWRITE
#if defined(CONFIG_SD_BOOT)
-#define CONFIG_ENV_OFFSET 0x100000
+#define CONFIG_ENV_OFFSET 0x300000
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_SIZE 0x20000
#elif defined(CONFIG_QSPI_BOOT)
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SIZE 0x2000
-#define CONFIG_ENV_OFFSET 0x100000
+#define CONFIG_ENV_OFFSET 0x300000
#define CONFIG_ENV_SECT_SIZE 0x10000
#else
#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000)
#define CONFIG_ENV_SIZE 0x20000
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
#endif
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index b35f96d..1b0106d 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -205,20 +205,20 @@
#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
#ifdef CONFIG_NAND_BOOT
-/* Store Fman ucode at offeset 0x160000(11 blocks). */
+/* Store Fman ucode at offeset 0x900000(72 blocks). */
#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_FMAN_FW_ADDR (11 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_FMAN_FW_ADDR (72 * CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_SD_BOOT)
/*
* PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
* about 1MB (2040 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 2040 + 16 = 2064, enlarge it to 2080(0x820).
+ * 0x2000 (16 blocks), 8 + 2040 + 16 = 2064, enlarge it to 18432(0x4800).
*/
#define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
+#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x4800)
#elif defined(CONFIG_QSPI_BOOT)
#define CONFIG_SYS_QE_FW_IN_SPIFLASH
-#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000
+#define CONFIG_SYS_FMAN_FW_ADDR 0x40900000
#define CONFIG_ENV_SPI_BUS 0
#define CONFIG_ENV_SPI_CS 0
#define CONFIG_ENV_SPI_MAX_HZ 1000000
@@ -226,7 +226,7 @@
#else
#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
/* FMan fireware Pre-load address */
-#define CONFIG_SYS_FMAN_FW_ADDR 0x60300000
+#define CONFIG_SYS_FMAN_FW_ADDR 0x60900000
#endif
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index b14e944..04d74ac 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -12,7 +12,7 @@
#if defined(CONFIG_NAND_BOOT) || defined(CONFIG_SD_BOOT)
#define CONFIG_SYS_TEXT_BASE 0x82000000
#elif defined(CONFIG_QSPI_BOOT)
-#define CONFIG_SYS_TEXT_BASE 0x40010000
+#define CONFIG_SYS_TEXT_BASE 0x40100000
#else
#define CONFIG_SYS_TEXT_BASE 0x60100000
#endif
@@ -413,20 +413,20 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_NAND_BOOT
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE 0x2000
-#define CONFIG_ENV_OFFSET (10 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET (24 * CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_SD_BOOT)
-#define CONFIG_ENV_OFFSET (1024 * 1024)
+#define CONFIG_ENV_OFFSET (3 * 1024 * 1024)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_SIZE 0x2000
#elif defined(CONFIG_QSPI_BOOT)
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
-#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */
+#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
#define CONFIG_ENV_SECT_SIZE 0x10000
#else
#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000)
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000)
#define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE 0x20000
#endif
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 5e570cd..2647b15 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -235,31 +235,34 @@
#if defined(CONFIG_NAND_BOOT)
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE 0x2000
-#define CONFIG_ENV_OFFSET (10 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET (24 * CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_SD_BOOT)
-#define CONFIG_ENV_OFFSET (1024 * 1024)
+#define CONFIG_ENV_OFFSET (3 * 1024 * 1024)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_SIZE 0x2000
#else
#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000)
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000)
#define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE 0x20000
#endif
/* FMan */
#ifndef SPL_NO_FMAN
-#ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_FMAN_ENET
+#define AQR105_IRQ_MASK 0x40000000
+
+#ifdef CONFIG_NET
#define CONFIG_PHYLIB
-#define CONFIG_PHYLIB_10G
#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
-
#define CONFIG_PHY_VITESSE
#define CONFIG_PHY_REALTEK
+#endif
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+#define CONFIG_FMAN_ENET
+#define CONFIG_PHYLIB_10G
#define CONFIG_PHY_AQUANTIA
-#define AQR105_IRQ_MASK 0x40000000
#define RGMII_PHY1_ADDR 0x1
#define RGMII_PHY2_ADDR 0x2
@@ -281,7 +284,7 @@
!defined(CONFIG_QSPI_BOOT)
#define CONFIG_U_QE
#endif
-#define CONFIG_SYS_QE_FW_ADDR 0x60600000
+#define CONFIG_SYS_QE_FW_ADDR 0x60940000
#endif
/* USB */
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 1fbafaa..b66b8ac 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -138,6 +138,16 @@
#define CONFIG_SYS_I2C_MXC_I2C3
#define CONFIG_SYS_I2C_MXC_I2C4
+/* PCIe */
+#define CONFIG_PCIE1 /* PCIE controller 1 */
+#define CONFIG_PCIE2 /* PCIE controller 2 */
+#define CONFIG_PCIE3 /* PCIE controller 3 */
+
+#ifdef CONFIG_PCI
+#define CONFIG_PCI_SCAN_SHOW
+#define CONFIG_CMD_PCI
+#endif
+
/* Command line configuration */
/* MMC */
@@ -163,23 +173,23 @@
/*
* PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
* about 1MB (2048 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080(0x820).
+ * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 18432(0x4800).
*/
#define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
+#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x4800)
#elif defined(CONFIG_QSPI_BOOT)
#define CONFIG_SYS_QE_FW_IN_SPIFLASH
-#define CONFIG_SYS_FMAN_FW_ADDR 0x40300000
+#define CONFIG_SYS_FMAN_FW_ADDR 0x40900000
#define CONFIG_ENV_SPI_BUS 0
#define CONFIG_ENV_SPI_CS 0
#define CONFIG_ENV_SPI_MAX_HZ 1000000
#define CONFIG_ENV_SPI_MODE 0x03
#elif defined(CONFIG_NAND_BOOT)
#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_FMAN_FW_ADDR (72 * CONFIG_SYS_NAND_BLOCK_SIZE)
#else
#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_FMAN_FW_ADDR 0x60300000
+#define CONFIG_SYS_FMAN_FW_ADDR 0x60900000
#endif
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 0cf6010..5d2e819 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -12,7 +12,7 @@
#if defined(CONFIG_NAND_BOOT) || defined(CONFIG_SD_BOOT)
#define CONFIG_SYS_TEXT_BASE 0x82000000
#elif defined(CONFIG_QSPI_BOOT)
-#define CONFIG_SYS_TEXT_BASE 0x40010000
+#define CONFIG_SYS_TEXT_BASE 0x40100000
#else
#define CONFIG_SYS_TEXT_BASE 0x60100000
#endif
@@ -447,20 +447,20 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_NAND_BOOT
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE 0x2000
-#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET (24 * CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_SD_BOOT)
-#define CONFIG_ENV_OFFSET (1024 * 1024)
+#define CONFIG_ENV_OFFSET (3 * 1024 * 1024)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_SIZE 0x2000
#elif defined(CONFIG_QSPI_BOOT)
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
-#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */
+#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
#define CONFIG_ENV_SECT_SIZE 0x10000
#else
#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000)
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000)
#define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE 0x20000
#endif
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index 67ee626..6f649a6 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -169,27 +169,29 @@
#if defined(CONFIG_SD_BOOT)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_ENV_OFFSET (1024 * 1024)
+#define CONFIG_ENV_OFFSET (3 * 1024 * 1024)
#define CONFIG_ENV_SIZE 0x2000
#else
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
-#define CONFIG_ENV_OFFSET 0x200000 /* 2MB */
+#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */
#endif
+#define AQR105_IRQ_MASK 0x80000000
/* FMan */
#ifndef SPL_NO_FMAN
-#ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_FMAN_ENET
+
+#ifdef CONFIG_NET
#define CONFIG_PHYLIB
-#define CONFIG_PHYLIB_10G
#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
-
#define CONFIG_PHY_REALTEK
-#define CONFIG_PHY_AQUANTIA
-#define AQR105_IRQ_MASK 0x80000000
+#endif
+#ifdef CONFIG_SYS_DPAA_FMAN
+#define CONFIG_FMAN_ENET
+#define CONFIG_PHY_AQUANTIA
+#define CONFIG_PHYLIB_10G
#define RGMII_PHY1_ADDR 0x1
#define RGMII_PHY2_ADDR 0x2
@@ -200,6 +202,7 @@
#define CONFIG_ETHPRIME "FM1@DTSEC3"
#endif
+
#endif
/* QSPI device */
@@ -208,7 +211,6 @@
#define CONFIG_SPI_FLASH_SPANSION
#define FSL_QSPI_FLASH_SIZE (1 << 26)
#define FSL_QSPI_FLASH_NUM 2
-#define CONFIG_SPI_FLASH_BAR
#endif
#endif
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 285e48d..b044768 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -1,4 +1,5 @@
/*
+ * Copyright 2017 NXP
* Copyright (C) 2014 Freescale Semiconductor
*
* SPDX-License-Identifier: GPL-2.0+
@@ -28,6 +29,12 @@
#else
#define CONFIG_SYS_TEXT_BASE 0x30100000
#endif
+#else
+#define CONFIG_SYS_TEXT_BASE 0x20100000
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
+#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
+#define CONFIG_ENV_SECT_SIZE 0x10000
#endif
#define CONFIG_SUPPORT_RAW_INITRD
@@ -185,18 +192,18 @@ unsigned long long get_qixis_addr(void);
"ramdisk_size=0x2000000\0" \
"fdt_high=0xa0000000\0" \
"initrd_high=0xffffffffffffffff\0" \
- "kernel_start=0x581200000\0" \
+ "kernel_start=0x581000000\0" \
"kernel_load=0xa0000000\0" \
"kernel_size=0x2800000\0" \
"console=ttyAMA0,38400n8\0" \
- "mcinitcmd=fsl_mc start mc 0x580300000" \
- " 0x580800000 \0"
+ "mcinitcmd=fsl_mc start mc 0x580a00000" \
+ " 0x580e00000 \0"
#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \
"earlycon=uart8250,mmio,0x21c0500 " \
"ramdisk_size=0x2000000 default_hugepagesz=2m" \
" hugepagesz=2m hugepages=256"
-#define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x580700000 &&" \
+#define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x580d00000 &&" \
" cp.b $kernel_start $kernel_load" \
" $kernel_size && bootm $kernel_load"
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index dc52b22..d0b0aa9 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -1,4 +1,5 @@
/*
+ * Copyright 2017 NXP
* Copyright 2015 Freescale Semiconductor
*
* SPDX-License-Identifier: GPL-2.0+
@@ -262,15 +263,9 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2
#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3
-#if defined(CONFIG_QSPI_BOOT)
-#define CONFIG_SYS_TEXT_BASE 0x20010000
-#define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
-#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */
-#define CONFIG_ENV_SECT_SIZE 0x10000
-#else
+#ifndef CONFIG_QSPI_BOOT
#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000)
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000)
#define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE 0x2000
#endif
@@ -363,14 +358,14 @@ unsigned long get_board_ddr_clk(void);
"ramdisk_size=0x2000000\0" \
"fdt_high=0xa0000000\0" \
"initrd_high=0xffffffffffffffff\0" \
- "kernel_start=0x581100000\0" \
+ "kernel_start=0x581000000\0" \
"kernel_load=0xa0000000\0" \
"kernel_size=0x2800000\0" \
"mcmemsize=0x40000000\0" \
- "mcinitcmd=esbc_validate 0x580c80000;" \
- "esbc_validate 0x580cc0000;" \
- "fsl_mc start mc 0x580300000" \
- " 0x580800000 \0"
+ "mcinitcmd=esbc_validate 0x580700000;" \
+ "esbc_validate 0x580740000;" \
+ "fsl_mc start mc 0x580a00000" \
+ " 0x580e00000 \0"
#else
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
@@ -380,12 +375,12 @@ unsigned long get_board_ddr_clk(void);
"ramdisk_size=0x2000000\0" \
"fdt_high=0xa0000000\0" \
"initrd_high=0xffffffffffffffff\0" \
- "kernel_start=0x581100000\0" \
+ "kernel_start=0x581000000\0" \
"kernel_load=0xa0000000\0" \
"kernel_size=0x2800000\0" \
"mcmemsize=0x40000000\0" \
- "mcinitcmd=fsl_mc start mc 0x580300000" \
- " 0x580800000 \0"
+ "mcinitcmd=fsl_mc start mc 0x580a00000" \
+ " 0x580e00000 \0"
#endif /* CONFIG_SECURE_BOOT */
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 2e0d95e..2dab065 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -1,4 +1,5 @@
/*
+ * Copyright 2017 NXP
* Copyright 2015 Freescale Semiconductor
*
* SPDX-License-Identifier: GPL-2.0+
@@ -12,6 +13,14 @@
#undef CONFIG_CONS_INDEX
#define CONFIG_CONS_INDEX 2
+#ifdef CONFIG_FSL_QSPI
+#ifdef CONFIG_TARGET_LS2081ARDB
+#define CONFIG_QIXIS_I2C_ACCESS
+#endif
+#define CONFIG_SYS_I2C_EARLY_INIT
+#define CONFIG_DISPLAY_BOARDINFO_LATE
+#endif
+
#define I2C_MUX_CH_VOL_MONITOR 0xa
#define I2C_VOL_MONITOR_ADDR 0x38
#define CONFIG_VOL_MONITOR_IR36021_READ
@@ -69,6 +78,7 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
+#ifndef CONFIG_FSL_QSPI
/* undefined CONFIG_FSL_DDR_SYNC_REFRESH for simulator */
#define CONFIG_SYS_NOR0_CSPR_EXT (0x0)
@@ -157,7 +167,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
-
#define CONFIG_FSL_QIXIS /* use common QIXIS code */
#define QIXIS_LBMAP_SWITCH 0x06
#define QIXIS_LBMAP_MASK 0x0f
@@ -242,7 +251,7 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3
#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000)
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000)
#define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE 0x2000
#endif
@@ -250,12 +259,31 @@ unsigned long get_board_sys_clk(void);
/* Debug Server firmware */
#define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
#define CONFIG_SYS_DEBUG_SERVER_FW_ADDR 0x580D00000ULL
-
+#endif
#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
+#ifdef CONFIG_TARGET_LS2081ARDB
+#define CONFIG_FSL_QIXIS /* use common QIXIS code */
+#define QIXIS_QMAP_MASK 0x07
+#define QIXIS_QMAP_SHIFT 5
+#define QIXIS_LBMAP_DFLTBANK 0x00
+#define QIXIS_LBMAP_QSPI 0x00
+#define QIXIS_RCW_SRC_QSPI 0x62
+#define QIXIS_LBMAP_ALTBANK 0x20
+#define QIXIS_RST_CTL_RESET 0x31
+#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
+#define QIXIS_RCFG_CTL_RECONFIG_START 0x21
+#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
+#define QIXIS_LBMAP_MASK 0x0f
+#define QIXIS_RST_CTL_RESET_EN 0x30
+#endif
+
/*
* I2C
*/
+#ifdef CONFIG_TARGET_LS2081ARDB
+#define CONFIG_SYS_I2C_FPGA_ADDR 0x66
+#endif
#define I2C_MUX_PCA_ADDR 0x75
#define I2C_MUX_PCA_ADDR_PRI 0x75 /* Primary Mux*/
@@ -263,18 +291,33 @@ unsigned long get_board_sys_clk(void);
#define I2C_MUX_CH_DEFAULT 0x8
/* SPI */
-#ifdef CONFIG_FSL_DSPI
+#if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI)
#define CONFIG_SPI_FLASH
-#define CONFIG_SPI_FLASH_BAR
+#ifdef CONFIG_FSL_QSPI
#define CONFIG_SPI_FLASH_STMICRO
#endif
+#ifdef CONFIG_FSL_QSPI
+#ifdef CONFIG_TARGET_LS2081ARDB
+#define CONFIG_SPI_FLASH_STMICRO
+#else
+#define CONFIG_SPI_FLASH_SPANSION
+#endif
+#define FSL_QSPI_FLASH_SIZE SZ_64M /* 64MB */
+#define FSL_QSPI_FLASH_NUM 2
+#endif
+#endif
/*
* RTC configuration
*/
#define RTC
+#ifdef CONFIG_TARGET_LS2081ARDB
+#define CONFIG_RTC_PCF8563 1
+#define CONFIG_SYS_I2C_RTC_ADDR 0x51
+#else
#define CONFIG_RTC_DS3231 1
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
+#endif
/* EEPROM */
#define CONFIG_ID_EEPROM
@@ -334,15 +377,34 @@ unsigned long get_board_sys_clk(void);
"ramdisk_size=0x2000000\0" \
"fdt_high=0xa0000000\0" \
"initrd_high=0xffffffffffffffff\0" \
- "kernel_start=0x581100000\0" \
+ "kernel_start=0x581000000\0" \
"kernel_load=0xa0000000\0" \
"kernel_size=0x2800000\0" \
"mcmemsize=0x40000000\0" \
"fdtfile=fsl-ls2080a-rdb.dtb\0" \
- "mcinitcmd=esbc_validate 0x580c80000;" \
- "esbc_validate 0x580cc0000;" \
- "fsl_mc start mc 0x580300000" \
- " 0x580800000 \0" \
+ "mcinitcmd=esbc_validate 0x580700000;" \
+ "esbc_validate 0x580740000;" \
+ "fsl_mc start mc 0x580a00000" \
+ " 0x580e00000 \0" \
+ BOOTENV
+#else
+#ifdef CONFIG_QSPI_BOOT
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "hwconfig=fsl_ddr:bank_intlv=auto\0" \
+ "scriptaddr=0x80800000\0" \
+ "kernel_addr_r=0x81000000\0" \
+ "pxefile_addr_r=0x81000000\0" \
+ "fdt_addr_r=0x88000000\0" \
+ "ramdisk_addr_r=0x89000000\0" \
+ "loadaddr=0x80100000\0" \
+ "kernel_addr=0x100000\0" \
+ "ramdisk_size=0x2000000\0" \
+ "fdt_high=0xa0000000\0" \
+ "initrd_high=0xffffffffffffffff\0" \
+ "kernel_start=0x21000000\0" \
+ "mcmemsize=0x40000000\0" \
+ "mcinitcmd=fsl_mc start mc 0x20a00000" \
+ " 0x20e00000 \0" \
BOOTENV
#else
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -358,15 +420,16 @@ unsigned long get_board_sys_clk(void);
"ramdisk_size=0x2000000\0" \
"fdt_high=0xa0000000\0" \
"initrd_high=0xffffffffffffffff\0" \
- "kernel_start=0x581100000\0" \
+ "kernel_start=0x581000000\0" \
"kernel_load=0xa0000000\0" \
"kernel_size=0x2800000\0" \
"mcmemsize=0x40000000\0" \
"fdtfile=fsl-ls2080a-rdb.dtb\0" \
- "mcinitcmd=fsl_mc start mc 0x580300000" \
- " 0x580800000 \0" \
+ "mcinitcmd=fsl_mc start mc 0x580a00000" \
+ " 0x580e00000 \0" \
BOOTENV
#endif
+#endif
#undef CONFIG_BOOTARGS
@@ -376,11 +439,18 @@ unsigned long get_board_sys_clk(void);
" hugepagesz=2m hugepages=256"
#undef CONFIG_BOOTCOMMAND
+#ifdef CONFIG_QSPI_BOOT
+/* Try to boot an on-QSPI kernel first, then do normal distro boot */
+#define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x20d00000" \
+ " && bootm $kernel_start" \
+ " || run distro_bootcmd"
+#else
/* Try to boot an on-NOR kernel first, then do normal distro boot */
-#define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x580700000" \
+#define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x580d00000" \
" && cp.b $kernel_start $kernel_load $kernel_size" \
" && bootm $kernel_load" \
" || run distro_bootcmd"
+#endif
/* MAC/PHY configuration */
#ifdef CONFIG_FSL_MC_ENET
@@ -389,7 +459,11 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_PHY_CORTINA
#define CONFIG_PHYLIB
#define CONFIG_SYS_CORTINA_FW_IN_NOR
-#define CONFIG_CORTINA_FW_ADDR 0x581000000
+#ifdef CONFIG_QSPI_BOOT
+#define CONFIG_CORTINA_FW_ADDR 0x20980000
+#else
+#define CONFIG_CORTINA_FW_ADDR 0x580980000
+#endif
#define CONFIG_CORTINA_FW_LENGTH 0x40000
#define CORTINA_PHY_ADDR1 0x10
generated by cgit v0.10.2 at 2024-11-12 10:00:23 (GMT)