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-rw-r--r--include/configs/efikamx.h47
-rw-r--r--include/configs/mx51evk.h13
-rw-r--r--include/configs/mx53loco.h13
-rw-r--r--include/configs/s5p_goni.h3
-rw-r--r--include/usb/ehci-fsl.h41
-rw-r--r--include/usb/lin_gadget_compat.h62
-rw-r--r--include/usb/mv_udc.h151
-rw-r--r--include/usb/s3c_udc.h175
-rw-r--r--include/usb/ulpi.h298
-rw-r--r--include/usbdescriptors.h2
10 files changed, 786 insertions, 19 deletions
diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
index 2b069d6..522487b 100644
--- a/include/configs/efikamx.h
+++ b/include/configs/efikamx.h
@@ -44,6 +44,10 @@
#define CONFIG_SYS_TEXT_BASE 0x97800000
+#define CONFIG_L2_OFF
+#define CONFIG_SYS_ICACHE_OFF
+#define CONFIG_SYS_DCACHE_OFF
+
/*
* Bootloader Components Configuration
*/
@@ -53,6 +57,8 @@
#define CONFIG_CMD_FAT
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DATE
#undef CONFIG_CMD_IMLS
/*
@@ -175,17 +181,46 @@
#endif
/*
+ * USB
+ */
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI /* Enable EHCI USB support */
+#define CONFIG_USB_EHCI_MX5
+#define CONFIG_USB_ULPI
+#define CONFIG_USB_ULPI_VIEWPORT
+#define CONFIG_MXC_USB_PORT 1
+#if (CONFIG_MXC_USB_PORT == 0)
+#define CONFIG_MXC_USB_PORTSC (1 << 28)
+#define CONFIG_MXC_USB_FLAGS MXC_EHCI_INTERNAL_PHY
+#else
+#define CONFIG_MXC_USB_PORTSC (2 << 30)
+#define CONFIG_MXC_USB_FLAGS 0
+#endif
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_KEYBOARD
+#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
+#define CONFIG_PREBOOT
+/* USB NET */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_NET_MULTI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#endif
+#endif /* CONFIG_CMD_USB */
+
+/*
* Filesystems
*/
#ifdef CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
+#ifdef CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#endif
#endif
-
-#undef CONFIG_CMD_PING
-#undef CONFIG_CMD_DHCP
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
-#define CONFIG_CMD_DATE
/*
* Miscellaneous configurable options
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index dd53f48..3b18a18 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -110,6 +110,19 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
+/* USB Configs */
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_FAT
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX5
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_MXC_USB_PORT 1
+#define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI
+#define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
+
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index 537649e..34a4edd 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -72,6 +72,19 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
+/* USB Configs */
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_FAT
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX5
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_MXC_USB_PORT 1
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS 0
+
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 3434de7..56b5547 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -237,5 +237,8 @@
#define CONFIG_SYS_I2C_SPEED 50000
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_MAX_I2C_BUS 7
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_S3C_UDC_OTG
+#define CONFIG_USB_GADGET_DUALSPEED
#endif /* __CONFIG_H */
diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
index 67600ed..2869302 100644
--- a/include/usb/ehci-fsl.h
+++ b/include/usb/ehci-fsl.h
@@ -186,35 +186,36 @@ struct usb_ehci {
u32 gptimer1_ctrl; /* 0x08C - General Purpose Timer 1 control */
u32 sbuscfg; /* 0x090 - System Bus Interface Control */
u8 res2[0x6C];
- u16 caplength; /* 0x100 - Capability Register Length */
+ u8 caplength; /* 0x100 - Capability Register Length */
+ u8 res3[0x1];
u16 hciversion; /* 0x102 - Host Interface Version */
u32 hcsparams; /* 0x104 - Host Structural Parameters */
u32 hccparams; /* 0x108 - Host Capability Parameters */
- u8 res3[0x14];
+ u8 res4[0x14];
u32 dciversion; /* 0x120 - Device Interface Version */
u32 dciparams; /* 0x124 - Device Controller Params */
- u8 res4[0x18];
+ u8 res5[0x18];
u32 usbcmd; /* 0x140 - USB Command */
u32 usbsts; /* 0x144 - USB Status */
u32 usbintr; /* 0x148 - USB Interrupt Enable */
u32 frindex; /* 0x14C - USB Frame Index */
- u8 res5[0x4];
+ u8 res6[0x4];
u32 perlistbase; /* 0x154 - Periodic List Base
- USB Device Address */
u32 ep_list_addr; /* 0x158 - Next Asynchronous List
- End Point Address */
- u8 res6[0x4];
+ u8 res7[0x4];
u32 burstsize; /* 0x160 - Programmable Burst Size */
#define FSL_EHCI_TXPBURST(X) ((X) << 8)
#define FSL_EHCI_RXPBURST(X) (X)
u32 txfilltuning; /* 0x164 - Host TT Transmit
pre-buffer packet tuning */
- u8 res7[0x8];
+ u8 res8[0x8];
u32 ulpi_viewpoint; /* 0x170 - ULPI Reister Access */
- u8 res8[0xc];
+ u8 res9[0xc];
u32 config_flag; /* 0x180 - Configured Flag Register */
u32 portsc; /* 0x184 - Port status/control */
- u8 res9[0x1C];
+ u8 res10[0x1C];
u32 otgsc; /* 0x1a4 - Oo-The-Go status and control */
u32 usbmode; /* 0x1a8 - USB Device Mode */
u32 epsetupstat; /* 0x1ac - End Point Setup Status */
@@ -228,18 +229,34 @@ struct usb_ehci {
u32 epctrl3; /* 0x1cc - End Point Control 3 */
u32 epctrl4; /* 0x1d0 - End Point Control 4 */
u32 epctrl5; /* 0x1d4 - End Point Control 5 */
- u8 res10[0x28];
+ u8 res11[0x28];
u32 usbgenctrl; /* 0x200 - USB General Control */
u32 isiphyctrl; /* 0x204 - On-Chip PHY Control */
- u8 res11[0x1F8];
+ u8 res12[0x1F8];
u32 snoop1; /* 0x400 - Snoop 1 */
u32 snoop2; /* 0x404 - Snoop 2 */
u32 age_cnt_limit; /* 0x408 - Age Count Threshold */
u32 prictrl; /* 0x40c - Priority Control */
u32 sictrl; /* 0x410 - System Interface Control */
- u8 res12[0xEC];
+ u8 res13[0xEC];
u32 control; /* 0x500 - Control */
- u8 res13[0xafc];
+ u8 res14[0xafc];
};
+/*
+ * For MXC SOCs
+ */
+#define MXC_EHCI_POWER_PINS_ENABLED (1 << 5)
+#define MXC_EHCI_TTL_ENABLED (1 << 6)
+#define MXC_EHCI_INTERNAL_PHY (1 << 7)
+
+/* Board-specific initialization */
+int board_ehci_hcd_init(int port);
+
+/* CPU-specific abstracted-out IOMUX init */
+#ifdef CONFIG_MX51
+void setup_iomux_usb_h1(void);
+void setup_iomux_usb_h2(void);
+#endif
+
#endif /* _EHCI_FSL_H */
diff --git a/include/usb/lin_gadget_compat.h b/include/usb/lin_gadget_compat.h
new file mode 100644
index 0000000..9b31511
--- /dev/null
+++ b/include/usb/lin_gadget_compat.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2011 Samsung Electronics
+ * Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * This is a Linux kernel compatibility layer for USB Gadget
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __LIN_COMPAT_H__
+#define __LIN_COMPAT_H__
+
+/* common */
+#define spin_lock_init(...)
+#define spin_lock(...)
+#define spin_lock_irqsave(lock, flags) do {flags = 1; } while (0)
+#define spin_unlock(...)
+#define spin_unlock_irqrestore(lock, flags) do {flags = 0; } while (0)
+#define disable_irq(...)
+#define enable_irq(...)
+
+#define mutex_init(...)
+#define mutex_lock(...)
+#define mutex_unlock(...)
+
+#define WARN_ON(x) if (x) {printf("WARNING in %s line %d\n" \
+ , __FILE__, __LINE__); }
+
+#define KERN_WARNING
+#define KERN_ERR
+#define KERN_NOTICE
+#define KERN_DEBUG
+
+#define GFP_KERNEL 0
+
+#define IRQ_HANDLED 1
+
+#define ENOTSUPP 524 /* Operation is not supported */
+
+#define kmalloc(size, type) memalign(CONFIG_SYS_CACHELINE_SIZE, size)
+#define kfree(addr) free(addr)
+#define mdelay(n) ({unsigned long msec = (n); while (msec--) udelay(1000); })
+
+#define __iomem
+#define min_t min
+#define dma_cache_maint(addr, size, mode) cache_flush()
+void cache_flush(void);
+
+#endif /* __LIN_COMPAT_H__ */
diff --git a/include/usb/mv_udc.h b/include/usb/mv_udc.h
new file mode 100644
index 0000000..51d36c3
--- /dev/null
+++ b/include/usb/mv_udc.h
@@ -0,0 +1,151 @@
+/*
+ * Copyright 2011, Marvell Semiconductor Inc.
+ * Lei Wen <leiwen@marvell.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#ifndef __MV_UDC_H__
+#define __MV_UDC_H__
+
+#include <asm/byteorder.h>
+#include <asm/errno.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+
+/* Endpoint 0 states */
+#define EP0_IDLE 0
+#define EP0_IN_DATA 1
+#define EP0_OUT_DATA 2
+#define EP0_XFER_COMPLETE 3
+
+
+/* Endpoint parameters */
+#define MAX_ENDPOINTS 4
+#define EP_MAX_PACKET_SIZE 0x200
+
+#define EP0_MAX_PACKET_SIZE 64
+#define UDC_OUT_ENDPOINT 0x02
+#define UDC_OUT_PACKET_SIZE EP_MAX_PACKET_SIZE
+#define UDC_IN_ENDPOINT 0x01
+#define UDC_IN_PACKET_SIZE EP_MAX_PACKET_SIZE
+#define UDC_INT_ENDPOINT 0x05
+#define UDC_INT_PACKET_SIZE EP_MAX_PACKET_SIZE
+#define UDC_BULK_PACKET_SIZE EP_MAX_PACKET_SIZE
+
+#define NUM_ENDPOINTS 6
+#define REQ_COUNT 12
+struct mv_ep {
+ struct usb_ep ep;
+ struct usb_request req;
+ struct list_head queue;
+ const struct usb_endpoint_descriptor *desc;
+};
+
+struct mv_udc {
+ u32 pad0[80];
+#define MICRO_8FRAME 0x8
+#define USBCMD_ITC(x) (((x > 0xff) ? 0xff : x) << 16)
+#define USBCMD_FS2 (1 << 15)
+#define USBCMD_RST (1 << 1)
+#define USBCMD_RUN (1)
+ u32 usbcmd; /* 0x140 */
+#define STS_SLI (1 << 8)
+#define STS_URI (1 << 6)
+#define STS_PCI (1 << 2)
+#define STS_UEI (1 << 1)
+#define STS_UI (1 << 0)
+ u32 usbsts; /* 0x144 */
+ u32 pad1[3];
+ u32 devaddr; /* 0x154 */
+ u32 epinitaddr; /* 0x158 */
+ u32 pad2[10];
+#define PTS_ENABLE 2
+#define PTS(x) ((x & 0x3) << 30)
+#define PFSC (1 << 24)
+ u32 portsc; /* 0x184 */
+ u32 pad3[8];
+#define USBMODE_DEVICE 2
+ u32 usbmode; /* 0x1a8 */
+ u32 epstat; /* 0x1ac */
+#define EPT_TX(x) (1 << ((x & 0xffff) + 16))
+#define EPT_RX(x) (1 << (x & 0xffff))
+ u32 epprime; /* 0x1b0 */
+ u32 epflush; /* 0x1b4 */
+ u32 pad4;
+ u32 epcomp; /* 0x1bc */
+#define CTRL_TXE (1 << 23)
+#define CTRL_TXR (1 << 22)
+#define CTRL_RXE (1 << 7)
+#define CTRL_RXR (1 << 6)
+#define CTRL_TXT_BULK (2 << 18)
+#define CTRL_RXT_BULK (2 << 2)
+ u32 epctrl[16]; /* 0x1c0 */
+};
+
+struct mv_drv {
+ struct usb_gadget gadget;
+ struct usb_gadget_driver *driver;
+ struct mv_udc *udc;
+};
+
+struct ept_queue_head {
+ unsigned config;
+ unsigned current; /* read-only */
+
+ unsigned next;
+ unsigned info;
+ unsigned page0;
+ unsigned page1;
+ unsigned page2;
+ unsigned page3;
+ unsigned page4;
+ unsigned reserved_0;
+
+ unsigned char setup_data[8];
+
+ unsigned reserved_1;
+ unsigned reserved_2;
+ unsigned reserved_3;
+ unsigned reserved_4;
+};
+
+#define CONFIG_MAX_PKT(n) ((n) << 16)
+#define CONFIG_ZLT (1 << 29) /* stop on zero-len xfer */
+#define CONFIG_IOS (1 << 15) /* IRQ on setup */
+
+struct ept_queue_item {
+ unsigned next;
+ unsigned info;
+ unsigned page0;
+ unsigned page1;
+ unsigned page2;
+ unsigned page3;
+ unsigned page4;
+ unsigned reserved;
+};
+
+#define TERMINATE 1
+#define INFO_BYTES(n) ((n) << 16)
+#define INFO_IOC (1 << 15)
+#define INFO_ACTIVE (1 << 7)
+#define INFO_HALTED (1 << 6)
+#define INFO_BUFFER_ERROR (1 << 5)
+#define INFO_TX_ERROR (1 << 3)
+
+extern int usb_lowlevel_init(void);
+#endif /* __MV_UDC_H__ */
diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h
new file mode 100644
index 0000000..14dadc8
--- /dev/null
+++ b/include/usb/s3c_udc.h
@@ -0,0 +1,175 @@
+/*
+ * drivers/usb/gadget/s3c_udc.h
+ * Samsung S3C on-chip full/high speed USB device controllers
+ * Copyright (C) 2005 for Samsung Electronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __S3C_USB_GADGET
+#define __S3C_USB_GADGET
+
+#include <asm/errno.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <linux/list.h>
+#include <usb/lin_gadget_compat.h>
+
+#define PHY0_SLEEP (1 << 5)
+
+/*-------------------------------------------------------------------------*/
+/* DMA bounce buffer size, 16K is enough even for mass storage */
+#define DMA_BUFFER_SIZE (4096*4)
+
+#define EP0_FIFO_SIZE 64
+#define EP_FIFO_SIZE 512
+#define EP_FIFO_SIZE2 1024
+/* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */
+#define S3C_MAX_ENDPOINTS 4
+#define S3C_MAX_HW_ENDPOINTS 16
+
+#define WAIT_FOR_SETUP 0
+#define DATA_STATE_XMIT 1
+#define DATA_STATE_NEED_ZLP 2
+#define WAIT_FOR_OUT_STATUS 3
+#define DATA_STATE_RECV 4
+#define WAIT_FOR_COMPLETE 5
+#define WAIT_FOR_OUT_COMPLETE 6
+#define WAIT_FOR_IN_COMPLETE 7
+#define WAIT_FOR_NULL_COMPLETE 8
+
+#define TEST_J_SEL 0x1
+#define TEST_K_SEL 0x2
+#define TEST_SE0_NAK_SEL 0x3
+#define TEST_PACKET_SEL 0x4
+#define TEST_FORCE_ENABLE_SEL 0x5
+
+/* ************************************************************************* */
+/* IO
+ */
+
+enum ep_type {
+ ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt
+};
+
+struct s3c_ep {
+ struct usb_ep ep;
+ struct s3c_udc *dev;
+
+ const struct usb_endpoint_descriptor *desc;
+ struct list_head queue;
+ unsigned long pio_irqs;
+ int len;
+ void *dma_buf;
+
+ u8 stopped;
+ u8 bEndpointAddress;
+ u8 bmAttributes;
+
+ enum ep_type ep_type;
+ int fifo_num;
+};
+
+struct s3c_request {
+ struct usb_request req;
+ struct list_head queue;
+};
+
+struct s3c_udc {
+ struct usb_gadget gadget;
+ struct usb_gadget_driver *driver;
+
+ struct s3c_plat_otg_data *pdata;
+
+ void *dma_buf[S3C_MAX_ENDPOINTS+1];
+ dma_addr_t dma_addr[S3C_MAX_ENDPOINTS+1];
+
+ int ep0state;
+ struct s3c_ep ep[S3C_MAX_ENDPOINTS];
+
+ unsigned char usb_address;
+
+ unsigned req_pending:1, req_std:1, req_config:1;
+};
+
+extern struct s3c_udc *the_controller;
+
+#define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN)
+#define ep_index(EP) ((EP)->bEndpointAddress&0xF)
+#define ep_maxpacket(EP) ((EP)->ep.maxpacket)
+
+/*-------------------------------------------------------------------------*/
+/* #define DEBUG_UDC */
+#ifdef DEBUG_UDC
+#define DBG(stuff...) printf("udc: " stuff)
+#else
+#define DBG(stuff...) do {} while (0)
+#endif
+
+#ifdef DEBUG_S3C_UDC_SETUP
+#define DEBUG_SETUP(fmt, args...) printk(fmt, ##args)
+#else
+#define DEBUG_SETUP(fmt, args...) do {} while (0)
+#endif
+
+#ifdef DEBUG_S3C_UDC_EP0
+#define DEBUG_EP0(fmt, args...) printk(fmt, ##args)
+#else
+#define DEBUG_EP0(fmt, args...) do {} while (0)
+#endif
+
+#ifdef DEBUG_S3C_UDC
+#define DEBUG(fmt, args...) printk(fmt, ##args)
+#else
+#define DEBUG(fmt, args...) do {} while (0)
+#endif
+
+#ifdef DEBUG_S3C_UDC_ISR
+#define DEBUG_ISR(fmt, args...) printk(fmt, ##args)
+#else
+#define DEBUG_ISR(fmt, args...) do {} while (0)
+#endif
+
+#ifdef DEBUG_S3C_UDC_OUT_EP
+#define DEBUG_OUT_EP(fmt, args...) printk(fmt, ##args)
+#else
+#define DEBUG_OUT_EP(fmt, args...) do {} while (0)
+#endif
+
+#ifdef DEBUG_S3C_UDC_IN_EP
+#define DEBUG_IN_EP(fmt, args...) printk(fmt, ##args)
+#else
+#define DEBUG_IN_EP(fmt, args...) do {} while (0)
+#endif
+
+#define ERR(stuff...) printf("ERR udc: " stuff)
+#define WARN(stuff...) printf("WARNING udc: " stuff)
+#define INFO(stuff...) printf("INFO udc: " stuff)
+
+extern void otg_phy_init(struct s3c_udc *dev);
+extern void otg_phy_off(struct s3c_udc *dev);
+
+extern void s3c_udc_ep_set_stall(struct s3c_ep *ep);
+extern int s3c_udc_probe(struct s3c_plat_otg_data *pdata);
+
+struct s3c_plat_otg_data {
+ int (*phy_control)(int on);
+ unsigned int regs_phy;
+ unsigned int regs_otg;
+ unsigned int usb_phy_ctrl;
+ unsigned int usb_flags;
+};
+#endif
diff --git a/include/usb/ulpi.h b/include/usb/ulpi.h
new file mode 100644
index 0000000..d871290
--- /dev/null
+++ b/include/usb/ulpi.h
@@ -0,0 +1,298 @@
+/*
+ * Generic ULPI interface.
+ *
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ * Copyright (C) 2011 CompuLab, Ltd. <www.compulab.co.il>
+ *
+ * Authors: Jana Rapava <fermata7@gmail.com>
+ * Igor Grinberg <grinberg@compulab.co.il>
+ *
+ * Register offsets taken from:
+ * linux/include/linux/usb/ulpi.h
+ *
+ * Original Copyrights follow:
+ * Copyright (C) 2010 Nokia Corporation
+ *
+ * This software is distributed under the terms of the GNU General
+ * Public License ("GPL") as published by the Free Software Foundation,
+ * version 2 of that License.
+ */
+
+#ifndef __USB_ULPI_H__
+#define __USB_ULPI_H__
+
+#define ULPI_ERROR (1 << 8) /* overflow from any register value */
+
+#ifndef CONFIG_USB_ULPI_TIMEOUT
+#define CONFIG_USB_ULPI_TIMEOUT 1000 /* timeout in us */
+#endif
+
+/*
+ * Initialize the ULPI transciever and check the interface integrity.
+ * @ulpi_viewport - the address of the ULPI viewport register.
+ *
+ * returns 0 on success, ULPI_ERROR on failure.
+ */
+int ulpi_init(u32 ulpi_viewport);
+
+/*
+ * Select transceiver speed.
+ * @speed - ULPI_FC_HIGH_SPEED, ULPI_FC_FULL_SPEED (default),
+ * ULPI_FC_LOW_SPEED, ULPI_FC_FS4LS
+ * returns 0 on success, ULPI_ERROR on failure.
+ */
+int ulpi_select_transceiver(u32 ulpi_viewport, u8 speed);
+
+/*
+ * Enable/disable VBUS.
+ * @ext_power - external VBUS supply is used (default is false)
+ * @ext_indicator - external VBUS over-current indicator is used
+ *
+ * returns 0 on success, ULPI_ERROR on failure.
+ */
+int ulpi_enable_vbus(u32 ulpi_viewport, int on, int ext_power, int ext_ind);
+
+/*
+ * Enable/disable pull-down resistors on D+ and D- USB lines.
+ *
+ * returns 0 on success, ULPI_ERROR on failure.
+ */
+int ulpi_set_pd(u32 ulpi_viewport, int enable);
+
+/*
+ * Select OpMode.
+ * @opmode - ULPI_FC_OPMODE_NORMAL (default), ULPI_FC_OPMODE_NONDRIVING,
+ * ULPI_FC_OPMODE_DISABLE_NRZI, ULPI_FC_OPMODE_NOSYNC_NOEOP
+ *
+ * returns 0 on success, ULPI_ERROR on failure.
+ */
+int ulpi_opmode_sel(u32 ulpi_viewport, u8 opmode);
+
+/*
+ * Switch to Serial Mode.
+ * @smode - ULPI_IFACE_6_PIN_SERIAL_MODE or ULPI_IFACE_3_PIN_SERIAL_MODE
+ *
+ * returns 0 on success, ULPI_ERROR on failure.
+ *
+ * Notes:
+ * Switches immediately to Serial Mode.
+ * To return from Serial Mode, STP line needs to be asserted.
+ */
+int ulpi_serial_mode_enable(u32 ulpi_viewport, u8 smode);
+
+/*
+ * Put PHY into low power mode.
+ *
+ * returns 0 on success, ULPI_ERROR on failure.
+ *
+ * Notes:
+ * STP line must be driven low to keep the PHY in suspend.
+ * To resume the PHY, STP line needs to be asserted.
+ */
+int ulpi_suspend(u32 ulpi_viewport);
+
+/*
+ * Reset the transceiver. ULPI interface and registers are not affected.
+ *
+ * returns 0 on success, ULPI_ERROR on failure.
+ */
+int ulpi_reset(u32 ulpi_viewport);
+
+
+/* ULPI access methods below must be implemented for each ULPI viewport. */
+
+/*
+ * Write to the ULPI PHY register via the viewport.
+ * @reg - the ULPI register (one of the fields in struct ulpi_regs).
+ * @value - the value - only 8 lower bits are used, others ignored.
+ *
+ * returns 0 on success, ULPI_ERROR on failure.
+ */
+u32 ulpi_write(u32 ulpi_viewport, u8 *reg, u32 value);
+
+/*
+ * Read the ULPI PHY register content via the viewport.
+ * @reg - the ULPI register (one of the fields in struct ulpi_regs).
+ *
+ * returns register content on success, ULPI_ERROR on failure.
+ */
+u32 ulpi_read(u32 ulpi_viewport, u8 *reg);
+
+/*
+ * Wait for the reset to complete.
+ * The Link must not attempt to access the PHY until the reset has
+ * completed and DIR line is de-asserted.
+ */
+int ulpi_reset_wait(u32 ulpi_viewport);
+
+/* Access Extended Register Set (indicator) */
+#define ACCESS_EXT_REGS_OFFSET 0x2f /* read-write */
+/* Vendor-specific */
+#define VENDOR_SPEC_OFFSET 0x30
+
+/*
+ * Extended Register Set
+ *
+ * Addresses 0x00-0x3F map directly to Immediate Register Set.
+ * Addresses 0x40-0x7F are reserved.
+ * Addresses 0x80-0xff are vendor-specific.
+ */
+#define EXT_VENDOR_SPEC_OFFSET 0x80
+
+/* ULPI registers, bits and offsets definitions */
+struct ulpi_regs {
+ /* Vendor ID and Product ID: 0x00 - 0x03 Read-only */
+ u8 vendor_id_low;
+ u8 vendor_id_high;
+ u8 product_id_low;
+ u8 product_id_high;
+ /* Function Control: 0x04 - 0x06 Read */
+ u8 function_ctrl; /* 0x04 Write */
+ u8 function_ctrl_set; /* 0x05 Set */
+ u8 function_ctrl_clear; /* 0x06 Clear */
+ /* Interface Control: 0x07 - 0x09 Read */
+ u8 iface_ctrl; /* 0x07 Write */
+ u8 iface_ctrl_set; /* 0x08 Set */
+ u8 iface_ctrl_clear; /* 0x09 Clear */
+ /* OTG Control: 0x0A - 0x0C Read */
+ u8 otg_ctrl; /* 0x0A Write */
+ u8 otg_ctrl_set; /* 0x0B Set */
+ u8 otg_ctrl_clear; /* 0x0C Clear */
+ /* USB Interrupt Enable Rising: 0x0D - 0x0F Read */
+ u8 usb_ie_rising; /* 0x0D Write */
+ u8 usb_ie_rising_set; /* 0x0E Set */
+ u8 usb_ie_rising_clear; /* 0x0F Clear */
+ /* USB Interrupt Enable Falling: 0x10 - 0x12 Read */
+ u8 usb_ie_falling; /* 0x10 Write */
+ u8 usb_ie_falling_set; /* 0x11 Set */
+ u8 usb_ie_falling_clear; /* 0x12 Clear */
+ /* USB Interrupt Status: 0x13 Read-only */
+ u8 usb_int_status;
+ /* USB Interrupt Latch: 0x14 Read-only with auto-clear */
+ u8 usb_int_latch;
+ /* Debug: 0x15 Read-only */
+ u8 debug;
+ /* Scratch Register: 0x16 - 0x18 Read */
+ u8 scratch; /* 0x16 Write */
+ u8 scratch_set; /* 0x17 Set */
+ u8 scratch_clear; /* 0x18 Clear */
+ /*
+ * Optional Carkit registers:
+ * Carkit Control: 0x19 - 0x1B Read
+ */
+ u8 carkit_ctrl; /* 0x19 Write */
+ u8 carkit_ctrl_set; /* 0x1A Set */
+ u8 carkit_ctrl_clear; /* 0x1B Clear */
+ /* Carkit Interrupt Delay: 0x1C Read, Write */
+ u8 carkit_int_delay;
+ /* Carkit Interrupt Enable: 0x1D - 0x1F Read */
+ u8 carkit_ie; /* 0x1D Write */
+ u8 carkit_ie_set; /* 0x1E Set */
+ u8 carkit_ie_clear; /* 0x1F Clear */
+ /* Carkit Interrupt Status: 0x20 Read-only */
+ u8 carkit_int_status;
+ /* Carkit Interrupt Latch: 0x21 Read-only with auto-clear */
+ u8 carkit_int_latch;
+ /* Carkit Pulse Control: 0x22 - 0x24 Read */
+ u8 carkit_pulse_ctrl; /* 0x22 Write */
+ u8 carkit_pulse_ctrl_set; /* 0x23 Set */
+ u8 carkit_pulse_ctrl_clear; /* 0x24 Clear */
+ /*
+ * Other optional registers:
+ * Transmit Positive Width: 0x25 Read, Write
+ */
+ u8 transmit_pos_width;
+ /* Transmit Negative Width: 0x26 Read, Write */
+ u8 transmit_neg_width;
+ /* Receive Polarity Recovery: 0x27 Read, Write */
+ u8 recv_pol_recovery;
+ /*
+ * Addresses 0x28 - 0x2E are reserved, so we use offsets
+ * for immediate registers with higher addresses
+ */
+};
+
+/*
+ * Register Bits
+ */
+
+/* Function Control */
+#define ULPI_FC_XCVRSEL_MASK (3 << 0)
+#define ULPI_FC_HIGH_SPEED (0 << 0)
+#define ULPI_FC_FULL_SPEED (1 << 0)
+#define ULPI_FC_LOW_SPEED (2 << 0)
+#define ULPI_FC_FS4LS (3 << 0)
+#define ULPI_FC_TERMSELECT (1 << 2)
+#define ULPI_FC_OPMODE_MASK (3 << 3)
+#define ULPI_FC_OPMODE_NORMAL (0 << 3)
+#define ULPI_FC_OPMODE_NONDRIVING (1 << 3)
+#define ULPI_FC_OPMODE_DISABLE_NRZI (2 << 3)
+#define ULPI_FC_OPMODE_NOSYNC_NOEOP (3 << 3)
+#define ULPI_FC_RESET (1 << 5)
+#define ULPI_FC_SUSPENDM (1 << 6)
+
+/* Interface Control */
+#define ULPI_IFACE_6_PIN_SERIAL_MODE (1 << 0)
+#define ULPI_IFACE_3_PIN_SERIAL_MODE (1 << 1)
+#define ULPI_IFACE_CARKITMODE (1 << 2)
+#define ULPI_IFACE_CLOCKSUSPENDM (1 << 3)
+#define ULPI_IFACE_AUTORESUME (1 << 4)
+#define ULPI_IFACE_EXTVBUS_COMPLEMENT (1 << 5)
+#define ULPI_IFACE_PASSTHRU (1 << 6)
+#define ULPI_IFACE_PROTECT_IFC_DISABLE (1 << 7)
+
+/* OTG Control */
+#define ULPI_OTG_ID_PULLUP (1 << 0)
+#define ULPI_OTG_DP_PULLDOWN (1 << 1)
+#define ULPI_OTG_DM_PULLDOWN (1 << 2)
+#define ULPI_OTG_DISCHRGVBUS (1 << 3)
+#define ULPI_OTG_CHRGVBUS (1 << 4)
+#define ULPI_OTG_DRVVBUS (1 << 5)
+#define ULPI_OTG_DRVVBUS_EXT (1 << 6)
+#define ULPI_OTG_EXTVBUSIND (1 << 7)
+
+/*
+ * USB Interrupt Enable Rising,
+ * USB Interrupt Enable Falling,
+ * USB Interrupt Status and
+ * USB Interrupt Latch
+ */
+#define ULPI_INT_HOST_DISCONNECT (1 << 0)
+#define ULPI_INT_VBUS_VALID (1 << 1)
+#define ULPI_INT_SESS_VALID (1 << 2)
+#define ULPI_INT_SESS_END (1 << 3)
+#define ULPI_INT_IDGRD (1 << 4)
+
+/* Debug */
+#define ULPI_DEBUG_LINESTATE0 (1 << 0)
+#define ULPI_DEBUG_LINESTATE1 (1 << 1)
+
+/* Carkit Control */
+#define ULPI_CARKIT_CTRL_CARKITPWR (1 << 0)
+#define ULPI_CARKIT_CTRL_IDGNDDRV (1 << 1)
+#define ULPI_CARKIT_CTRL_TXDEN (1 << 2)
+#define ULPI_CARKIT_CTRL_RXDEN (1 << 3)
+#define ULPI_CARKIT_CTRL_SPKLEFTEN (1 << 4)
+#define ULPI_CARKIT_CTRL_SPKRIGHTEN (1 << 5)
+#define ULPI_CARKIT_CTRL_MICEN (1 << 6)
+
+/* Carkit Interrupt Enable */
+#define ULPI_CARKIT_INT_EN_IDFLOAT_RISE (1 << 0)
+#define ULPI_CARKIT_INT_EN_IDFLOAT_FALL (1 << 1)
+#define ULPI_CARKIT_INT_EN_CARINTDET (1 << 2)
+#define ULPI_CARKIT_INT_EN_DP_RISE (1 << 3)
+#define ULPI_CARKIT_INT_EN_DP_FALL (1 << 4)
+
+/* Carkit Interrupt Status and Latch */
+#define ULPI_CARKIT_INT_IDFLOAT (1 << 0)
+#define ULPI_CARKIT_INT_CARINTDET (1 << 1)
+#define ULPI_CARKIT_INT_DP (1 << 2)
+
+/* Carkit Pulse Control*/
+#define ULPI_CARKIT_PLS_CTRL_TXPLSEN (1 << 0)
+#define ULPI_CARKIT_PLS_CTRL_RXPLSEN (1 << 1)
+#define ULPI_CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
+#define ULPI_CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN (1 << 3)
+
+
+#endif /* __USB_ULPI_H__ */
diff --git a/include/usbdescriptors.h b/include/usbdescriptors.h
index 2dec3b9..392fcf5 100644
--- a/include/usbdescriptors.h
+++ b/include/usbdescriptors.h
@@ -199,7 +199,7 @@ struct usb_endpoint_descriptor {
u8 bmAttributes;
u16 wMaxPacketSize;
u8 bInterval;
-} __attribute__ ((packed));
+} __attribute__ ((packed)) __attribute__ ((aligned(2)));
struct usb_interface_descriptor {
u8 bLength;