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-rw-r--r--include/command.h2
-rw-r--r--include/config_fallbacks.h11
-rw-r--r--include/configs/am335x_evm.h85
-rw-r--r--include/configs/apx4devkit.h3
-rw-r--r--include/configs/at91rm9200ek.h3
-rw-r--r--include/configs/at91sam9260ek.h23
-rw-r--r--include/configs/at91sam9261ek.h19
-rw-r--r--include/configs/at91sam9263ek.h20
-rw-r--r--include/configs/at91sam9m10g45ek.h17
-rw-r--r--include/configs/at91sam9rlek.h3
-rw-r--r--include/configs/at91sam9x5ek.h12
-rw-r--r--include/configs/cardhu.h12
-rw-r--r--include/configs/cm_t35.h9
-rw-r--r--include/configs/colibri_t20_iris.h6
-rw-r--r--include/configs/dalmore.h9
-rw-r--r--include/configs/dra7xx_evm.h36
-rw-r--r--include/configs/ea20.h1
-rw-r--r--include/configs/harmony.h8
-rw-r--r--include/configs/igep00x0.h7
-rw-r--r--include/configs/m28evk.h5
-rw-r--r--include/configs/medcom-wide.h5
-rw-r--r--include/configs/mx23_olinuxino.h64
-rw-r--r--include/configs/mx23evk.h14
-rw-r--r--include/configs/mx28evk.h4
-rw-r--r--include/configs/mx6_common.h23
-rw-r--r--include/configs/mx6qarm2.h3
-rw-r--r--include/configs/mx6qsabre_common.h4
-rw-r--r--include/configs/mx6qsabrelite.h4
-rw-r--r--include/configs/nitrogen6x.h285
-rw-r--r--include/configs/ns9750dev.h187
-rw-r--r--include/configs/omap3_beagle.h3
-rw-r--r--include/configs/omap3_mvblx.h25
-rw-r--r--include/configs/omap4_common.h2
-rw-r--r--include/configs/omap5_common.h262
-rw-r--r--include/configs/omap5_evm.h240
-rw-r--r--include/configs/paz00.h8
-rw-r--r--include/configs/pcm051.h2
-rw-r--r--include/configs/plutux.h5
-rw-r--r--include/configs/sc_sps_1.h3
-rw-r--r--include/configs/seaboard.h8
-rw-r--r--include/configs/tec.h5
-rw-r--r--include/configs/tegra-common.h22
-rw-r--r--include/configs/tegra114-common.h3
-rw-r--r--include/configs/tegra20-common.h12
-rw-r--r--include/configs/tegra30-common.h6
-rw-r--r--include/configs/trimslice.h8
-rw-r--r--include/configs/ventana.h8
-rw-r--r--include/configs/whistler.h8
-rw-r--r--include/configs/zynq.h5
-rw-r--r--include/env_callback.h9
-rw-r--r--include/fdtdec.h3
-rw-r--r--include/lcd.h1
-rw-r--r--include/linker_lists.h252
-rw-r--r--include/mmc.h2
-rw-r--r--include/ns9750_bbus.h125
-rw-r--r--include/ns9750_mem.h172
-rw-r--r--include/ns9750_ser.h202
-rw-r--r--include/ns9750_sys.h215
-rw-r--r--include/spl.h3
59 files changed, 1165 insertions, 1338 deletions
diff --git a/include/command.h b/include/command.h
index 3785eb9..65692fd 100644
--- a/include/command.h
+++ b/include/command.h
@@ -175,7 +175,7 @@ int cmd_process(int flag, int argc, char * const argv[],
_usage, _help, NULL)
#define U_BOOT_CMD_COMPLETE(_name, _maxargs, _rep, _cmd, _usage, _help, _comp) \
- ll_entry_declare(cmd_tbl_t, _name, cmd, cmd) = \
+ ll_entry_declare(cmd_tbl_t, _name, cmd) = \
U_BOOT_CMD_MKENT_COMPLETE(_name, _maxargs, _rep, _cmd, \
_usage, _help, _comp);
diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
index bfb9680..9298d0e 100644
--- a/include/config_fallbacks.h
+++ b/include/config_fallbacks.h
@@ -26,4 +26,15 @@
#define CONFIG_EXT4_WRITE
#endif
+/* Rather than repeat this expression each time, add a define for it */
+#if defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_SATA) || \
+ defined(CONFIG_CMD_SCSI) || \
+ defined(CONFIG_CMD_USB) || \
+ defined(CONFIG_CMD_PART) || \
+ defined(CONFIG_MMC) || \
+ defined(CONFIG_SYSTEMACE)
+#define HAVE_BLOCK_DEVICE
+#endif
+
#endif /* __CONFIG_FALLBACKS_H */
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 33ee2c4..9eada95 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -35,6 +35,7 @@
#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
#define CONFIG_OF_LIBFDT
+#define CONFIG_CMD_BOOTZ
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
@@ -49,6 +50,7 @@
#define CONFIG_BOOTDELAY 1
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+#ifndef CONFIG_SPL_BUILD
#define CONFIG_EXTRA_ENV_SETTINGS \
"loadaddr=0x80200000\0" \
"fdtaddr=0x80F80000\0" \
@@ -61,12 +63,38 @@
"mmcdev=0\0" \
"mmcroot=/dev/mmcblk0p2 ro\0" \
"mmcrootfstype=ext4 rootwait\0" \
+ "nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \
+ "nandrootfstype=ubifs rootwait=1\0" \
+ "nandsrcaddr=0x280000\0" \
+ "nandimgsize=0x500000\0" \
+ "rootpath=/export/rootfs\0" \
+ "nfsopts=nolock\0" \
+ "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
+ "::off\0" \
"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
"ramrootfstype=ext2\0" \
"mmcargs=setenv bootargs console=${console} " \
"${optargs} " \
"root=${mmcroot} " \
"rootfstype=${mmcrootfstype}\0" \
+ "nandargs=setenv bootargs console=${console} " \
+ "${optargs} " \
+ "root=${nandroot} " \
+ "rootfstype=${nandrootfstype}\0" \
+ "spiroot=/dev/mtdblock4 rw\0" \
+ "spirootfstype=jffs2\0" \
+ "spisrcaddr=0xe0000\0" \
+ "spiimgsize=0x362000\0" \
+ "spibusno=0\0" \
+ "spiargs=setenv bootargs console=${console} " \
+ "${optargs} " \
+ "root=${spiroot} " \
+ "rootfstype=${spirootfstype}\0" \
+ "netargs=setenv bootargs console=${console} " \
+ "${optargs} " \
+ "root=/dev/nfs " \
+ "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
+ "ip=dhcp\0" \
"bootenv=uEnv.txt\0" \
"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
"importbootenv=echo Importing environment from mmc ...; " \
@@ -81,6 +109,21 @@
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
"bootm ${loadaddr}\0" \
+ "nandboot=echo Booting from nand ...; " \
+ "run nandargs; " \
+ "nand read ${loadaddr} ${nandsrcaddr} ${nandimgsize}; " \
+ "bootm ${loadaddr}\0" \
+ "spiboot=echo Booting from spi ...; " \
+ "run spiargs; " \
+ "sf probe ${spibusno}:0; " \
+ "sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; " \
+ "bootm ${loadaddr}\0" \
+ "netboot=echo Booting from network ...; " \
+ "setenv autoload no; " \
+ "dhcp; " \
+ "tftp ${loadaddr} ${bootfile}; " \
+ "run netargs; " \
+ "bootm ${loadaddr}\0" \
"ramboot=echo Booting from ramdisk ...; " \
"run ramargs; " \
"bootm ${loadaddr}\0" \
@@ -92,6 +135,8 @@
"if test $board_name = A335X_SK; then " \
"setenv fdtfile am335x-evmsk.dtb; fi\0" \
+#endif
+
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"echo SD/MMC found on device ${mmcdev};" \
@@ -106,6 +151,8 @@
"if run loaduimage; then " \
"run mmcboot;" \
"fi;" \
+ "else " \
+ "run nandboot;" \
"fi;" \
/* Clock Defines */
@@ -237,9 +284,9 @@
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_BUS 0
#define CONFIG_SPL_SPI_CS 0
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
-#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
-#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x80000
+#define CONFIG_SPL_MUSB_NEW_SUPPORT
+#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NAND_AM33XX_BCH
@@ -312,8 +359,38 @@
#ifdef CONFIG_MUSB_GADGET
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
+#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
#endif /* CONFIG_MUSB_GADGET */
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
+/* disable host part of MUSB in SPL */
+#undef CONFIG_MUSB_HOST
+/*
+ * Disable CPSW SPL support so we fit within the 101KiB limit.
+ */
+#undef CONFIG_SPL_ETH_SUPPORT
+#endif
+
+/*
+ * Default to using SPI for environment, etc. We have multiple copies
+ * of SPL as the ROM will check these locations.
+ * 0x0 - 0x20000 : First copy of SPL
+ * 0x20000 - 0x40000 : Second copy of SPL
+ * 0x40000 - 0x60000 : Third copy of SPL
+ * 0x60000 - 0x80000 : Fourth copy of SPL
+ * 0x80000 - 0xDF000 : U-Boot
+ * 0xDF000 - 0xE0000 : U-Boot Environment
+ * 0xE0000 - 0x442000 : Linux Kernel
+ * 0x442000 - 0x800000 : Userland
+ */
+#if defined(CONFIG_SPI_BOOT)
+# undef CONFIG_ENV_IS_NOWHERE
+# define CONFIG_ENV_IS_IN_SPI_FLASH
+# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
+# define CONFIG_ENV_OFFSET (892 << 10) /* 892 KiB in */
+# define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */
+#endif /* SPI support */
+
/* Unsupported features */
#undef CONFIG_USE_IRQ
@@ -346,10 +423,12 @@
/* CS0 */
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND
devices */
+#if !defined(CONFIG_SPI_BOOT)
#undef CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
#endif
+#endif
#endif /* ! __CONFIG_AM335X_EVM_H */
diff --git a/include/configs/apx4devkit.h b/include/configs/apx4devkit.h
index ab4efa4..3242133 100644
--- a/include/configs/apx4devkit.h
+++ b/include/configs/apx4devkit.h
@@ -182,7 +182,8 @@
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MXS
-#define CONFIG_EHCI_MXS_PORT 1
+#define CONFIG_EHCI_MXS_PORT1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_STORAGE
#endif
diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h
index bf20065..7352113 100644
--- a/include/configs/at91rm9200ek.h
+++ b/include/configs/at91rm9200ek.h
@@ -75,6 +75,9 @@
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_OF_LIBFDT
+
/*
* Memory Configuration
*/
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index f921fac..ebcc69a 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -62,6 +62,9 @@
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_OF_LIBFDT
+
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
#define CONFIG_AT91_GPIO
@@ -126,6 +129,7 @@
#endif
/* DataFlash */
+#ifndef CONFIG_AT91SAM9G20EK_2MMC
#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH 1
#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
@@ -133,6 +137,7 @@
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */
#define AT91_SPI_CLK 15000000
+#endif
#ifdef CONFIG_AT91SAM9G20EK
#define DATAFLASH_TCSS (0x22 << 16)
@@ -210,16 +215,16 @@
/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_ENV_IS_IN_NAND 1
-#define CONFIG_ENV_OFFSET 0x60000
-#define CONFIG_ENV_OFFSET_REDUND 0x80000
+#define CONFIG_ENV_OFFSET 0xc0000
+#define CONFIG_ENV_OFFSET_REDUND 0x100000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
-#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock5 " \
- "mtdparts=atmel_nand:128k(bootstrap)ro," \
- "256k(uboot)ro,128k(env1)ro," \
- "128k(env2)ro,2M(linux),-(root) " \
- "rw rootfstype=jffs2"
+#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
+#define CONFIG_BOOTARGS \
+ "console=ttyS0,115200 earlyprintk " \
+ "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
+ "256k(env),256k(env_redundant),256k(spare)," \
+ "512k(dtb),6M(kernel)ro,-(rootfs) " \
+ "root=/dev/mtdblock7 rw rootfstype=jffs2"
#endif
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index 611e3e2..cabff9a 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -212,17 +212,16 @@
/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_OFFSET 0x60000
-#define CONFIG_ENV_OFFSET_REDUND 0x80000
+#define CONFIG_ENV_OFFSET 0xc0000
+#define CONFIG_ENV_OFFSET_REDUND 0x100000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
-#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock5 " \
- "mtdparts=atmel_nand:128k(bootstrap)ro," \
- "256k(uboot)ro,128k(env1)ro," \
- "128k(env2)ro,2M(linux),-(root) " \
- "rw rootfstype=jffs2"
-
+#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
+#define CONFIG_BOOTARGS \
+ "console=ttyS0,115200 earlyprintk " \
+ "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
+ "256k(env),256k(env_redundant),256k(spare)," \
+ "512k(dtb),6M(kernel)ro,-(rootfs) " \
+ "root=/dev/mtdblock7 rw rootfstype=jffs2"
#endif
#define CONFIG_SYS_PROMPT "U-Boot> "
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index 3503822..1ab9c30 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -62,6 +62,9 @@
#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_OF_LIBFDT
+
/*
* Hardware drivers
*/
@@ -324,15 +327,16 @@
/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_ENV_IS_IN_NAND 1
-#define CONFIG_ENV_OFFSET 0x60000
-#define CONFIG_ENV_OFFSET_REDUND 0x80000
+#define CONFIG_ENV_OFFSET 0xc0000
+#define CONFIG_ENV_OFFSET_REDUND 0x100000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
-#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock5 " \
- "mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \
- "rw rootfstype=jffs2"
-
+#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
+#define CONFIG_BOOTARGS \
+ "console=ttyS0,115200 earlyprintk " \
+ "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
+ "256k(env),256k(env_redundant),256k(spare)," \
+ "512k(dtb),6M(kernel)ro,-(rootfs) " \
+ "root=/dev/mtdblock7 rw rootfstype=jffs2"
#endif
#define CONFIG_SYS_PROMPT "U-Boot> "
diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
index e988d81..07e1c9f 100644
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -47,6 +47,7 @@
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_CMD_BOOTZ
#define CONFIG_OF_LIBFDT
/* general purpose I/O */
@@ -149,19 +150,19 @@
/* bootstrap + u-boot + env in nandflash */
#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_OFFSET 0x60000
-#define CONFIG_ENV_OFFSET_REDUND 0x80000
+#define CONFIG_ENV_OFFSET 0xc0000
+#define CONFIG_ENV_OFFSET_REDUND 0x100000
#define CONFIG_ENV_SIZE 0x20000
-#define CONFIG_BOOTCOMMAND "nand read 0x70000000 0x100000 0x200000;" \
+#define CONFIG_BOOTCOMMAND \
+ "nand read 0x70000000 0x200000 0x300000;" \
"bootm 0x70000000"
#define CONFIG_BOOTARGS \
"console=ttyS0,115200 earlyprintk " \
- "root=/dev/mtdblock5 " \
- "mtdparts=atmel_nand:128k(bootstrap)ro," \
- "256k(uboot)ro,128k(env1)ro,128k(env2)ro," \
- "2M@1M(linux),-(root) " \
- "rw rootfstype=jffs2"
+ "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
+ "256k(env),256k(env_redundant),256k(spare)," \
+ "512k(dtb),6M(kernel)ro,-(rootfs) " \
+ "root=/dev/mtdblock7 rw rootfstype=jffs2"
#define CONFIG_BAUDRATE 115200
diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index 8178b32..aa359b1 100644
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -48,6 +48,9 @@
#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_OF_LIBFDT
+
#define CONFIG_ATMEL_LEGACY
#define CONFIG_AT91_GPIO 1
#define CONFIG_AT91_GPIO_PULLUP 1
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index 6fac5ac..ee6e3fc 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -42,6 +42,7 @@
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_CMD_BOOTZ
#define CONFIG_OF_LIBFDT
/* general purpose I/O */
@@ -231,11 +232,12 @@
"root=/dev/mmcblk0p2 " \
"rw rootfstype=ext4 rootwait"
#else
-#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \
- "mtdparts=atmel_nand:" \
- "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
- "root=/dev/mtdblock1 rw " \
- "rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs"
+#define CONFIG_BOOTARGS \
+ "console=ttyS0,115200 earlyprintk " \
+ "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
+ "256k(env),256k(env_redundant),256k(spare)," \
+ "512k(dtb),6M(kernel)ro,-(rootfs) " \
+ "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
#endif
#define CONFIG_BAUDRATE 115200
diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h
index 1616b39..55dc83d 100644
--- a/include/configs/cardhu.h
+++ b/include/configs/cardhu.h
@@ -47,7 +47,17 @@
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_CMD_I2C
-#define CONFIG_ENV_IS_NOWHERE
+/* SD/MMC */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_TEGRA_MMC
+#define CONFIG_CMD_MMC
+
+/* Environment in eMMC, at the end of 2nd "boot sector" */
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_ENV_OFFSET ((512 * 1024) - CONFIG_ENV_SIZE)
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#define CONFIG_SYS_MMC_ENV_PART 2
/* SPI */
#define CONFIG_TEGRA_SLINK
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index 943b658..8d79ffd 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -331,9 +331,18 @@
#define STATUS_LED_BOOT STATUS_LED_BIT
#define GREEN_LED_GPIO 186 /* CM-T35 Green LED is GPIO186 */
+#define CONFIG_SPLASHIMAGE_GUARD
+
/* GPIO banks */
#ifdef CONFIG_STATUS_LED
#define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */
#endif
+/* Display Configuration */
+#define CONFIG_OMAP3_GPIO_2
+#define CONFIG_VIDEO_OMAP3
+#define LCD_BPP LCD_COLOR16
+
+#define CONFIG_LCD
+
#endif /* __CONFIG_H */
diff --git a/include/configs/colibri_t20_iris.h b/include/configs/colibri_t20_iris.h
index 0e5f281..856c860 100644
--- a/include/configs/colibri_t20_iris.h
+++ b/include/configs/colibri_t20_iris.h
@@ -40,12 +40,6 @@
#define CONFIG_TEGRA_MMC
#define CONFIG_CMD_MMC
-/* File system support */
-#define CONFIG_DOS_PARTITION
-#define CONFIG_EFI_PARTITION
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-
/* USB host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_TEGRA
diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h
index ce32c80..b1a6e34 100644
--- a/include/configs/dalmore.h
+++ b/include/configs/dalmore.h
@@ -41,6 +41,15 @@
#define CONFIG_MACH_TYPE MACH_TYPE_DALMORE
#define CONFIG_BOARD_EARLY_INIT_F
+
+/* I2C */
+#define CONFIG_TEGRA_I2C
+#define CONFIG_SYS_I2C_INIT_BOARD
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_SYS_MAX_I2C_BUS TEGRA_I2C_NUM_CONTROLLERS
+#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_CMD_I2C
+
#define CONFIG_ENV_IS_NOWHERE
#define MACH_TYPE_DALMORE 4304 /* not yet in mach-types.h */
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
new file mode 100644
index 0000000..10a4939
--- /dev/null
+++ b/include/configs/dra7xx_evm.h
@@ -0,0 +1,36 @@
+/*
+ * (C) Copyright 2013
+ * Texas Instruments Incorporated.
+ * Lokesh Vutla <lokeshvutla@ti.com>
+ *
+ * Configuration settings for the TI DRA7XX board.
+ * See omap5_common.h for omap5 common settings.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_DRA7XX_EVM_H
+#define __CONFIG_DRA7XX_EVM_H
+
+#include <configs/omap5_common.h>
+
+#define CONFIG_DRA7XX /* in a TI DRA7XX core */
+#define CONFIG_SYS_PROMPT "DRA752 EVM # "
+
+#endif /* __CONFIG_DRA7XX_EVM_H */
diff --git a/include/configs/ea20.h b/include/configs/ea20.h
index a8c08e8..90fc7c5 100644
--- a/include/configs/ea20.h
+++ b/include/configs/ea20.h
@@ -42,6 +42,7 @@
#define CONFIG_MACH_DAVINCI_DA850_EVM
#define CONFIG_ARM926EJS /* arm926ejs CPU core */
#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
+#define CONFIG_SOC_DA850 /* TI DA850 SoC */
#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
diff --git a/include/configs/harmony.h b/include/configs/harmony.h
index 8d1fd47..0c73f86 100644
--- a/include/configs/harmony.h
+++ b/include/configs/harmony.h
@@ -56,14 +56,6 @@
#define CONFIG_TEGRA_MMC
#define CONFIG_CMD_MMC
-#define CONFIG_DOS_PARTITION
-#define CONFIG_EFI_PARTITION
-#define CONFIG_FS_EXT4
-#define CONFIG_FS_FAT
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_FS_GENERIC
-
/* NAND support */
#define CONFIG_CMD_NAND
#define CONFIG_TEGRA_NAND
diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h
index 0e7f924..559e375 100644
--- a/include/configs/igep00x0.h
+++ b/include/configs/igep00x0.h
@@ -36,6 +36,7 @@
#include <asm/arch/cpu.h>
#include <asm/arch/omap3.h>
+#include <asm/mach-types.h>
/*
* Display CPU and Board information
@@ -86,7 +87,10 @@
#define CONFIG_DOS_PARTITION 1
/* define to enable boot progress via leds */
+#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
+ (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
#define CONFIG_SHOW_BOOT_PROGRESS
+#endif
/* USB */
#define CONFIG_MUSB_UDC 1
@@ -118,7 +122,8 @@
#ifdef CONFIG_BOOT_NAND
#define CONFIG_CMD_NAND
#endif
-#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020)
+#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
+ (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#endif
#define CONFIG_CMD_DHCP
diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index 1b51fe2..f2725cc 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -233,7 +233,9 @@
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MXS
-#define CONFIG_EHCI_MXS_PORT 1
+#define CONFIG_EHCI_MXS_PORT0
+#define CONFIG_EHCI_MXS_PORT1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_STORAGE
#endif
@@ -244,7 +246,6 @@
#ifdef CONFIG_CMD_SPI
#define CONFIG_HARD_SPI
#define CONFIG_MXS_SPI
-#define CONFIG_MXS_SPI_DMA_ENABLE
#define CONFIG_SPI_HALF_DUPLEX
#define CONFIG_DEFAULT_SPI_BUS 2
#define CONFIG_DEFAULT_SPI_CS 0
diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h
index bae4ba0..57a50d7 100644
--- a/include/configs/medcom-wide.h
+++ b/include/configs/medcom-wide.h
@@ -66,11 +66,6 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
-#define CONFIG_DOS_PARTITION
-#define CONFIG_EFI_PARTITION
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-
#define CONFIG_FIT
#define CONFIG_BOOTCOMMAND \
diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h
index 7983c5d..03893d7 100644
--- a/include/configs/mx23_olinuxino.h
+++ b/include/configs/mx23_olinuxino.h
@@ -19,6 +19,8 @@
#ifndef __MX23_OLINUXINO_CONFIG_H__
#define __MX23_OLINUXINO_CONFIG_H__
+#include <asm/arch/iomux-mx23.h>
+
/*
* SoC configurations
*/
@@ -53,10 +55,14 @@
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DHCP
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_CMD_GPIO
+#define CONFIG_CMD_LED
#define CONFIG_CMD_MMC
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_USB
/*
* Memory configurations
@@ -112,6 +118,17 @@
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
/*
+ * Status LED
+ */
+#define CONFIG_STATUS_LED
+#define CONFIG_GPIO_LED
+#define CONFIG_BOARD_SPECIFIC_LED
+#define STATUS_LED_BOOT 0
+#define STATUS_LED_BIT MX23_PAD_SSP1_DETECT__GPIO_2_1
+#define STATUS_LED_STATE STATUS_LED_ON
+#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
+
+/*
* MMC Driver
*/
#ifdef CONFIG_CMD_MMC
@@ -126,6 +143,22 @@
*/
#define CONFIG_APBH_DMA
+/* USB */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MXS
+#define CONFIG_EHCI_MXS_PORT0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#endif
+
+/* Ethernet */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+#endif
+
/*
* Boot Linux
*/
@@ -167,6 +200,7 @@
"fdt_file=imx23-olinuxino.dtb\0" \
"fdt_addr=0x41000000\0" \
"boot_fdt=try\0" \
+ "ip_dyn=yes\0" \
"mmcdev=0\0" \
"mmcpart=2\0" \
"mmcroot=/dev/mmcblk0p3 rw rootwait\0" \
@@ -192,6 +226,31 @@
"fi; " \
"else " \
"bootm; " \
+ "fi;\0" \
+ "netargs=setenv bootargs console=${console_mainline},${baudrate} " \
+ "root=/dev/nfs " \
+ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+ "netboot=echo Booting from net ...; " \
+ "usb start; " \
+ "run netargs; " \
+ "if test ${ip_dyn} = yes; then " \
+ "setenv get_cmd dhcp; " \
+ "else " \
+ "setenv get_cmd tftp; " \
+ "fi; " \
+ "${get_cmd} ${uimage}; " \
+ "if test ${boot_fdt} = yes; then " \
+ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi;" \
+ "fi; " \
+ "else " \
+ "bootm; " \
"fi;\0"
#define CONFIG_BOOTCOMMAND \
@@ -201,10 +260,9 @@
"else " \
"if run loaduimage; then " \
"run mmcboot; " \
- "else " \
- "echo ERR: Fail to boot from MMC; " \
+ "else run netboot; " \
"fi; " \
"fi; " \
- "else exit; fi"
+ "else run netboot; fi"
#endif /* __MX23_OLINUXINO_CONFIG_H__ */
diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h
index c44a8b8..e5a15a4 100644
--- a/include/configs/mx23evk.h
+++ b/include/configs/mx23evk.h
@@ -33,8 +33,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_MX23EVK
#define CONFIG_SYS_NO_FLASH
-#define CONFIG_SYS_ICACHE_OFF
-#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_MISC_INIT
@@ -60,6 +58,7 @@
#define CONFIG_CMD_FAT
#define CONFIG_CMD_GPIO
#define CONFIG_CMD_MMC
+#define CONFIG_CMD_USB
#define CONFIG_CMD_BOOTZ
/* Memory configurations */
@@ -112,7 +111,6 @@
#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
#define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/* DMA */
#define CONFIG_APBH_DMA
@@ -125,6 +123,16 @@
#define CONFIG_MXS_MMC
#endif
+/* USB */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MXS
+#define CONFIG_EHCI_MXS_PORT0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#endif
+
/* Boot Linux */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index 71447d9..0d918a1 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -181,7 +181,8 @@
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MXS
-#define CONFIG_EHCI_MXS_PORT 1
+#define CONFIG_EHCI_MXS_PORT1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_STORAGE
#define CONFIG_USB_HOST_ETHER
@@ -202,7 +203,6 @@
#ifdef CONFIG_CMD_SPI
#define CONFIG_HARD_SPI
#define CONFIG_MXS_SPI
-#define CONFIG_MXS_SPI_DMA_ENABLE
#define CONFIG_SPI_HALF_DUPLEX
#define CONFIG_DEFAULT_SPI_BUS 2
#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
new file mode 100644
index 0000000..b333937
--- /dev/null
+++ b/include/configs/mx6_common.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __MX6_COMMON_H
+#define __MX6_COMMON_H
+
+#define CONFIG_ARM_ERRATA_743622
+#define CONFIG_ARM_ERRATA_751472
+
+#endif
diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h
index 138e460..bd52cde 100644
--- a/include/configs/mx6qarm2.h
+++ b/include/configs/mx6qarm2.h
@@ -24,6 +24,9 @@
#define CONFIG_MX6
#define CONFIG_MX6Q
+
+#include "mx6_common.h"
+
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h
index d76357c..9eda9ed 100644
--- a/include/configs/mx6qsabre_common.h
+++ b/include/configs/mx6qsabre_common.h
@@ -19,6 +19,9 @@
#define CONFIG_MX6
#define CONFIG_MX6Q
+
+#include "mx6_common.h"
+
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
@@ -171,6 +174,7 @@
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
+#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
index 752f098..5dc8255 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -24,6 +24,9 @@
#define CONFIG_MX6
#define CONFIG_MX6Q
+
+#include "mx6_common.h"
+
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
@@ -241,6 +244,7 @@
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
+#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
new file mode 100644
index 0000000..93e7fe4
--- /dev/null
+++ b/include/configs/nitrogen6x.h
@@ -0,0 +1,285 @@
+/*
+ * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
+ *
+ * Configuration settings for the Boundary Devices Nitrogen6X
+ * and Freescale i.MX6Q Sabre Lite boards.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_MX6
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+#define CONFIG_MACH_TYPE 3769
+
+#include <asm/arch/imx-regs.h>
+#include <asm/imx-common/gpio.h>
+
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_REVISION_TAG
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_MISC_INIT_R
+#define CONFIG_MXC_GPIO
+
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE UART2_BASE
+
+#define CONFIG_CMD_SF
+#ifdef CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_SST
+#define CONFIG_MXC_SPI
+#define CONFIG_SF_DEFAULT_BUS 0
+#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8))
+#define CONFIG_SF_DEFAULT_SPEED 25000000
+#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
+#endif
+
+/* I2C Configs */
+#define CONFIG_CMD_I2C
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_I2C_MXC
+#define CONFIG_SYS_I2C_SPEED 100000
+
+/* OCOTP Configs */
+#define CONFIG_CMD_IMXOTP
+#ifdef CONFIG_CMD_IMXOTP
+#define CONFIG_IMX_OTP
+#define IMX_OTP_BASE OCOTP_BASE_ADDR
+#define IMX_OTP_ADDR_MAX 0x7F
+#define IMX_OTP_DATA_ERROR_VAL 0xBADABADA
+#define IMX_OTPWRITE_ENABLED
+#endif
+
+/* MMC Configs */
+#define CONFIG_FSL_ESDHC
+#define CONFIG_FSL_USDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR 0
+#define CONFIG_SYS_FSL_USDHC_NUM 2
+
+#define CONFIG_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_BOUNCE_BUFFER
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+
+#ifdef CONFIG_MX6Q
+#define CONFIG_CMD_SATA
+#endif
+
+/*
+ * SATA Configs
+ */
+#ifdef CONFIG_CMD_SATA
+#define CONFIG_DWC_AHSATA
+#define CONFIG_SYS_SATA_MAX_DEVICE 1
+#define CONFIG_DWC_AHSATA_PORT_ID 0
+#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
+#define CONFIG_LBA48
+#define CONFIG_LIBATA
+#endif
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_FEC_MXC
+#define CONFIG_MII
+#define IMX_FEC_BASE ENET_BASE_ADDR
+#define CONFIG_FEC_XCV_TYPE RGMII
+#define CONFIG_ETHPRIME "FEC"
+#define CONFIG_FEC_MXC_PHYADDR 6
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_MICREL
+#define CONFIG_PHY_MICREL_KSZ9021
+
+/* USB Configs */
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_FAT
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX6
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_MXC_USB_PORT 1
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS 0
+
+/* Miscellaneous commands */
+#define CONFIG_CMD_BMODE
+#define CONFIG_CMD_SETEXPR
+
+/* Framebuffer and LCD */
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_IPUV3
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_IPUV3_CLK 260000000
+#define CONFIG_CMD_HDMIDETECT
+#define CONFIG_CONSOLE_MUX
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+
+/* Command definition */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_BOOTDELAY 1
+
+#define CONFIG_PREBOOT ""
+
+#define CONFIG_LOADADDR 0x12000000
+#define CONFIG_SYS_TEXT_BASE 0x17800000
+
+#ifdef CONFIG_CMD_SATA
+#define CONFIG_DRIVE_SATA "sata "
+#else
+#define CONFIG_DRIVE_SATA
+#endif
+
+#ifdef CONFIG_CMD_MMC
+#define CONFIG_DRIVE_MMC "mmc "
+#else
+#define CONFIG_DRIVE_MMC
+#endif
+
+#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "console=ttymxc1\0" \
+ "clearenv=if sf probe || sf probe || sf probe 1 ; then " \
+ "sf erase 0xc0000 0x2000 && " \
+ "echo restored environment to factory default ; fi\0" \
+ "bootcmd=for dtype in " CONFIG_DRIVE_TYPES \
+ "; do " \
+ "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \
+ "for fs in fat ext2 ; do " \
+ "${fs}load " \
+ "${dtype} ${disk}:1 " \
+ "10008000 " \
+ "/6x_bootscript" \
+ "&& source 10008000 ; " \
+ "done ; " \
+ "done ; " \
+ "done; " \
+ "setenv stdout serial,vga ; " \
+ "echo ; echo 6x_bootscript not found ; " \
+ "echo ; echo serial console at 115200, 8N1 ; echo ; " \
+ "echo details at http://boundarydevices.com/6q_bootscript ; " \
+ "setenv stdout serial\0" \
+ "upgradeu=for dtype in " CONFIG_DRIVE_TYPES \
+ "; do " \
+ "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \
+ "for fs in fat ext2 ; do " \
+ "${fs}load ${dtype} ${disk}:1 10008000 " \
+ "/6x_upgrade " \
+ "&& source 10008000 ; " \
+ "done ; " \
+ "done ; " \
+ "done\0" \
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT "U-Boot > "
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_CBSIZE 1024
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_MEMTEST_START 0x10000000
+#define CONFIG_SYS_MEMTEST_END 0x10010000
+#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
+
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+#define CONFIG_SYS_HZ 1000
+
+#define CONFIG_CMDLINE_EDITING
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
+
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_ENV_SIZE (8 * 1024)
+
+/* #define CONFIG_ENV_IS_IN_MMC */
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+
+#if defined(CONFIG_ENV_IS_IN_MMC)
+#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
+#define CONFIG_ENV_OFFSET (768 * 1024)
+#define CONFIG_ENV_SECT_SIZE (8 * 1024)
+#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
+#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
+#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
+#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
+#endif
+
+#define CONFIG_OF_LIBFDT
+#define CONFIG_CMD_BOOTZ
+
+#define CONFIG_SYS_DCACHE_OFF
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+#define CONFIG_CMD_CACHE
+#endif
+
+#define CONFIG_CMD_BMP
+
+#define CONFIG_CMD_TIME
+#define CONFIG_SYS_ALT_MEMTEST
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/ns9750dev.h b/include/configs/ns9750dev.h
deleted file mode 100644
index 3f49c6f..0000000
--- a/include/configs/ns9750dev.h
+++ /dev/null
@@ -1,187 +0,0 @@
-/*
- * Copyright (C) 2004 by FS Forth-Systeme GmbH.
- * All rights reserved.
- * Markus Pietrek <mpietrek@fsforth.de>
- *
- * Configuation settings for the NetSilicon NS9750 DevBoard
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
-#define CONFIG_NS9750 1 /* in an NetSilicon NS9750 SoC */
-#define CONFIG_NS9750DEV 1 /* on an NetSilicon NS9750 DevBoard */
-
-/* input clock of PLL */
-#define CONFIG_SYS_CLK_FREQ 324403200 /* Don't use PLL. SW11-4 off */
-
-#define CPU_CLK_FREQ (CONFIG_SYS_CLK_FREQ/2)
-#define AHB_CLK_FREQ (CONFIG_SYS_CLK_FREQ/4)
-#define BBUS_CLK_FREQ (CONFIG_SYS_CLK_FREQ/8)
-
-/*@TODO #define CONFIG_STATUS_LED*/
-#define CONFIG_USE_IRQ
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-
-/*
- * Hardware drivers
- */
-#define CONFIG_NS9750_UART 1 /* use on-chip UART */
-
-/*
- * select serial console configuration
- */
-#define CONFIG_CONS_INDEX 1 /* Port B */
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_BAUDRATE 38400
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-
-#define CONFIG_CMD_BDI
-#define CONFIG_CMD_CONSOLE
-#define CONFIG_CMD_LOADB
-#define CONFIG_CMD_LOADS
-#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_PING
-
-
-#define CONFIG_BOOTDELAY 3
-/*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */
-
-#define CONFIG_ETHADDR 00:04:f3:ff:ff:fb /*@TODO unset */
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR 192.168.42.30
-#define CONFIG_SERVERIP 192.168.42.1
-
-/*#define CONFIG_BOOTFILE "elinos-lart" */
-/*#define CONFIG_BOOTCOMMAND "tftp; bootm" */
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
-/* what's this ? it's not used anywhere */
-#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
-#endif
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "NS9750DEV # " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x00780000 /* 7,5 MB in DRAM */ /* @TODO */
-
-#define CONFIG_SYS_LOAD_ADDR 0x00600000 /* default load address */ /* @TODO */
-
-#define CONFIG_SYS_HZ (CPU_CLK_FREQ/64)
-
-#define NS9750_ETH_PHY_ADDRESS (0x0000)
-
-/*-----------------------------------------------------------------------
- * Stack sizes
- */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
-#endif
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-/* TODO */
-#define CONFIG_NR_DRAM_BANKS 2 /* we have 1 bank of DRAM */
-#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */
-#define PHYS_SDRAM_2 0x10000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_2_SIZE 0x00800000 /* 8 MB */
-
-#define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */
-
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-
-/* @TODO*/
-#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
-#if 0
-#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
-#endif
-
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#ifdef CONFIG_AMD_LV800
-#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
-#define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */
-#endif
-#ifdef CONFIG_AMD_LV400
-#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
-#define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */
-#endif
-
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-
-/* @TODO */
-/*#define CONFIG_ENV_IS_IN_FLASH 1*/
-#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
-
-#ifdef CONFIG_STATUS_LED
-
-extern void __led_init(led_id_t mask, int state);
-extern void __led_toggle(led_id_t mask);
-extern void __led_set(led_id_t mask, int state);
-
-#endif /* CONFIG_STATUS_LED */
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 59255c4..48ce4c0 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -53,7 +53,8 @@
#define CONFIG_MISC_INIT_R
-#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_LIBFDT
+#define CONFIG_CMD_BOOTZ
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
diff --git a/include/configs/omap3_mvblx.h b/include/configs/omap3_mvblx.h
index 07de565..376a3d0 100644
--- a/include/configs/omap3_mvblx.h
+++ b/include/configs/omap3_mvblx.h
@@ -90,9 +90,9 @@
/*
* select serial console configuration
*/
-#define CONFIG_CONS_INDEX 3
-#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
-#define CONFIG_SERIAL3 3 /* UART3 */
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
+#define CONFIG_SERIAL1 1 /* UART1 */
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
@@ -102,6 +102,10 @@
#define CONFIG_OMAP_HSMMC 1
#define CONFIG_DOS_PARTITION 1
+/* silent console by default */
+#define CONFIG_SYS_DEVICE_NULLDEV 1
+#define CONFIG_SILENT_CONSOLE 1
+
/* USB */
#define CONFIG_MUSB_UDC 1
#define CONFIG_USB_OMAP3 1
@@ -152,19 +156,23 @@
/* Environment information */
#undef CONFIG_ENV_OVERWRITE /* disallow overwriting serial# and ethaddr */
-#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTDELAY 0
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+#define CONFIG_AUTOBOOT_KEYED
+#define CONFIG_AUTOBOOT_STOP_STR "S"
#define CONFIG_EXTRA_ENV_SETTINGS \
+ "silent=true\0" \
"loadaddr=0x82000000\0" \
"usbtty=cdc_acm\0" \
- "console=ttyO2,115200n8\0" \
+ "console=ttyO0,115200n8\0" \
"mpurate=600\0" \
"vram=12M\0" \
"dvimode=1024x768-24@60\0" \
"defaultdisplay=dvi\0" \
- "fpgafilename=mvbluelynx_x.rbf\0" \
- "loadfpga=if fatload mmc ${mmcdev} ${loadaddr} ${fpgafilename}; then " \
- "fpga load 0 ${loadaddr} ${filesize}; " \
+ "loadfpga=if ext2load mmc ${mmcdev}:2 ${loadaddr} "\
+ "/lib/firmware/mvblx/${fpgafilename}; then " \
+ "fpga load 0 ${loadaddr} ${filesize}; " \
"fi;\0" \
"mmcdev=0\0" \
"mmcroot=/dev/mmcblk0p2 rw\0" \
@@ -177,6 +185,7 @@
"omapdss.def_disp=${defaultdisplay} " \
"root=${mmcroot} " \
"rootfstype=${mmcrootfstype} " \
+ "mvfw.fpgavers=${fpgavers} " \
"${cmdline_suffix}\0" \
"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
"importbootenv=echo Importing environment from mmc ...; " \
diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h
index 180cb24..6ae6a0f 100644
--- a/include/configs/omap4_common.h
+++ b/include/configs/omap4_common.h
@@ -52,7 +52,7 @@
#define CONFIG_MISC_INIT_R
#define CONFIG_OF_LIBFDT 1
-
+#define CONFIG_CMD_BOOTZ
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h
new file mode 100644
index 0000000..af97564
--- /dev/null
+++ b/include/configs/omap5_common.h
@@ -0,0 +1,262 @@
+/*
+ * (C) Copyright 2013
+ * Texas Instruments Incorporated.
+ * Sricharan R <r.sricharan@ti.com>
+ *
+ * Derived from OMAP4 done by:
+ * Aneesh V <aneesh@ti.com>
+ *
+ * TI OMAP5 AND DRA7XX common configuration settings
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_OMAP5_COMMON_H
+#define __CONFIG_OMAP5_COMMON_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_OMAP /* in a TI OMAP core */
+#define CONFIG_OMAP54XX /* which is a 54XX */
+#define CONFIG_OMAP_GPIO
+
+/* Get CPU defs */
+#include <asm/arch/cpu.h>
+#include <asm/arch/omap.h>
+
+/* Display CPU and Board Info */
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+/* Clock Defines */
+#define V_OSCK 19200000 /* Clock output from T2 */
+#define V_SCLK V_OSCK
+
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_OF_LIBFDT
+#define CONFIG_CMD_BOOTZ
+
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+
+/*
+ * Size of malloc() pool
+ * Total Size Environment - 128k
+ * Malloc - add 256k
+ */
+#define CONFIG_ENV_SIZE (128 << 10)
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
+/* Vector Base */
+#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
+
+/*
+ * Hardware drivers
+ */
+
+/*
+ * serial port - NS16550 compatible
+ */
+#define V_NS16550_CLK 48000000
+
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE (-4)
+#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
+#define CONFIG_CONS_INDEX 3
+#define CONFIG_SYS_NS16550_COM3 UART3_BASE
+
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
+ 115200}
+/* I2C */
+#define CONFIG_HARD_I2C
+#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_I2C_SLAVE 1
+#define CONFIG_DRIVER_OMAP34XX_I2C
+#define CONFIG_I2C_MULTI_BUS
+
+
+/* MMC */
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC
+#define CONFIG_OMAP_HSMMC
+#define CONFIG_DOS_PARTITION
+
+/* MMC ENV related defines */
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
+#define CONFIG_ENV_OFFSET 0xE0000
+#define CONFIG_CMD_SAVEENV
+
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+
+/* Flash */
+#define CONFIG_SYS_NO_FLASH
+
+/* Cache */
+#define CONFIG_SYS_CACHELINE_SIZE 64
+#define CONFIG_SYS_CACHELINE_SHIFT 6
+
+/* commands to include */
+#include <config_cmd_default.h>
+
+/* Enabled commands */
+#define CONFIG_CMD_EXT2 /* EXT2 Support */
+#define CONFIG_CMD_FAT /* FAT support */
+#define CONFIG_CMD_I2C /* I2C serial bus support */
+#define CONFIG_CMD_MMC /* MMC support */
+#define CONFIG_CMD_SAVEENV
+
+/* Disabled commands */
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
+#undef CONFIG_CMD_IMLS /* List all found images */
+
+/*
+ * Environment setup
+ */
+
+#define CONFIG_BOOTDELAY 3
+
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "loadaddr=0x82000000\0" \
+ "console=ttyO2,115200n8\0" \
+ "usbtty=cdc_acm\0" \
+ "vram=16M\0" \
+ "mmcdev=0\0" \
+ "mmcroot=/dev/mmcblk0p2 rw\0" \
+ "mmcrootfstype=ext3 rootwait\0" \
+ "mmcargs=setenv bootargs console=${console} " \
+ "vram=${vram} " \
+ "root=${mmcroot} " \
+ "rootfstype=${mmcrootfstype}\0" \
+ "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
+ "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
+ "source ${loadaddr}\0" \
+ "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
+ "mmcboot=echo Booting from mmc${mmcdev} ...; " \
+ "run mmcargs; " \
+ "bootm ${loadaddr}\0" \
+
+#define CONFIG_BOOTCOMMAND \
+ "mmc dev ${mmcdev}; if mmc rescan; then " \
+ "if run loadbootscript; then " \
+ "run bootscript; " \
+ "else " \
+ "if run loaduimage; then " \
+ "run mmcboot; " \
+ "fi; " \
+ "fi; " \
+ "fi"
+
+#define CONFIG_AUTO_COMPLETE 1
+
+/*
+ * Miscellaneous configurable options
+ */
+
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
+#define CONFIG_SYS_CBSIZE 256
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
+
+/*
+ * memtest setup
+ */
+#define CONFIG_SYS_MEMTEST_START 0x80000000
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
+
+/* Default load address */
+#define CONFIG_SYS_LOAD_ADDR 0x80000000
+
+/* Use General purpose timer 1 */
+#define CONFIG_SYS_TIMERBASE GPT2_BASE
+#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
+#define CONFIG_SYS_HZ 1000
+
+/*
+ * SDRAM Memory Map
+ * Even though we use two CS all the memory
+ * is mapped to one contiguous block
+ */
+#define CONFIG_NR_DRAM_BANKS 1
+
+#define CONFIG_SYS_SDRAM_BASE 0x80000000
+#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
+ GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
+
+/* Defines for SDRAM init */
+#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
+#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
+#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
+#endif
+
+/* Defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_TEXT_BASE 0x40300350
+#define CONFIG_SPL_MAX_SIZE 0x19000 /* 100K */
+#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
+#define CONFIG_SPL_DISPLAY_PRINT
+
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_FAT_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+/*
+ * 64 bytes before this address should be set aside for u-boot.img's
+ * header. That is 80E7FFC0--0x80E80000 should not be used for any
+ * other needs.
+ */
+#define CONFIG_SYS_TEXT_BASE 0x80E80000
+
+/*
+ * BSS and malloc area 64MB into memory to allow enough
+ * space for the kernel at the beginning of memory
+ */
+#define CONFIG_SPL_BSS_START_ADDR 0x84000000
+#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
+#define CONFIG_SYS_SPL_MALLOC_START 0x84100000
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
+#define CONFIG_SPL_GPIO_SUPPORT
+
+#endif /* __CONFIG_OMAP5_COMMON_H */
diff --git a/include/configs/omap5_evm.h b/include/configs/omap5_evm.h
index 623da77..22a8e13 100644
--- a/include/configs/omap5_evm.h
+++ b/include/configs/omap5_evm.h
@@ -1,12 +1,10 @@
/*
- * (C) Copyright 2010
+ * (C) Copyright 2013
* Texas Instruments Incorporated.
* Sricharan R <r.sricharan@ti.com>
*
- * Derived from OMAP4 done by:
- * Aneesh V <aneesh@ti.com>
- *
* Configuration settings for the TI EVM5430 board.
+ * See omap5_common.h for omap5 common settings.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -27,242 +25,16 @@
* MA 02111-1307 USA
*/
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- */
-#define CONFIG_ARMV7 /* This is an ARM V7 CPU core */
-#define CONFIG_OMAP /* in a TI OMAP core */
-#define CONFIG_OMAP54XX /* which is a 54XX */
-#define CONFIG_OMAP5430 /* which is in a 5430 */
-#define CONFIG_5430EVM /* working with EVM */
-#define CONFIG_OMAP_GPIO
-
-/* Get CPU defs */
-#include <asm/arch/cpu.h>
-#include <asm/arch/omap.h>
-
-/* Display CPU and Board Info */
-#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_DISPLAY_BOARDINFO
-
-/* Clock Defines */
-#define V_OSCK 19200000 /* Clock output from T2 */
-#define V_SCLK V_OSCK
-
-#define CONFIG_MISC_INIT_R
-
-#define CONFIG_OF_LIBFDT
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-/*
- * Size of malloc() pool
- * Total Size Environment - 128k
- * Malloc - add 256k
- */
-#define CONFIG_ENV_SIZE (128 << 10)
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
-/* Vector Base */
-#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
-
-/*
- * Hardware drivers
- */
-
-/*
- * serial port - NS16550 compatible
- */
-#define V_NS16550_CLK 48000000
-
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
-#define CONFIG_CONS_INDEX 3
-#define CONFIG_SYS_NS16550_COM3 UART3_BASE
+#ifndef __CONFIG_OMAP5_EVM_H
+#define __CONFIG_OMAP5_EVM_H
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
- 115200}
-/* I2C */
-#define CONFIG_HARD_I2C
-#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_I2C_SLAVE 1
-#define CONFIG_DRIVER_OMAP34XX_I2C
-#define CONFIG_I2C_MULTI_BUS
+#include <configs/omap5_common.h>
/* TWL6035 */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_TWL6035_POWER
#endif
-/* MMC */
-#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC
-#define CONFIG_OMAP_HSMMC
-#define CONFIG_DOS_PARTITION
-
-/* MMC ENV related defines */
-#define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
-#define CONFIG_ENV_OFFSET 0xE0000
-#define CONFIG_CMD_SAVEENV
-
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-
-/* Flash */
-#define CONFIG_SYS_NO_FLASH
-
-/* Cache */
-#define CONFIG_SYS_CACHELINE_SIZE 64
-#define CONFIG_SYS_CACHELINE_SHIFT 6
-
-/* commands to include */
-#include <config_cmd_default.h>
-
-/* Enabled commands */
-#define CONFIG_CMD_EXT2 /* EXT2 Support */
-#define CONFIG_CMD_FAT /* FAT support */
-#define CONFIG_CMD_I2C /* I2C serial bus support */
-#define CONFIG_CMD_MMC /* MMC support */
-#define CONFIG_CMD_SAVEENV
-
-/* Disabled commands */
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
-#undef CONFIG_CMD_IMLS /* List all found images */
-
-/*
- * Environment setup
- */
-
-#define CONFIG_BOOTDELAY 3
-
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "loadaddr=0x82000000\0" \
- "console=ttyO2,115200n8\0" \
- "usbtty=cdc_acm\0" \
- "vram=16M\0" \
- "mmcdev=0\0" \
- "mmcroot=/dev/mmcblk0p2 rw\0" \
- "mmcrootfstype=ext3 rootwait\0" \
- "mmcargs=setenv bootargs console=${console} " \
- "vram=${vram} " \
- "root=${mmcroot} " \
- "rootfstype=${mmcrootfstype}\0" \
- "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
- "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
- "source ${loadaddr}\0" \
- "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
- "mmcboot=echo Booting from mmc${mmcdev} ...; " \
- "run mmcargs; " \
- "bootm ${loadaddr}\0" \
-
-#define CONFIG_BOOTCOMMAND \
- "mmc dev ${mmcdev}; if mmc rescan; then " \
- "if run loadbootscript; then " \
- "run bootscript; " \
- "else " \
- "if run loaduimage; then " \
- "run mmcboot; " \
- "fi; " \
- "fi; " \
- "fi"
-
-#define CONFIG_AUTO_COMPLETE 1
-
-/*
- * Miscellaneous configurable options
- */
-
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_PROMPT "OMAP5430 EVM # "
-#define CONFIG_SYS_CBSIZE 256
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS 16
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
-
-/*
- * memtest setup
- */
-#define CONFIG_SYS_MEMTEST_START 0x80000000
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
-
-/* Default load address */
-#define CONFIG_SYS_LOAD_ADDR 0x80000000
-
-/* Use General purpose timer 1 */
-#define CONFIG_SYS_TIMERBASE GPT2_BASE
-#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
-
-/*
- * SDRAM Memory Map
- * Even though we use two CS all the memory
- * is mapped to one contiguous block
- */
-#define CONFIG_NR_DRAM_BANKS 1
-
-#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
- GENERATED_GBL_DATA_SIZE)
-
-#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
-
-/* Defines for SDRAM init */
-#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
-#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
-#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
-#endif
-
-/* Defines for SPL */
-#define CONFIG_SPL
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_TEXT_BASE 0x40300350
-#define CONFIG_SPL_MAX_SIZE 0x19000 /* 100K */
-#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
-#define CONFIG_SPL_DISPLAY_PRINT
-
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
-#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
-#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
-#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
-
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
-
-/*
- * 64 bytes before this address should be set aside for u-boot.img's
- * header. That is 80E7FFC0--0x80E80000 should not be used for any
- * other needs.
- */
-#define CONFIG_SYS_TEXT_BASE 0x80E80000
-
-/*
- * BSS and malloc area 64MB into memory to allow enough
- * space for the kernel at the beginning of memory
- */
-#define CONFIG_SPL_BSS_START_ADDR 0x84000000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
-#define CONFIG_SYS_SPL_MALLOC_START 0x84100000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
-#endif /* __CONFIG_H */
+#endif /* __CONFIG_OMAP5_EVM_H */
diff --git a/include/configs/paz00.h b/include/configs/paz00.h
index 2edb4aa..eac1ef9 100644
--- a/include/configs/paz00.h
+++ b/include/configs/paz00.h
@@ -44,14 +44,6 @@
#define CONFIG_TEGRA_MMC
#define CONFIG_CMD_MMC
-#define CONFIG_DOS_PARTITION
-#define CONFIG_EFI_PARTITION
-#define CONFIG_FS_EXT4
-#define CONFIG_FS_FAT
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_FS_GENERIC
-
/* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET ((1024 * 1024) - CONFIG_ENV_SIZE)
diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h
index aa90ba9..63ab123 100644
--- a/include/configs/pcm051.h
+++ b/include/configs/pcm051.h
@@ -234,7 +234,7 @@
#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
-#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
+#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
/*
* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
diff --git a/include/configs/plutux.h b/include/configs/plutux.h
index deee237..4cfe88a 100644
--- a/include/configs/plutux.h
+++ b/include/configs/plutux.h
@@ -65,11 +65,6 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
-#define CONFIG_DOS_PARTITION
-#define CONFIG_EFI_PARTITION
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-
#define CONFIG_FIT
#define CONFIG_BOOTCOMMAND \
diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h
index decf8d9..349497f 100644
--- a/include/configs/sc_sps_1.h
+++ b/include/configs/sc_sps_1.h
@@ -170,7 +170,8 @@
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MXS
-#define CONFIG_EHCI_MXS_PORT 0
+#define CONFIG_EHCI_MXS_PORT0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_STORAGE
#endif
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
index de0c777..f66173e 100644
--- a/include/configs/seaboard.h
+++ b/include/configs/seaboard.h
@@ -70,14 +70,6 @@
#define CONFIG_TEGRA_MMC
#define CONFIG_CMD_MMC
-#define CONFIG_DOS_PARTITION
-#define CONFIG_EFI_PARTITION
-#define CONFIG_FS_EXT4
-#define CONFIG_FS_FAT
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_FS_GENERIC
-
/* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET ((512 * 1024) - CONFIG_ENV_SIZE)
diff --git a/include/configs/tec.h b/include/configs/tec.h
index caeb9cd..f90f5c7 100644
--- a/include/configs/tec.h
+++ b/include/configs/tec.h
@@ -73,11 +73,6 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
-#define CONFIG_DOS_PARTITION
-#define CONFIG_EFI_PARTITION
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-
#define CONFIG_FIT
#define CONFIG_BOOTCOMMAND \
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index 88acccf..036ded0 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -21,8 +21,8 @@
* MA 02111-1307 USA
*/
-#ifndef __TEGRA_COMMON_H
-#define __TEGRA_COMMON_H
+#ifndef _TEGRA_COMMON_H_
+#define _TEGRA_COMMON_H_
#include <asm/sizes.h>
#include <linux/stringify.h>
@@ -56,10 +56,8 @@
#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
/*
- * PllX Configuration
+ * NS16550 Configuration
*/
-#define CONFIG_SYS_CPU_OSC_FREQUENCY 1000000 /* Set CPU clock to 1GHz */
-
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
@@ -90,6 +88,18 @@
#define CONFIG_COMMAND_HISTORY
#define CONFIG_AUTO_COMPLETE
+/* turn on commonly used storage-related commands */
+
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_FS_EXT4
+#define CONFIG_FS_FAT
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_FS_GENERIC
+#define CONFIG_CMD_PART
+
#define CONFIG_SYS_NO_FLASH
#define CONFIG_CONSOLE_MUX
@@ -158,5 +168,7 @@
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SYS_GENERIC_BOARD
+/* Misc utility code */
+#define CONFIG_BOUNCE_BUFFER
#endif /* _TEGRA_COMMON_H_ */
diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h
index 0033530..c2986d8 100644
--- a/include/configs/tegra114-common.h
+++ b/include/configs/tegra114-common.h
@@ -76,4 +76,7 @@
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/tegra114/u-boot-spl.lds"
+/* Total I2C ports on Tegra114 */
+#define TEGRA_I2C_NUM_CONTROLLERS 5
+
#endif /* _TEGRA114_COMMON_H_ */
diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
index 33e5f52..e464e06 100644
--- a/include/configs/tegra20-common.h
+++ b/include/configs/tegra20-common.h
@@ -26,6 +26,12 @@
#include "tegra-common.h"
/*
+ * Errata configuration
+ */
+#define CONFIG_ARM_ERRATA_742230
+#define CONFIG_ARM_ERRATA_751472
+
+/*
* NS16550 Configuration
*/
#define V_NS16550_CLK 216000000 /* 216MHz (pllp_out0) */
@@ -108,13 +114,7 @@
/* Total I2C ports on Tegra20 */
#define TEGRA_I2C_NUM_CONTROLLERS 4
-#define CONFIG_PARTITION_UUIDS
-#define CONFIG_CMD_PART
-
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_SYS_NAND_ONFI_DETECTION
-/* Misc utility code */
-#define CONFIG_BOUNCE_BUFFER
-
#endif /* _TEGRA20_COMMON_H_ */
diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h
index 04517e1..f6c07c6 100644
--- a/include/configs/tegra30-common.h
+++ b/include/configs/tegra30-common.h
@@ -26,6 +26,12 @@
#include "tegra-common.h"
/*
+ * Errata configuration
+ */
+#define CONFIG_ARM_ERRATA_743622
+#define CONFIG_ARM_ERRATA_751472
+
+/*
* NS16550 Configuration
*/
#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h
index 334d3a3..0644f7a 100644
--- a/include/configs/trimslice.h
+++ b/include/configs/trimslice.h
@@ -67,14 +67,6 @@
#define CONFIG_TEGRA_MMC
#define CONFIG_CMD_MMC
-#define CONFIG_DOS_PARTITION
-#define CONFIG_EFI_PARTITION
-#define CONFIG_FS_EXT4
-#define CONFIG_FS_FAT
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_FS_GENERIC
-
/* Environment in SPI */
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SPI_MAX_HZ 48000000
diff --git a/include/configs/ventana.h b/include/configs/ventana.h
index b55ebc9..5755f11 100644
--- a/include/configs/ventana.h
+++ b/include/configs/ventana.h
@@ -50,14 +50,6 @@
#define CONFIG_TEGRA_MMC
#define CONFIG_CMD_MMC
-#define CONFIG_DOS_PARTITION
-#define CONFIG_EFI_PARTITION
-#define CONFIG_FS_EXT4
-#define CONFIG_FS_FAT
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_FS_GENERIC
-
/* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET ((1024 * 1024) - CONFIG_ENV_SIZE)
diff --git a/include/configs/whistler.h b/include/configs/whistler.h
index 1e554d8..9542c7e 100644
--- a/include/configs/whistler.h
+++ b/include/configs/whistler.h
@@ -59,14 +59,6 @@
#define CONFIG_TEGRA_MMC
#define CONFIG_CMD_MMC
-#define CONFIG_DOS_PARTITION
-#define CONFIG_EFI_PARTITION
-#define CONFIG_FS_EXT4
-#define CONFIG_FS_FAT
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_FS_GENERIC
-
/*
* Environment in eMMC, at the end of 2nd "boot sector". Note: This assumes
* the user plugged the standard 8MB MoviNAND card into J29/HSMMC/POP. If
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index 18fd76f..2989e72 100644
--- a/include/configs/zynq.h
+++ b/include/configs/zynq.h
@@ -58,6 +58,11 @@
#define CONFIG_ZYNQ_GEM
#define CONFIG_ZYNQ_GEM_BASEADDR0 0xE000B000
+#if defined(CONFIG_ZYNQ_DCC)
+# define CONFIG_ARM_DCC
+# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
+#endif
+
#define CONFIG_BOOTP_SERVERIP
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
diff --git a/include/env_callback.h b/include/env_callback.h
index c583120..e89b6da 100644
--- a/include/env_callback.h
+++ b/include/env_callback.h
@@ -41,6 +41,12 @@
#define SILENT_CALLBACK
#endif
+#ifdef CONFIG_SPLASHIMAGE_GUARD
+#define SPLASHIMAGE_CALLBACK "splashimage:splashimage,"
+#else
+#define SPLASHIMAGE_CALLBACK
+#endif
+
/*
* This list of callback bindings is static, but may be overridden by defining
* a new association in the ".callbacks" environment variable.
@@ -51,6 +57,7 @@
"bootfile:bootfile," \
"loadaddr:loadaddr," \
SILENT_CALLBACK \
+ SPLASHIMAGE_CALLBACK \
"stdin:console,stdout:console,stderr:console," \
CONFIG_ENV_CALLBACK_LIST_STATIC
@@ -76,7 +83,7 @@ void env_callback_init(ENTRY *var_entry);
}
#else
#define U_BOOT_ENV_CALLBACK(name, callback) \
- ll_entry_declare(struct env_clbk_tbl, name, env_clbk, env_clbk) = \
+ ll_entry_declare(struct env_clbk_tbl, name, env_clbk) = \
{#name, callback}
#endif
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 77f244f..2189483 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -62,6 +62,7 @@ struct fdt_memory {
enum fdt_compat_id {
COMPAT_UNKNOWN,
COMPAT_NVIDIA_TEGRA20_USB, /* Tegra20 USB port */
+ COMPAT_NVIDIA_TEGRA114_I2C, /* Tegra114 I2C w/single clock source */
COMPAT_NVIDIA_TEGRA20_I2C, /* Tegra20 i2c */
COMPAT_NVIDIA_TEGRA20_DVC, /* Tegra20 dvc (really just i2c) */
COMPAT_NVIDIA_TEGRA20_EMC, /* Tegra20 memory controller */
@@ -70,6 +71,8 @@ enum fdt_compat_id {
COMPAT_NVIDIA_TEGRA20_NAND, /* Tegra2 NAND controller */
COMPAT_NVIDIA_TEGRA20_PWM, /* Tegra 2 PWM controller */
COMPAT_NVIDIA_TEGRA20_DC, /* Tegra 2 Display controller */
+ COMPAT_NVIDIA_TEGRA30_SDMMC, /* Tegra30 SDMMC controller */
+ COMPAT_NVIDIA_TEGRA20_SDMMC, /* Tegra20 SDMMC controller */
COMPAT_NVIDIA_TEGRA20_SFLASH, /* Tegra 2 SPI flash controller */
COMPAT_NVIDIA_TEGRA20_SLINK, /* Tegra 2 SPI SLINK controller */
COMPAT_SMSC_LAN9215, /* SMSC 10/100 Ethernet LAN9215 */
diff --git a/include/lcd.h b/include/lcd.h
index c24164a..4ac4ddd 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -47,6 +47,7 @@ extern struct vidinfo panel_info;
extern void lcd_ctrl_init (void *lcdbase);
extern void lcd_enable (void);
+extern int board_splash_screen_prepare(void);
/* setcolreg used in 8bpp/16bpp; initcolregs used in monochrome */
extern void lcd_setcolreg (ushort regno,
diff --git a/include/linker_lists.h b/include/linker_lists.h
index 0b405d7..6c28bf9 100644
--- a/include/linker_lists.h
+++ b/include/linker_lists.h
@@ -13,6 +13,96 @@
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*/
+
+/*
+ * There is no use in including this from ASM files, but that happens
+ * anyway, e.g. PPC kgdb.S includes command.h which incluse us.
+ * So just don't define anything when included from ASM.
+ */
+
+#if !defined(__ASSEMBLY__)
+
+/**
+ * A linker list is constructed by grouping together linker input
+ * sections, each containning one entry of the list. Each input section
+ * contains a constant initialized variable which holds the entry's
+ * content. Linker list input sections are constructed from the list
+ * and entry names, plus a prefix which allows grouping all lists
+ * together. Assuming _list and _entry are the list and entry names,
+ * then the corresponding input section name is
+ *
+ * _u_boot_list + _2_ + @_list + _2_ + @_entry
+ *
+ * and the C variable name is
+ *
+ * .u_boot_list_ + 2_ + @_list + _2_ + @_entry
+ *
+ * This ensures uniqueness for both input section and C variable name.
+ *
+ * Note that the names differ only in the first character, "." for the
+ * setion and "_" for the variable, so that the linker cannot confuse
+ * section and symbol names. From now on, both names will be referred
+ * to as
+ *
+ * %u_boot_list_ + 2_ + @_list + _2_ + @_entry
+ *
+ * Entry variables need never be referred to directly.
+ *
+ * The naming scheme for input sections allows grouping all linker lists
+ * into a single linker output section and grouping all entries for a
+ * single list.
+ *
+ * Note the two '_2_' constant components in the names: their presence
+ * allows putting a start and end symbols around a list, by mapping
+ * these symbols to sections names with components "1" (before) and
+ * "3" (after) instead of "2" (within).
+ * Start and end symbols for a list can generally be defined as
+ *
+ * %u_boot_list_2_ + @_list + _1_...
+ * %u_boot_list_2_ + @_list + _3_...
+ *
+ * Start and end symbols for the whole of the linker lists area can be
+ * defined as
+ *
+ * %u_boot_list_1_...
+ * %u_boot_list_3_...
+ *
+ * Here is an example of the sorted sections which result from a list
+ * "array" made up of three entries : "first", "second" and "third",
+ * iterated at least once.
+ *
+ * .u_boot_list_2_array_1
+ * .u_boot_list_2_array_2_first
+ * .u_boot_list_2_array_2_second
+ * .u_boot_list_2_array_2_third
+ * .u_boot_list_2_array_3
+ *
+ * If lists must be divided into sublists (e.g. for iterating only on
+ * part of a list), one can simply give the list a name of the form
+ * 'outer_2_inner', where 'outer' is the global list name and 'inner'
+ * is the sub-list name. Iterators for the whole list should use the
+ * global list name ("outer"); iterators for only a sub-list should use
+ * the full sub-list name ("outer_2_inner").
+ *
+ * Here is an example of the sections generated from a global list
+ * named "drivers", two sub-lists named "i2c" and "pci", and iterators
+ * defined for the whole list and each sub-list:
+ *
+ * %u_boot_list_2_drivers_1
+ * %u_boot_list_2_drivers_2_i2c_1
+ * %u_boot_list_2_drivers_2_i2c_2_first
+ * %u_boot_list_2_drivers_2_i2c_2_first
+ * %u_boot_list_2_drivers_2_i2c_2_second
+ * %u_boot_list_2_drivers_2_i2c_2_third
+ * %u_boot_list_2_drivers_2_i2c_3
+ * %u_boot_list_2_drivers_2_pci_1
+ * %u_boot_list_2_drivers_2_pci_2_first
+ * %u_boot_list_2_drivers_2_pci_2_second
+ * %u_boot_list_2_drivers_2_pci_2_third
+ * %u_boot_list_2_drivers_2_pci_3
+ * %u_boot_list_2_drivers_3
+ */
+
#ifndef __LINKER_LISTS_H__
#define __LINKER_LISTS_H__
@@ -20,43 +110,28 @@
* ll_entry_declare() - Declare linker-generated array entry
* @_type: Data type of the entry
* @_name: Name of the entry
- * @_section_u: Subsection of u_boot_list in which this entry is placed
- * (with underscores instead of dots, for name concatenation)
- * @_section_d: Subsection of u_boot_list in which this entry is placed
- * (with dots, for section concatenation)
+ * @_list: name of the list. Should contain only characters allowed
+ * in a C variable name!
*
* This macro declares a variable that is placed into a linker-generated
* array. This is a basic building block for more advanced use of linker-
* generated arrays. The user is expected to build their own macro wrapper
* around this one.
*
- * A variable declared using this macro must be compile-time initialized
- * and is as such placed into subsection of special section, .u_boot_list.
- * The subsection is specified by the _section_[u,d] parameter, see below.
- * The base name of the variable is _name, yet the actual variable is
- * declared as concatenation of
- *
- * %_u_boot_list_ + @_section_u + _ + @_name
- *
- * which ensures name uniqueness. This variable shall never be refered
- * directly though.
+ * A variable declared using this macro must be compile-time initialized.
*
* Special precaution must be made when using this macro:
- * 1) The _type must not contain the "static" keyword, otherwise the entry
- * is not generated.
*
- * 2) The @_section_u and @_section_d variables must match, the only difference
- * is that in @_section_u is every dot "." character present in @_section_d
- * replaced by a single underscore "_" character in @_section_u. The actual
- * purpose of these parameters is to select proper subsection in the global
- * .u_boot_list section.
+ * 1) The _type must not contain the "static" keyword, otherwise the
+ * entry is generated and can be iterated but is listed in the map
+ * file and cannot be retrieved by name.
*
- * 3) In case a section is declared that contains some array elements AND a
- * subsection of this section is declared and contains some elements, it is
- * imperative that the elements are of the same type.
+ * 2) In case a section is declared that contains some array elements AND
+ * a subsection of this section is declared and contains some elements,
+ * it is imperative that the elements are of the same type.
*
* 4) In case an outer section is declared that contains some array elements
- * AND am inner subsection of this section is declared and contains some
+ * AND an inner subsection of this section is declared and contains some
* elements, then when traversing the outer section, even the elements of
* the inner sections are present in the array.
*
@@ -66,39 +141,71 @@
* .y = 4,
* };
*/
-#define ll_entry_declare(_type, _name, _section_u, _section_d) \
- _type _u_boot_list_##_section_u##_##_name __attribute__(( \
- unused, aligned(4), \
- section(".u_boot_list."#_section_d"."#_name)))
+#define ll_entry_declare(_type, _name, _list) \
+ _type _u_boot_list_2_##_list##_2_##_name __aligned(4) \
+ __attribute__((unused, \
+ section(".u_boot_list_2_"#_list"_2_"#_name)))
+
+/**
+ * We need a 0-byte-size type for iterator symbols, and the compiler
+ * does not allow defining objects of C type 'void'. Using an empty
+ * struct is allowed by the compiler, but causes gcc versions 4.4 and
+ * below to complain about aliasing. Therefore we use the next best
+ * thing: zero-sized arrays, which are both 0-byte-size and exempt from
+ * aliasing warnings.
+ */
/**
* ll_entry_start() - Point to first entry of linker-generated array
* @_type: Data type of the entry
- * @_section_u: Subsection of u_boot_list in which this entry is placed
- * (with underscores instead of dots)
+ * @_list: Name of the list in which this entry is placed
*
* This function returns (_type *) pointer to the very first entry of a
* linker-generated array placed into subsection of .u_boot_list section
- * specified by _section_u argument.
+ * specified by _list argument.
+ *
+ * Since this macro defines an array start symbol, its leftmost index
+ * must be 2 and its rightmost index must be 1.
*
* Example:
* struct my_sub_cmd *msc = ll_entry_start(struct my_sub_cmd, cmd_sub);
*/
-#define ll_entry_start(_type, _section_u) \
- ({ \
- extern _type _u_boot_list_##_section_u##__start; \
- _type *_ll_result = &_u_boot_list_##_section_u##__start;\
- _ll_result; \
- })
+#define ll_entry_start(_type, _list) \
+({ \
+ static char start[0] __aligned(4) __attribute__((unused, \
+ section(".u_boot_list_2_"#_list"_1"))); \
+ (_type *)&start; \
+})
/**
- * ll_entry_count() - Return the number of elements in linker-generated array
+ * ll_entry_end() - Point after last entry of linker-generated array
* @_type: Data type of the entry
- * @_section_u: Subsection of u_boot_list in which this entry is placed
+ * @_list: Name of the list in which this entry is placed
* (with underscores instead of dots)
*
+ * This function returns (_type *) pointer after the very last entry of
+ * a linker-generated array placed into subsection of .u_boot_list
+ * section specified by _list argument.
+ *
+ * Since this macro defines an array end symbol, its leftmost index
+ * must be 2 and its rightmost index must be 3.
+ *
+ * Example:
+ * struct my_sub_cmd *msc = ll_entry_end(struct my_sub_cmd, cmd_sub);
+ */
+#define ll_entry_end(_type, _list) \
+({ \
+ static char end[0] __aligned(4) __attribute__((unused, \
+ section(".u_boot_list_2_"#_list"_3"))); \
+ (_type *)&end; \
+})
+/**
+ * ll_entry_count() - Return the number of elements in linker-generated array
+ * @_type: Data type of the entry
+ * @_list: Name of the list of which the number of elements is computed
+ *
* This function returns the number of elements of a linker-generated array
- * placed into subsection of .u_boot_list section specified by _section_u
+ * placed into subsection of .u_boot_list section specified by _list
* argument. The result is of an unsigned int type.
*
* Example:
@@ -108,23 +215,19 @@
* for (i = 0; i < count; i++, msc++)
* printf("Entry %i, x=%i y=%i\n", i, msc->x, msc->y);
*/
-#define ll_entry_count(_type, _section_u) \
+#define ll_entry_count(_type, _list) \
({ \
- extern _type _u_boot_list_##_section_u##__start; \
- extern _type _u_boot_list_##_section_u##__end; \
- unsigned int _ll_result = \
- &_u_boot_list_##_section_u##__end - \
- &_u_boot_list_##_section_u##__start; \
+ _type *start = ll_entry_start(_type, _list); \
+ _type *end = ll_entry_end(_type, _list); \
+ unsigned int _ll_result = end - start; \
_ll_result; \
})
-
/**
* ll_entry_get() - Retrieve entry from linker-generated array by name
* @_type: Data type of the entry
* @_name: Name of the entry
- * @_section_u: Subsection of u_boot_list in which this entry is placed
- * (with underscores instead of dots)
+ * @_list: Name of the list in which this entry is placed
*
* This function returns a pointer to a particular entry in LG-array
* identified by the subsection of u_boot_list where the entry resides
@@ -138,11 +241,54 @@
* ...
* struct my_sub_cmd *c = ll_entry_get(struct my_sub_cmd, my_sub_cmd, cmd_sub);
*/
-#define ll_entry_get(_type, _name, _section_u) \
+#define ll_entry_get(_type, _name, _list) \
({ \
- extern _type _u_boot_list_##_section_u##_##_name; \
- _type *_ll_result = &_u_boot_list_##_section_u##_##_name;\
+ extern _type _u_boot_list_2_##_list##_2_##_name; \
+ _type *_ll_result = \
+ &_u_boot_list_2_##_list##_2_##_name; \
_ll_result; \
})
+/**
+ * ll_start() - Point to first entry of first linker-generated array
+ * @_type: Data type of the entry
+ *
+ * This function returns (_type *) pointer to the very first entry of
+ * the very first linker-generated array.
+ *
+ * Since this macro defines the start of the linker-generated arrays,
+ * its leftmost index must be 1.
+ *
+ * Example:
+ * struct my_sub_cmd *msc = ll_start(struct my_sub_cmd);
+ */
+#define ll_start(_type) \
+({ \
+ static char start[0] __aligned(4) __attribute__((unused, \
+ section(".u_boot_list_1"))); \
+ (_type *)&start; \
+})
+
+/**
+ * ll_entry_end() - Point after last entry of last linker-generated array
+ * @_type: Data type of the entry
+ *
+ * This function returns (_type *) pointer after the very last entry of
+ * the very last linker-generated array.
+ *
+ * Since this macro defines the end of the linker-generated arrays,
+ * its leftmost index must be 3.
+ *
+ * Example:
+ * struct my_sub_cmd *msc = ll_end(struct my_sub_cmd);
+ */
+#define ll_end(_type) \
+({ \
+ static char end[0] __aligned(4) __attribute__((unused, \
+ section(".u_boot_list_3"))); \
+ (_type *)&end; \
+})
+
+#endif /* __ASSEMBLY__ */
+
#endif /* __LINKER_LISTS_H__ */
diff --git a/include/mmc.h b/include/mmc.h
index a13e2bd..de6d497 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -259,6 +259,7 @@ struct mmc {
void (*set_ios)(struct mmc *mmc);
int (*init)(struct mmc *mmc);
int (*getcd)(struct mmc *mmc);
+ int (*getwp)(struct mmc *mmc);
uint b_max;
};
@@ -274,6 +275,7 @@ int get_mmc_num(void);
int board_mmc_getcd(struct mmc *mmc);
int mmc_switch_part(int dev_num, unsigned int part_num);
int mmc_getcd(struct mmc *mmc);
+int mmc_getwp(struct mmc *mmc);
void spl_mmc_load(void) __noreturn;
#ifdef CONFIG_GENERIC_MMC
diff --git a/include/ns9750_bbus.h b/include/ns9750_bbus.h
deleted file mode 100644
index 9485338..0000000
--- a/include/ns9750_bbus.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/***********************************************************************
- *
- * Copyright (C) 2004 by FS Forth-Systeme GmbH.
- * All rights reserved.
- *
- * $Id: ns9750_bbus.h,v 1.1 2004/02/16 10:37:20 mpietrek Exp $
- * @Author: Markus Pietrek
- * @Descr: Definitions for BBus usage
- * @References: [1] NS9750 Hardware Reference Manual/December 2003 Chap. 10
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- *
- ***********************************************************************/
-
-#ifndef FS_NS9750_BBUS_H
-#define FS_NS9750_BBUS_H
-
-#define NS9750_BBUS_MODULE_BASE (0x90600000)
-
-#define get_bbus_reg_addr(c) \
- ((volatile unsigned int *)(NS9750_BBUS_MODULE_BASE+(unsigned int) (c)))
-
-/* We have support for 50 GPIO pins */
-
-#define get_gpio_cfg_reg_addr(pin) \
- get_bbus_reg_addr( NS9750_BBUS_GPIO_CFG_BASE + (((pin) >> 3) * 4) )
-
-/* To Read/Modify/Write a pin configuration register, use it like
- set_gpio_cfg_reg_val( 12, NS9750_GPIO_CFG_FUNC_GPIO|NS9750_GPIO_CFG_OUTPUT );
- They should be wrapped by cli()/sti() */
-#define set_gpio_cfg_reg_val(pin,cfg) \
- *get_gpio_cfg_reg_addr(pin)=(*get_gpio_cfg_reg_addr((pin)) & \
- ~NS9750_GPIO_CFG_MASK((pin))) |\
- NS9750_GPIO_CFG_VAL((pin),(cfg));
-
-#define NS9750_GPIO_CFG_MASK(pin) (NS9750_GPIO_CFG_VAL(pin, \
- NS9750_GPIO_CFG_MA))
-#define NS9750_GPIO_CFG_VAL(pin,cfg) ((cfg) << (((pin) % 8) * 4))
-
-#define NS9750_GPIO_CFG_MA (0x0F)
-#define NS9750_GPIO_CFG_INPUT (0x00)
-#define NS9750_GPIO_CFG_OUTPUT (0x08)
-#define NS9750_GPIO_CFG_FUNC_GPIO (0x03)
-#define NS9750_GPIO_CFG_FUNC_2 (0x02)
-#define NS9750_GPIO_CFG_FUNC_1 (0x01)
-#define NS9750_GPIO_CFG_FUNC_0 (0x00)
-
-/* the register addresses */
-
-#define NS9750_BBUS_MASTER_RESET (0x00)
-#define NS9750_BBUS_GPIO_CFG_BASE (0x10)
-#define NS9750_BBUS_GPIO_CTRL_BASE (0x30)
-#define NS9750_BBUS_GPIO_STAT_BASE (0x40)
-#define NS9750_BBUS_MONITOR (0x50)
-#define NS9750_BBUS_DMA_INT_STAT (0x60)
-#define NS9750_BBUS_DMA_INT_ENABLE (0x64)
-#define NS9750_BBUS_USB_CFG (0x70)
-#define NS9750_BBUS_ENDIAN_CFG (0x80)
-#define NS9750_BBUS_ARM_WAKE_UP (0x90)
-
-/* register bit fields */
-
-#define NS9750_BBUS_MASTER_RESET_UTIL (0x00000100)
-#define NS9750_BBUS_MASTER_RESET_I2C (0x00000080)
-#define NS9750_BBUS_MASTER_RESET_1284 (0x00000040)
-#define NS9750_BBUS_MASTER_RESET_SER4 (0x00000020)
-#define NS9750_BBUS_MASTER_RESET_SER3 (0x00000010)
-#define NS9750_BBUS_MASTER_RESET_SER2 (0x00000008)
-#define NS9750_BBUS_MASTER_RESET_SER1 (0x00000004)
-#define NS9750_BBUS_MASTER_RESET_USB (0x00000002)
-#define NS9750_BBUS_MASTER_RESET_DMA (0x00000001)
-
-/* BS9750_BBUS_DMA_INT_BINT* are valid for *DMA_INT_STAT and *DMA_INT_ENABLE */
-
-#define NS9750_BBUS_DMA_INT_BINT16 (0x00010000)
-#define NS9750_BBUS_DMA_INT_BINT15 (0x00008000)
-#define NS9750_BBUS_DMA_INT_BINT14 (0x00004000)
-#define NS9750_BBUS_DMA_INT_BINT13 (0x00002000)
-#define NS9750_BBUS_DMA_INT_BINT12 (0x00001000)
-#define NS9750_BBUS_DMA_INT_BINT11 (0x00000800)
-#define NS9750_BBUS_DMA_INT_BINT10 (0x00000400)
-#define NS9750_BBUS_DMA_INT_BINT9 (0x00000200)
-#define NS9750_BBUS_DMA_INT_BINT8 (0x00000100)
-#define NS9750_BBUS_DMA_INT_BINT7 (0x00000080)
-#define NS9750_BBUS_DMA_INT_BINT6 (0x00000040)
-#define NS9750_BBUS_DMA_INT_BINT5 (0x00000020)
-#define NS9750_BBUS_DMA_INT_BINT4 (0x00000010)
-#define NS9750_BBUS_DMA_INT_BINT3 (0x00000008)
-#define NS9750_BBUS_DMA_INT_BINT2 (0x00000004)
-#define NS9750_BBUS_DMA_INT_BINT1 (0x00000002)
-#define NS9750_BBUS_DMA_INT_BINT0 (0x00000001)
-
-#define NS9750_BBUS_USB_CFG_OUTEN (0x00000008)
-#define NS9750_BBUS_USB_CFG_SPEED (0x00000004)
-#define NS9750_BBUS_USB_CFG_CFG_MA (0x00000003)
-#define NS9750_BBUS_USB_CFG_CFG_HOST_SOFT (0x00000003)
-#define NS9750_BBUS_USB_CFG_CFG_DEVICE (0x00000002)
-#define NS9750_BBUS_USB_CFG_CFG_HOST (0x00000001)
-#define NS9750_BBUS_USB_CFG_CFG_DIS (0x00000000)
-
-#define NS9750_BBUS_ENDIAN_CFG_AHBM (0x00001000)
-#define NS9750_BBUS_ENDIAN_CFG_I2C (0x00000080)
-#define NS9750_BBUS_ENDIAN_CFG_IEEE1284 (0x00000040)
-#define NS9750_BBUS_ENDIAN_CFG_SER4 (0x00000020)
-#define NS9750_BBUS_ENDIAN_CFG_SER3 (0x00000010)
-#define NS9750_BBUS_ENDIAN_CFG_SER2 (0x00000008)
-#define NS9750_BBUS_ENDIAN_CFG_SER1 (0x00000004)
-#define NS9750_BBUS_ENDIAN_CFG_USB (0x00000002)
-#define NS9750_BBUS_ENDIAN_CFG_DMA (0x00000001)
-
-#endif /* FS_NS9750_BBUS_H */
diff --git a/include/ns9750_mem.h b/include/ns9750_mem.h
deleted file mode 100644
index 666e412..0000000
--- a/include/ns9750_mem.h
+++ /dev/null
@@ -1,172 +0,0 @@
-/***********************************************************************
- *
- * Copyright (C) 2004 by FS Forth-Systeme GmbH.
- * All rights reserved.
- *
- * $Id: ns9750_mem.h,v 1.1 2004/02/16 10:37:20 mpietrek Exp $
- * @Author: Markus Pietrek
- * @Descr: Definitions for Memory Control Module
- * @References: [1] NS9750 Hardware Reference Manual/December 2003 Chap. 5
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- ***********************************************************************/
-
-#ifndef FS_NS9750_MEM_H
-#define FS_NS9750_SYS_H
-
-#define NS9750_MEM_MODULE_BASE (0xA0700000)
-
-#define get_mem_reg_addr(c) \
- ((volatile unsigned int *)(NS9750_MEM_MODULE_BASE+(unsigned int) (c)))
-
-/* the register addresses */
-
-#define NS9750_MEM_CTRL (0x0000)
-#define NS9750_MEM_STATUS (0x0004)
-#define NS9750_MEM_CFG (0x0008)
-#define NS9750_MEM_DYN_CTRL (0x0020)
-#define NS9750_MEM_DYN_REFRESH (0x0024)
-#define NS9750_MEM_DYN_READ_CFG (0x0028)
-#define NS9750_MEM_DYN_TRP (0x0030)
-#define NS9750_MEM_DYN_TRAS (0x0034)
-#define NS9750_MEM_DYN_TSREX (0x0038)
-#define NS9750_MEM_DYN_TAPR (0x003C)
-#define NS9750_MEM_DYN_TDAL (0x0040)
-#define NS9750_MEM_DYN_TWR (0x0044)
-#define NS9750_MEM_DYN_TRC (0x0048)
-#define NS9750_MEM_DYN_TRFC (0x004C)
-#define NS9750_MEM_DYN_TXSR (0x0050)
-#define NS9750_MEM_DYN_TRRD (0x0054)
-#define NS9750_MEM_DYN_TMRD (0x0058)
-#define NS9750_MEM_STAT_EXT_WAIT (0x0080)
-#define NS9750_MEM_DYN_CFG_BASE (0x0100)
-#define NS9750_MEM_DYN_RAS_CAS_BASE (0x0104)
-#define NS9750_MEM_STAT_CFG_BASE (0x0200)
-#define NS9750_MEM_STAT_WAIT_WEN_BASE (0x0204)
-#define NS9750_MEM_STAT_WAIT_OEN_BASE (0x0208)
-#define NS9750_MEM_STAT_WAIT_RD_BASE (0x020C)
-#define NS9750_MEM_STAT_WAIT_PAGE_BASE (0x0210)
-#define NS9750_MEM_STAT_WAIR_WR_BASE (0x0214)
-#define NS9750_MEM_STAT_WAIT_TURN_BASE (0x0218)
-
-/* the vectored register addresses */
-
-#define NS9750_MEM_DYN_CFG(c) (NS9750_MEM_DYN_CFG_BASE + (c)*0x20)
-#define NS9750_MEM_DYN_RAS_CAS(c) (NS9750_MEM_DYN_RAS_CAS_BASE + (c)*0x20)
-#define NS9750_MEM_STAT_CFG(c) (NS9750_MEM_STAT_CFG_BASE + (c)*0x20)
-#define NS9750_MEM_STAT_WAIT_WEN(c) (NS9750_MEM_STAT_WAIT_WEN_BASE+(c)*0x20)
-#define NS9750_MEM_STAT_WAIT_OEN(c) (NS9750_MEM_STAT_WAIT_OEN_BASE+(c)*0x20)
-#define NS9750_MEM_STAT_RD(c) (NS9750_MEM_STAT_WAIT_RD_BASE+(c)*0x20)
-#define NS9750_MEM_STAT_PAGE(c) (NS9750_MEM_STAT_WAIT_PAGE_BASE+(c)*0x20)
-#define NS9750_MEM_STAT_WR(c) (NS9750_MEM_STAT_WAIT_WR_BASE+(c)*0x20)
-#define NS9750_MEM_STAT_TURN(c) (NS9750_MEM_STAT_WAIT_TURN_BASE+(c)*0x20)
-
-/* register bit fields */
-
-#define NS9750_MEM_CTRL_L (0x00000004)
-#define NS9750_MEM_CTRL_M (0x00000002)
-#define NS9750_MEM_CTRL_E (0x00000001)
-
-#define NS9750_MEM_STAT_SA (0x00000004)
-#define NS9750_MEM_STAT_S (0x00000002)
-#define NS9750_MEM_STAT_B (0x00000001)
-
-#define NS9750_MEM_CFG_CLK (0x00000010)
-#define NS9750_MEM_CFG_N (0x00000001)
-
-#define NS9750_MEM_DYN_CTRL_NRP (0x00004000)
-#define NS9750_MEM_DYN_CTRL_DP (0x00002000)
-#define NS9750_MEM_DYN_CTRL_I_MA (0x00000180)
-#define NS9750_MEM_DYN_CTRL_I_NORMAL (0x00000000)
-#define NS9750_MEM_DYN_CTRL_I_MODE (0x00000080)
-#define NS9750_MEM_DYN_CTRL_I_PALL (0x00000100)
-#define NS9750_MEM_DYN_CTRL_I_NOP (0x00000180)
-#define NS9750_MEM_DYN_CTRL_SR (0x00000002)
-#define NS9750_MEM_DYN_CTRL_CE (0x00000001)
-
-
-#define NS9750_MEM_DYN_REFRESH_MA (0x000007FF)
-
-#define NS9750_MEM_DYN_READ_CFG_MA (0x00000003)
-#define NS9750_MEM_DYN_READ_CFG_DELAY0 (0x00000001)
-#define NS9750_MEM_DYN_READ_CFG_DELAY1 (0x00000002)
-#define NS9750_MEM_DYN_READ_CFG_DELAY2 (0x00000003)
-
-#define NS9750_MEM_DYN_TRP_MA (0x0000000F)
-
-#define NS9750_MEM_DYN_TRAS_MA (0x0000000F)
-
-#define NS9750_MEM_DYN_TSREX_MA (0x0000000F)
-
-#define NS9750_MEM_DYN_TAPR_MA (0x0000000F)
-
-#define NS9750_MEM_DYN_TDAL_MA (0x0000000F)
-
-#define NS9750_MEM_DYN_TWR_MA (0x0000000F)
-
-#define NS9750_MEM_DYN_TRC_MA (0x0000001F)
-
-#define NS9750_MEM_DYN_TRFC_MA (0x0000001F)
-
-#define NS9750_MEM_DYN_TXSR_MA (0x0000001F)
-
-#define NS9750_MEM_DYN_TRRD_MA (0x0000000F)
-
-#define NS9750_MEM_DYN_TMRD_MA (0x0000000F)
-
-#define NS9750_MEM_STAT_EXTW_WAIT_MA (0x0000003F)
-
-#define NS9750_MEM_DYN_CFG_P (0x00100000)
-#define NS9750_MEM_DYN_CFG_BDMC (0x00080000)
-#define NS9750_MEM_DYN_CFG_AM (0x00004000)
-#define NS9750_MEM_DYN_CFG_AM_MA (0x00001F80)
-#define NS9750_MEM_DYN_CFG_MD (0x00000018)
-
-#define NS9750_MEM_DYN_RAS_CAS_CAS_MA (0x00000300)
-#define NS9750_MEM_DYN_RAS_CAS_CAS_1 (0x00000100)
-#define NS9750_MEM_DYN_RAS_CAS_CAS_2 (0x00000200)
-#define NS9750_MEM_DYN_RAS_CAS_CAS_3 (0x00000300)
-#define NS9750_MEM_DYN_RAS_CAS_RAS_MA (0x00000003)
-#define NS9750_MEM_DYN_RAS_CAS_RAS_1 (0x00000001)
-#define NS9750_MEM_DYN_RAS_CAS_RAS_2 (0x00000002)
-#define NS9750_MEM_DYN_RAS_CAS_RAS_3 (0x00000003)
-
-#define NS9750_MEM_STAT_CFG_PSMC (0x00100000)
-#define NS9750_MEM_STAT_CFG_BSMC (0x00080000)
-#define NS9750_MEM_STAT_CFG_EW (0x00000100)
-#define NS9750_MEM_STAT_CFG_PB (0x00000080)
-#define NS9750_MEM_STAT_CFG_PC (0x00000040)
-#define NS9750_MEM_STAT_CFG_PM (0x00000008)
-#define NS9750_MEM_STAT_CFG_MW_MA (0x00000003)
-#define NS9750_MEM_STAT_CFG_MW_8 (0x00000000)
-#define NS9750_MEM_STAT_CFG_MW_16 (0x00000001)
-#define NS9750_MEM_STAT_CFG_MW_32 (0x00000002)
-
-#define NS9750_MEM_STAT_WAIT_WEN_MA (0x0000000F)
-
-#define NS9750_MEM_STAT_WAIT_OEN_MA (0x0000000F)
-
-#define NS9750_MEM_STAT_WAIT_RD_MA (0x0000001F)
-
-#define NS9750_MEM_STAT_WAIT_PAGE_MA (0x0000001F)
-
-#define NS9750_MEM_STAT_WAIT_WR_MA (0x0000001F)
-
-#define NS9750_MEM_STAT_WAIT_TURN_MA (0x0000000F)
-
-
-#endif /* FS_NS9750_MEM_H */
diff --git a/include/ns9750_ser.h b/include/ns9750_ser.h
deleted file mode 100644
index b5c297e..0000000
--- a/include/ns9750_ser.h
+++ /dev/null
@@ -1,202 +0,0 @@
-/***********************************************************************
- *
- * Copyright (C) 2004 by FS Forth-Systeme GmbH.
- * All rights reserved.
- *
- * $Id: ns9750_ser.h,v 1.1 2004/02/16 10:37:20 mpietrek Exp $
- * @Author: Markus Pietrek
- * @References: [1] NS9750 Hardware Reference, December 2003
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- ***********************************************************************/
-
-#ifndef FS_NS9750_SER_H
-#define FS_NS9750_SER_H
-
-#define NS9750_SER_MODULE_BASE (0x90200000)
-
-#define get_ser_reg_addr(c) \
- ((volatile unsigned int *)(NS9750_SER_MODULE_BASE+(unsigned int) (c)))
-
-#define get_ser_reg_addr_channel(reg,chan) \
- get_ser_reg_addr((reg)+(((chan)<2)?0:0x00100000)+(((chan)&1)?0x40:0))
-
-/* the register addresses */
-
-#define NS9750_SER_CTRL_A (0x00)
-#define NS9750_SER_CTRL_B (0x04)
-#define NS9750_SER_STAT_A (0x08)
-#define NS9750_SER_BITRATE (0x0C)
-#define NS9750_SER_FIFO (0x10)
-#define NS9750_SER_RX_BUF_TIMER (0x14)
-#define NS9750_SER_RX_CHAR_TIMER (0x18)
-#define NS9750_SER_RX_MATCH (0x1C)
-#define NS9750_SER_RX_MATCH_MASK (0x20)
-#define NS9750_SER_FLOW_CTRL (0x34)
-#define NS9750_SER_FLOW_CTRL_FORCE (0x38)
-
-/* register bit fields */
-
-/* control A register */
-
-#define NS9750_SER_CTRL_A_CE (0x80000000)
-#define NS9750_SER_CTRL_A_BRK (0x40000000)
-#define NS9750_SER_CTRL_A_STICKP (0x20000000)
-#define NS9750_SER_CTRL_A_EPS (0x10000000)
-#define NS9750_SER_CTRL_A_PE (0x08000000)
-#define NS9750_SER_CTRL_A_STOP (0x04000000)
-#define NS9750_SER_CTRL_A_WLS_MA (0x03000000)
-#define NS9750_SER_CTRL_A_WLS_5 (0x00000000)
-#define NS9750_SER_CTRL_A_WLS_6 (0x01000000)
-#define NS9750_SER_CTRL_A_WLS_7 (0x02000000)
-#define NS9750_SER_CTRL_A_WLS_8 (0x03000000)
-#define NS9750_SER_CTRL_A_CTSTX (0x00800000)
-#define NS9750_SER_CTRL_A_RTSRX (0x00400000)
-#define NS9750_SER_CTRL_A_RL (0x00200000)
-#define NS9750_SER_CTRL_A_LL (0x00100000)
-#define NS9750_SER_CTRL_A_RES (0x000CF000)
-#define NS9750_SER_CTRL_A_DTR (0x00020000)
-#define NS9750_SER_CTRL_A_RTS (0x00010000)
-#define NS9750_SER_CTRL_A_RIE_MA (0x00000E00)
-#define NS9750_SER_CTRL_A_ERXDMA (0x00000100)
-#define NS9750_SER_CTRL_A_RIC_MA (0x000000E0)
-#define NS9750_SER_CTRL_A_TIC_MA (0x0000001E)
-#define NS9750_SER_CTRL_A_ETXDMA (0x00000001)
-
-/* control B register */
-
-#define NS9750_SER_CTRL_B_RDM1 (0x80000000)
-#define NS9750_SER_CTRL_B_RDM2 (0x40000000)
-#define NS9750_SER_CTRL_B_RDM3 (0x20000000)
-#define NS9750_SER_CTRL_B_RDM4 (0x10000000)
-#define NS9750_SER_CTRL_B_RBGT (0x08000000)
-#define NS9750_SER_CTRL_B_RCGT (0x04000000)
-#define NS9750_SER_CTRL_B_MODE_MA (0x00300000)
-#define NS9750_SER_CTRL_B_MODE_UART (0x00000000)
-#define NS9750_SER_CTRL_B_MODE_HDLC (0x00100000)
-#define NS9750_SER_CTRL_B_MODE_SPI_M (0x00200000)
-#define NS9750_SER_CTRL_B_MODE_SPI_S (0x00300000)
-#define NS9750_SER_CTRL_B_BITORDR (0x00080000)
-#define NS9750_SER_CTRL_B_RES (0x0007703F)
-#define NS9750_SER_CTRL_B_RTSTX (0x00008000)
-#define NS9750_SER_CTRL_B_ENDEC_MA (0x00000FC0)
-
-/* status A register */
-
-#define NS9750_SER_STAT_A_MATCH1 (0x80000000)
-#define NS9750_SER_STAT_A_MATCH2 (0x40000000)
-#define NS9750_SER_STAT_A_MATCH3 (0x20000000)
-#define NS9750_SER_STAT_A_MATCH4 (0x10000000)
-#define NS9750_SER_STAT_A_BGAP (0x08000000)
-#define NS9750_SER_STAT_A_CGAP (0x04000000)
-#define NS9750_SER_STAT_A_RXFDB_MA (0x00300000)
-#define NS9750_SER_STAT_A_RXFDB_FULL (0x00000000)
-#define NS9750_SER_STAT_A_RXFDB_1 (0x00100000)
-#define NS9750_SER_STAT_A_RXFDB_2 (0x00200000)
-#define NS9750_SER_STAT_A_RXFDB_3 (0x00300000)
-#define NS9750_SER_STAT_A_DCD (0x00080000)
-#define NS9750_SER_STAT_A_RI (0x00040000)
-#define NS9750_SER_STAT_A_DSR (0x00020000)
-#define NS9750_SER_STAT_A_CTS (0x00010000)
-#define NS9750_SER_STAT_A_RBRK (0x00008000)
-#define NS9750_SER_STAT_A_RFE (0x00004000)
-#define NS9750_SER_STAT_A_RPE (0x00002000)
-#define NS9750_SER_STAT_A_ROVER (0x00001000)
-#define NS9750_SER_STAT_A_RRDY (0x00000800)
-#define NS9750_SER_STAT_A_RHALF (0x00000400)
-#define NS9750_SER_STAT_A_RBC (0x00000200)
-#define NS9750_SER_STAT_A_RFULL (0x00000100)
-#define NS9750_SER_STAT_A_DCDI (0x00000080)
-#define NS9750_SER_STAT_A_RII (0x00000040)
-#define NS9750_SER_STAT_A_DSRI (0x00000020)
-#define NS9750_SER_STAT_A_CTSI (0x00000010)
-#define NS9750_SER_STAT_A_TRDY (0x00000008)
-#define NS9750_SER_STAT_A_THALF (0x00000004)
-#define NS9750_SER_STAT_A_TBC (0x00000002)
-#define NS9750_SER_STAT_A_TEMPTY (0x00000001)
-
-#define NS9750_SER_STAT_A_RX_COND_ERR ( NS9750_SER_STAT_A_RFE | \
- NS9750_SER_STAT_A_ROVER | \
- NS9750_SER_STAT_A_RPE )
-#define NS9750_SER_STAT_A_RX_COND_ALL ( NS9750_SER_STAT_A_RX_COND_ERR | \
- NS9750_SER_STAT_A_RBRK | \
- NS9750_SER_STAT_A_RRDY | \
- NS9750_SER_STAT_A_RHALF | \
- NS9750_SER_STAT_A_RBC | \
- NS9750_SER_STAT_A_DCDI | \
- NS9750_SER_STAT_A_RII | \
- NS9750_SER_STAT_A_DSRI | \
- NS9750_SER_STAT_A_CTSI )
-#define NS9750_SER_STAT_A_TX_COND_ALL ( NS9750_SER_STAT_A_TRDY | \
- NS9750_SER_STAT_A_THALF | \
- NS9750_SER_STAT_A_TBC | \
- NS9750_SER_STAT_A_TEMPTY )
-/* bit rate register */
-
-#define NS9750_SER_BITRATE_EBIT (0x80000000)
-#define NS9750_SER_BITRATE_TMODE (0x40000000)
-#define NS9750_SER_BITRATE_RXSRC (0x20000000)
-#define NS9750_SER_BITRATE_TXSRC (0x10000000)
-#define NS9750_SER_BITRATE_RXEXT (0x08000000)
-#define NS9750_SER_BITRATE_TXEXT (0x04000000)
-#define NS9750_SER_BITRATE_CLKMUX_MA (0x03000000)
-#define NS9750_SER_BITRATE_CLKMUX_XTAL (0x00000000)
-#define NS9750_SER_BITRATE_CLKMUX_BCLK (0x01000000)
-#define NS9750_SER_BITRATE_CLKMUX_OUT1 (0x02000000)
-#define NS9750_SER_BITRATE_CLKMUX_OUT2 (0x03000000)
-#define NS9750_SER_BITRATE_TXCINV (0x00800000)
-#define NS9750_SER_BITRATE_RXCINV (0x00400000)
-#define NS9750_SER_BITRATE_TCDR_MA (0x00180000)
-#define NS9750_SER_BITRATE_TCDR_1 (0x00000000)
-#define NS9750_SER_BITRATE_TCDR_8 (0x00080000)
-#define NS9750_SER_BITRATE_TCDR_16 (0x00100000)
-#define NS9750_SER_BITRATE_TCDR_32 (0x00180000)
-#define NS9750_SER_BITRATE_RCDR_MA (0x00070000)
-#define NS9750_SER_BITRATE_RCDR_1 (0x00000000)
-#define NS9750_SER_BITRATE_RCDR_8 (0x00020000)
-#define NS9750_SER_BITRATE_RCDR_16 (0x00040000)
-#define NS9750_SER_BITRATE_RCDR_32 (0x00060000)
-#define NS9750_SER_BITRATE_TICS (0x00010000)
-#define NS9750_SER_BITRATE_RICS (0x00008000)
-#define NS9750_SER_BITRATE_N_MA (0x00007FFF)
-
-/* receive buffer gap timer */
-
-#define NS9750_SER_RX_BUF_TIMER_TRUN (0x80000000) /* UART and SPI */
-#define NS9750_SER_RX_BUF_TIMER_BT_MA (0x0000FFFF) /* UART and SPI */
-#define NS9750_SER_RX_BUF_TIMER_MAXLEN_MA (0x0000FFFF) /* HDLC only */
-
-/* receive character gap timer */
-
-#define NS9750_SER_RX_CHAR_TIMER_TRUN (0x80000000)
-#define NS9750_SER_RX_CHAR_TIMER_CT_MA (0x000FFFFF)
-
-/* receive match */
-
-#define NS9750_SER_RX_MATCH_RDMB1_MA (0xFF000000)
-#define NS9750_SER_RX_MATCH_RDMB2_MA (0x00FF0000)
-#define NS9750_SER_RX_MATCH_RDMB3_MA (0x0000FF00)
-#define NS9750_SER_RX_MATCH_RDMB4_MA (0x000000FF)
-
-/* receive match mask */
-
-#define NS9750_SER_RX_MATCH_MASK_RDMB1_MA (0xFF000000)
-#define NS9750_SER_RX_MATCH_MASK_RDMB2_MA (0x00FF0000)
-#define NS9750_SER_RX_MATCH_MASK_RDMB3_MA (0x0000FF00)
-#define NS9750_SER_RX_MATCH_MASK_RDMB4_MA (0x000000FF)
-
-#endif /* FS_NS9750_SER_H */
diff --git a/include/ns9750_sys.h b/include/ns9750_sys.h
deleted file mode 100644
index f1dc2b2..0000000
--- a/include/ns9750_sys.h
+++ /dev/null
@@ -1,215 +0,0 @@
-/***********************************************************************
- *
- * Copyright (C) 2004 by FS Forth-Systeme GmbH.
- * All rights reserved.
- *
- * $Id: ns9750_sys.h,v 1.1 2004/02/16 10:37:20 mpietrek Exp $
- * @Author: Markus Pietrek
- * @Descr: Definitions for SYS Control Module
- * @References: [1] NS9750 Hardware Reference Manual/December 2003 Chap. 4
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- ***********************************************************************/
-
-#ifndef FS_NS9750_SYS_H
-#define FS_NS9750_SYS_H
-
-#define NS9750_SYS_MODULE_BASE (0xA0900000)
-
-#define get_sys_reg_addr(c) \
- ((volatile unsigned int *)(NS9750_SYS_MODULE_BASE+(unsigned int) (c)))
-
-/* the register addresses */
-
-#define NS9750_SYS_AHB_GEN (0x0000)
-#define NS9750_SYS_BRC_BASE (0x0004)
-#define NS9750_SYS_AHB_TIMEOUT (0x0014)
-#define NS9750_SYS_AHB_ERROR1 (0x0018)
-#define NS9750_SYS_AHB_ERROR2 (0x001C)
-#define NS9750_SYS_AHB_MON (0x0020)
-#define NS9750_SYS_TIMER_COUNT_BASE (0x0044)
-#define NS9750_SYS_TIMER_READ_BASE (0x0084)
-#define NS9750_SYS_INT_VEC_ADR_BASE (0x00C4)
-#define NS9750_SYS_INT_CFG_BASE (0x0144)
-#define NS9750_SYS_ISRADDR (0x0164)
-#define NS9750_SYS_INT_STAT_ACTIVE (0x0168)
-#define NS9750_SYS_INT_STAT_RAW (0x016C)
-#define NS9750_SYS_TIMER_INT_STAT (0x0170)
-#define NS9750_SYS_SW_WDOG_CFG (0x0174)
-#define NS9750_SYS_SW_WDOG_TIMER (0x0178)
-#define NS9750_SYS_CLOCK (0x017C)
-#define NS9750_SYS_RESET (0x0180)
-#define NS9750_SYS_MISC (0x0184)
-#define NS9750_SYS_PLL (0x0188)
-#define NS9750_SYS_ACT_INT_STAT (0x018C)
-#define NS9750_SYS_TIMER_CTRL_BASE (0x0190)
-#define NS9750_SYS_CS_DYN_BASE_BASE (0x01D0)
-#define NS9750_SYS_CS_DYN_MASK_BASE (0x01D4)
-#define NS9750_SYS_CS_STATIC_BASE_BASE (0x01F0)
-#define NS9750_SYS_CS_STATIC_MASK_BASE (0x01F4)
-#define NS9750_SYS_GEN_ID (0x0210)
-#define NS9750_SYS_EXT_INT_CTRL_BASE (0x0214)
-
-/* the vectored register addresses */
-
-#define NS9750_SYS_TIMER_COUNT(c) (NS9750_SYS_TIMER_COUNT_BASE + (c))
-#define NS9750_SYS_TIMER_READ(c) (NS9750_SYS_TIMER_READ_BASE + (c))
-#define NS9750_SYS_INT_VEC_ADR(c) (NS9750_SYS_INT_VEC_ADR_BASE + (c))
-#define NS9750_SYS_TIMER_CTRL(c) (NS9750_SYS_TIMER_CTRL_BASE + (c))
-/* CS_DYN start with 4 */
-#define NS9750_SYS_CS_DYN_BASE(c) (NS9750_SYS_CS_DYN_BASE_BASE + ((c)-4)*2)
-#define NS9750_SYS_CS_DYN_MASK(c) (NS9750_SYS_CS_DYN_MASK_BASE + ((c)-4)*2)
-/* CS_STATIC start with 0 */
-#define NS9750_SYS_CS_STATIC_BASE(c) (NS9750_SYS_CS_STATIC_BASE_BASE + (c)*2)
-#define NS9750_SYS_CS_STATIC_MASK(c) (NS9750_SYS_CS_STATIC_MASK_BASE + (c)*2)
-#define NS9750_SYS_EXT_INT_CTRL(c) (NS9750_SYS_EXT_INT_CTRL + (c))
-
-/* register bit fields */
-
-#define NS9750_SYS_AHB_GEN_EXMAM (0x00000001)
-
-/* need to be n*8bit to BRC channel */
-#define NS9750_SYS_BRC_CEB (0x00000080)
-#define NS9750_SYS_BRC_BRF_MA (0x00000030)
-#define NS9750_SYS_BRC_BRF_100 (0x00000000)
-#define NS9750_SYS_BRC_BRF_75 (0x00000010)
-#define NS9750_SYS_BRC_BRF_50 (0x00000020)
-#define NS9750_SYS_BRC_BRF_25 (0x00000030)
-
-#define NS9750_SYS_AHB_TIMEOUT_BAT_MA (0xFFFF0000)
-#define NS9750_SYS_AHB_TIMEOUT_BMT_MA (0x0000FFFF)
-
-#define NS9750_SYS_AHB_ERROR2_ABL (0x00040000)
-#define NS9750_SYS_AHB_ERROR2_AER (0x00020000)
-#define NS9750_SYS_AHB_ERROR2_ABM (0x00010000)
-#define NS9750_SYS_AHB_ERROR2_ABA (0x00008000)
-#define NS9750_SYS_AHB_ERROR2_HWRT (0x00004000)
-#define NS9750_SYS_AHB_ERROR2_HMID_MA (0x00003C00)
-#define NS9750_SYS_AHB_ERROR2_HTPC_MA (0x000003C0)
-#define NS9750_SYS_AHB_ERROR2_HSZ_MA (0x00000038)
-#define NS9750_SYS_AHB_ERROR2_RR_MA (0x00000007)
-
-#define NS9750_SYS_AHB_MON_EIC (0x00800000)
-#define NS9750_SYS_AHB_MON_MBII (0x00400000)
-#define NS9750_SYS_AHB_MON_MBL_MA (0x003FFFC0)
-#define NS9750_SYS_AHB_MON_MBLDC (0x00000020)
-#define NS9750_SYS_AHB_MON_SERDC (0x00000010)
-#define NS9750_SYS_AHB_MON_BMTC_MA (0x0000000C)
-#define NS9750_SYS_AHB_MON_BMTC_RECORD (0x00000000)
-#define NS9750_SYS_AHB_MON_BMTC_GEN_IRQ (0x00000004)
-#define NS9750_SYS_AHB_MON_BMTC_GEN_RES (0x00000008)
-#define NS9750_SYS_AHB_MON_BATC_MA (0x00000003)
-#define NS9750_SYS_AHB_MON_BATC_RECORD (0x00000000)
-#define NS9750_SYS_AHB_MON_BATC_GEN_IRQ (0x00000001)
-#define NS9750_SYS_AHB_MON_BATC_GEN_RES (0x00000002)
-
-/* need to be n*8bit to Int Level */
-
-#define NS9750_SYS_INT_CFG_IE (0x00000080)
-#define NS9750_SYS_INT_CFG_IT (0x00000020)
-#define NS9750_SYS_INT_CFG_IAD_MA (0x0000001F)
-
-#define NS9750_SYS_TIMER_INT_STAT_MA (0x0000FFFF)
-
-#define NS9750_SYS_SW_WDOG_CFG_SWWE (0x00000080)
-#define NS9750_SYS_SW_WDOG_CFG_SWWI (0x00000020)
-#define NS9750_SYS_SW_WDOG_CFG_SWWIC (0x00000010)
-#define NS9750_SYS_SW_WDOG_CFG_SWTCS_MA (0x00000007)
-#define NS9750_SYS_SW_WDOG_CFG_SWTCS_2 (0x00000000)
-#define NS9750_SYS_SW_WDOG_CFG_SWTCS_4 (0x00000001)
-#define NS9750_SYS_SW_WDOG_CFG_SWTCS_8 (0x00000002)
-#define NS9750_SYS_SW_WDOG_CFG_SWTCS_16 (0x00000003)
-#define NS9750_SYS_SW_WDOG_CFG_SWTCS_32 (0x00000004)
-#define NS9750_SYS_SW_WDOG_CFG_SWTCS_64 (0x00000005)
-
-#define NS9750_SYS_CLOCK_LPCS_MA (0x00000380)
-#define NS9750_SYS_CLOCK_LPCS_1 (0x00000000)
-#define NS9750_SYS_CLOCK_LPCS_2 (0x00000080)
-#define NS9750_SYS_CLOCK_LPCS_4 (0x00000100)
-#define NS9750_SYS_CLOCK_LPCS_8 (0x00000180)
-#define NS9750_SYS_CLOCK_LPCS_EXT (0x00000200)
-#define NS9750_SYS_CLOCK_BBC (0x00000040)
-#define NS9750_SYS_CLOCK_LCC (0x00000020)
-#define NS9750_SYS_CLOCK_MCC (0x00000010)
-#define NS9750_SYS_CLOCK_PARBC (0x00000008)
-#define NS9750_SYS_CLOCK_PC (0x00000004)
-#define NS9750_SYS_CLOCK_MACC (0x00000001)
-
-#define NS9750_SYS_RESET_SR (0x80000000)
-#define NS9750_SYS_RESET_I2CW (0x00100000)
-#define NS9750_SYS_RESET_CSE (0x00080000)
-#define NS9750_SYS_RESET_SMWE (0x00040000)
-#define NS9750_SYS_RESET_EWE (0x00020000)
-#define NS9750_SYS_RESET_PI3WE (0x00010000)
-#define NS9750_SYS_RESET_BBT (0x00000040)
-#define NS9750_SYS_RESET_LCDC (0x00000020)
-#define NS9750_SYS_RESET_MEMC (0x00000010)
-#define NS9750_SYS_RESET_PCIAR (0x00000008)
-#define NS9750_SYS_RESET_PCIM (0x00000004)
-#define NS9750_SYS_RESET_MACM (0x00000001)
-
-#define NS9750_SYS_MISC_REV_MA (0xFF000000)
-#define NS9750_SYS_MISC_PCIA (0x00002000)
-#define NS9750_SYS_MISC_VDIS (0x00001000)
-#define NS9750_SYS_MISC_BMM (0x00000800)
-#define NS9750_SYS_MISC_CS1DB (0x00000400)
-#define NS9750_SYS_MISC_CS1DW_MA (0x00000300)
-#define NS9750_SYS_MISC_MCCM (0x00000080)
-#define NS9750_SYS_MISC_PMSS (0x00000040)
-#define NS9750_SYS_MISC_CS1P (0x00000020)
-#define NS9750_SYS_MISC_ENDM (0x00000008)
-#define NS9750_SYS_MISC_MBAR (0x00000004)
-#define NS9750_SYS_MISC_IRAM0 (0x00000001)
-
-#define NS9750_SYS_PLL_PLLBS (0x02000000)
-#define NS9750_SYS_PLL_PLLFS_MA (0x01800000)
-#define NS9750_SYS_PLL_PLLIS_MA (0x00600000)
-#define NS9750_SYS_PLL_PLLND_MA (0x001F0000)
-#define NS9750_SYS_PLL_PLLSW (0x00008000)
-#define NS9750_SYS_PLL_PLLBSSW (0x00000200)
-#define NS9750_SYS_PLL_FSEL_MA (0x00000180)
-#define NS9750_SYS_PLL_CPCC_MA (0x00000060)
-#define NS9750_SYS_PLL_NDSW_MA (0x0000001F)
-
-#define NS9750_SYS_ACT_INT_STAT_MA (0x0000FFFF)
-
-#define NS9750_SYS_TIMER_CTRL_TEN (0x00008000)
-#define NS9750_SYS_TIMER_CTRL_INTC (0x00000200)
-#define NS9750_SYS_TIMER_CTRL_TLCS_MA (0x000001C0)
-#define NS9750_SYS_TIMER_CTRL_TLCS_1 (0x00000000)
-#define NS9750_SYS_TIMER_CTRL_TLCS_2 (0x00000040)
-#define NS9750_SYS_TIMER_CTRL_TLCS_4 (0x00000080)
-#define NS9750_SYS_TIMER_CTRL_TLCS_8 (0x000000C0)
-#define NS9750_SYS_TIMER_CTRL_TLCS_16 (0x00000100)
-#define NS9750_SYS_TIMER_CTRL_TLCS_32 (0x00000140)
-#define NS9750_SYS_TIMER_CTRL_TLCS_64 (0x00000180)
-#define NS9750_SYS_TIMER_CTRL_TLCS_EXT (0x000001C0)
-#define NS9750_SYS_TIMER_CTRL_TM_MA (0x00000030)
-#define NS9750_SYS_TIMER_CTRL_TM_INT (0x00000000)
-#define NS9750_SYS_TIMER_CTRL_TM_LOW (0x00000010)
-#define NS9750_SYS_TIMER_CTRL_TM_HIGH (0x00000020)
-#define NS9750_SYS_TIMER_CTRL_INTS (0x00000008)
-#define NS9750_SYS_TIMER_CTRL_UDS (0x00000004)
-#define NS9750_SYS_TIMER_CTRL_TSZ (0x00000002)
-#define NS9750_SYS_TIMER_CTRL_REN (0x00000001)
-
-#define NS9750_SYS_EXT_INT_CTRL_STS (0x00000008)
-#define NS9750_SYS_EXT_INT_CTRL_CLR (0x00000004)
-#define NS9750_SYS_EXT_INT_CTRL_PLTY (0x00000002)
-#define NS9750_SYS_EXT_INT_CTRL_LVEDG (0x00000001)
-
-#endif /* FS_NS9750_SYS_H */
diff --git a/include/spl.h b/include/spl.h
index b02f36f..b40be80 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -59,6 +59,9 @@ void spl_display_print(void);
/* NAND SPL functions */
void spl_nand_load_image(void);
+/* OneNAND SPL functions */
+void spl_onenand_load_image(void);
+
/* NOR SPL functions */
void spl_nor_load_image(void);