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Diffstat (limited to 'post/cpu/ppc4xx/cache.c')
-rw-r--r--post/cpu/ppc4xx/cache.c45
1 files changed, 23 insertions, 22 deletions
diff --git a/post/cpu/ppc4xx/cache.c b/post/cpu/ppc4xx/cache.c
index 109ca1f..c86a150 100644
--- a/post/cpu/ppc4xx/cache.c
+++ b/post/cpu/ppc4xx/cache.c
@@ -51,8 +51,6 @@ int cache_post_test4 (int tlb, void *p, int size);
int cache_post_test5 (int tlb, void *p, int size);
int cache_post_test6 (int tlb, void *p, int size);
-static int tlb = -1; /* index to the victim TLB entry */
-
#ifdef CONFIG_440
static unsigned char testarea[CACHE_POST_SIZE]
__attribute__((__aligned__(CACHE_POST_SIZE)));
@@ -60,9 +58,10 @@ __attribute__((__aligned__(CACHE_POST_SIZE)));
int cache_post_test (int flags)
{
- void* virt = (void*)CFG_POST_CACHE_ADDR;
+ void *virt = (void *)CFG_POST_CACHE_ADDR;
int ints;
int res = 0;
+ int tlb = -1; /* index to the victim TLB entry */
/*
* All 44x variants deal with cache management differently
@@ -73,25 +72,23 @@ int cache_post_test (int flags)
#ifdef CONFIG_440
int word0, i;
- if (tlb < 0) {
- /*
- * Allocate a new TLB entry, since we are going to modify
- * the write-through and caching inhibited storage attributes.
- */
- program_tlb((u32)testarea, (u32)virt,
- CACHE_POST_SIZE, TLB_WORD2_I_ENABLE);
-
- /* Find the TLB entry */
- for (i = 0;; i++) {
- if (i >= PPC4XX_TLB_SIZE) {
- printf ("Failed to program tlb entry\n");
- return -1;
- }
- word0 = mftlb1(i);
- if (TLB_WORD0_EPN_DECODE(word0) == (u32)virt) {
- tlb = i;
- break;
- }
+ /*
+ * Allocate a new TLB entry, since we are going to modify
+ * the write-through and caching inhibited storage attributes.
+ */
+ program_tlb((u32)testarea, (u32)virt, CACHE_POST_SIZE,
+ TLB_WORD2_I_ENABLE);
+
+ /* Find the TLB entry */
+ for (i = 0;; i++) {
+ if (i >= PPC4XX_TLB_SIZE) {
+ printf ("Failed to program tlb entry\n");
+ return -1;
+ }
+ word0 = mftlb1(i);
+ if (TLB_WORD0_EPN_DECODE(word0) == (u32)virt) {
+ tlb = i;
+ break;
}
}
#endif
@@ -119,6 +116,10 @@ int cache_post_test (int flags)
if (ints)
enable_interrupts ();
+#ifdef CONFIG_440
+ remove_tlb((u32)virt, CACHE_POST_SIZE);
+#endif
+
return res;
}