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2016-01-22rockchip: spi: Remember the last speed to avoid re-setting itSimon Glass
Rather than changing the clock to the same value on every transaction, remember the last value and don't adjust the clock unless it is necessary. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: reset: Use the rk_clr/setreg() interfaceSimon Glass
Use this function in preference to the macro. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: sdram: Use the rk_clr/setreg() interfaceSimon Glass
Use this function in preference to the macro. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22dm: clk: Add a simple version of clk_get_by_index()Simon Glass
This function adds quite a bit of code to SPL and we probably don't need all the features in SPL. Add a simple version (for SPL only) to save space. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22dm: power: Allow regulators to not implement all operationsSimon Glass
Some regulators will not implement any operations (e.g. fixed regulators). This is not an error, so allow the autoset process to continue when one of these regulators is found. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22dm: power: Tidy up debugging output and return valuesSimon Glass
The currect PMIC debugging is a little confusing. Adjust it so that it is clear whether the operation succeeded or failed. Also, avoid creating a new error return value when a perfectly good one is already available. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22dm: core: Export uclass_find_device_by_of_offset()Simon Glass
It is sometimes useful to be able to find a device before probing it, perhaps to set up some platform data for it. Allow finding by of_offset also. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22dm: pinctrl: Add a way for a GPIO driver to obtain a pin functionSimon Glass
GPIO drivers want to be able to show if a pin is enabled for input, output, or is being used by another function. Some drivers can easily find this and the code is included in the driver. For some SoCs this is more complex. Conceptually this should be handled by pinctrl rather than GPIO. Most pinctrl drivers will have this feature anyway. Add a method by which a GPIO driver can obtain the pin mux value given a GPIO reference. This avoids repeating the code in two places. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22dm: power: Allow regulators to be omitted from SPLSimon Glass
For some boards the pmic interface is useful but the regulator interface (which comes with it) is too large. Allow them to be separated such that SPL can decide which it needs. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22spi: Correct device tree usage in spi_flash_decode_fdt()Simon Glass
This function currently searches the entire device tree for a node that it thinks is relevant. But the node is known and is passed in. Correct the code and enable it only with driver model, since only driver-model boards will use it. This avoids bringing in a large number of strings from fdtdec. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22dm: i2c: Allow muxes to be enabled for SPL separatelySimon Glass
Since I2C muxes are seldom needed in SPL, and the code for this increases the size somewhat, add a separate option to enable I2C muxes for SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22cros_ec: Disable the Chrome OS EC in SPLSimon Glass
This is not used in SPL so don't allow it to be built there, even if I2C is enabled in SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22gpio: Allow 's' as an abbreviation for 'status'Simon Glass
The 'gpio' command allows abbreviations for most subcommands. Allow them for 'status' also. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: jerry: Drop unused optionsSimon Glass
To reduce the SPL image size, drop the LED features. Jerry does not have an LED and we can leave out GPIO support also. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: Disable simple-bus in SPL for firefly-rk3288, jerrySimon Glass
This is not needed for booting, so drop it from SPL to save about 300 bytes. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: jerry: Enable the RK808 PMIC and regulatorSimon Glass
Enable this PMIC and regulator, which is used on jerry. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: Move firefly and jerry to use the full pinctrlSimon Glass
Use the full pinctrl driver in U-Boot proper. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: pinctrl: Add a full pinctrl driverSimon Glass
We can make use of the device tree to configure pinctrl settings. Add this support for the driver so we can use it in U-Boot proper. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: mmc: Update the driver to use the new clock IDSimon Glass
We can use the new clk_get_by_index() function to get the correct clock. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: spi: Avoid setting the pinctrl twiceSimon Glass
If full pinctrl is enabled we don't need to manually set the pinctrl in the driver. It will happen automatically. Adjust the code to suit - we will still use manual mode in SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: spi: Update the driver to use the new clock IDSimon Glass
We can use the new clk_get_by_index() function to get the correct clock. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: i2c: Update the driver to use the new clock IDSimon Glass
We can use the new clk_get_by_index() function to get the correct clock. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: clock: Add a function to find a clock by IDSimon Glass
The current approach of using uclass_get_device() is error-prone. Another clock (for example a fixed-clock) may cause it to break. Add a function that does a proper search. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: clk: Add a function to get a peripheral clock rateSimon Glass
It is useful to be able to read the rate of a peripheral clock. Add a handler for that. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: clock: Rename the general clock variable to gclk_rateSimon Glass
The current name is confusing and a bit verbose. Rename it. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: Use a separate clock ID for clocksSimon Glass
At present we use the same peripheral ID for clocks and pinctrl. While this works it is probably better to use the device tree clock binding ID for clocks. We can use the clk_get_by_index() function to find this. Update the clock drivers and the code that uses them. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: jerry: Disable pmic-int-1 setup to avoid a hangSimon Glass
This hangs when activated (by probing the PMIC). Disable it for now until we understand the root cause. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: Use pwrseq for MMC start-up on jerrySimon Glass
This is defined in the device tree in Linux. Copy over the settings so that this can be used instead of hard-coding the reset line. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: Correct the defconfig orderSimon Glass
This has got out of sequence somehow. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: mmc: Use a pwrseq device if availableSimon Glass
Use the pwrseq uclass to find a suitable power sequence for the MMC device. If this is enabled in the device tree, we will pick it up automatically. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: Convert the PMU IOMUX registers into an arraySimon Glass
This is easier to deal with when using generic code since it allows us to use a register index instead of naming each register. Adjust it, adding an enum to improve readability. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: Avoid using MMC code when not booting from MMCSimon Glass
This saves some code space in SPL which is useful on jerry. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22dm: Add a power sequencing uclassSimon Glass
Some devices need special sequences to be used when starting up. Add a uclass for this. Drivers can be added to provide specific features as needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22power: Add support for RK808 regulatorsSimon Glass
Add regulator support for the RK808 PMIC. It integrated 4 BUCKs and 8 LDOs all of which are supported by this driver. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22power: Add base support for the RK808 PMICSimon Glass
This Rockchip PMIC provides features suitable for battery-powered applications. It is commonly used with Rockchip SoCs. Add a driver which provides register access. The regulator driver will use this. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22dts: Bring in pinctrl device tree bindingSimon Glass
Add this binding file since we now use it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22dm: pmic: Add 'reg status' to show all regulatorsSimon Glass
It is convenient to be able to see the status of all regulators in a list. Add this feature to the 'reg status' command. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22dm: pinctrl: Add a function to parse PIN_CONFIG flagsSimon Glass
Add a function which produces a flags word from a few common PIN_CONFIG settings. This is useful for simple pinctrl drivers that don't need to worry about drive strength, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22dm: core: Don't set pinctrl for pinctrl devicesSimon Glass
There is sort-of race condition when a pinctrl device is probed. The pinctrl function is called which may end up using the same device as is being probed. This results in operations being used before the device is actually probed. For now, disallow pinctrl operations on pinctrl devices while probing. An alternative solution would be to move the operation to later in the device_probe() function (for pinctrl devices only) but this needs more thought. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: kylin: Store env in emmcJeffy Chen
There's a 64K reserved area at the end of the first 4M. Store env there, so we can use fastboot to flash it. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: kylin: Check fastboot requestJeffy Chen
We will save boot mode flag in grf's os_reg[4], if fastboot requested or fastboot key pressed, try to enter fastboot mode at preboot stage. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-01-22rockchip: kylin: Add default gpt partition tableJeffy Chen
Add default android gpt partition table for kylin board. Use "gpt write mmc 0 $partitions" to apply. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-22rockchip: rk3036: Bind GPIO banksJeffy Chen
Call dm_scan_fdt_node() in rk3036 pinctrl uclass binding. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-22ARM: bootm: Try to use relocated ramdiskJeffy Chen
After boot_ramdisk_high(), ramdisk would be relocated to initrd_start & initrd_end, so use them instead of rd_start & rd_end. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-22dm: clk: Add support for decoding clocks from the device treeSimon Glass
Add a method which can locate a clock for a device, given its index. This uses the normal device tree bindings to return the clock device and the first argument which is normally used as a peripheral ID in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-22clk: add fixed rate clock driverMasahiro Yamada
This commit intends to implement "fixed-clock" as in Linux. (drivers/clk/clk-fixed-rate.c in Linux) If you need a very simple clock to just provide fixed clock rate like a crystal oscillator, you do not have to write a new driver. This driver can support it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-01-21Merge git://git.denx.de/u-boot-dmTom Rini
2016-01-21Merge branch 'master' of git://git.denx.de/u-boot-i2c; branch 'master' of ↵Tom Rini
git://git.denx.de/u-boot-nds32
2016-01-21sunxi: Add support for the I2C controller which is part of the PRCMJelle van der Waa
Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> [hdegoede@redhat.com: Minor cleanups] Signed-off-by: Hans de Goede <hdegoede@redhat.com> applied with fixing 2 checkpatch warnings: WARNING: please, no space before tabs Signed-off-by: Heiko Schocher <hs@denx.de>
2016-01-21i2c: mvtwsi: Fix mvtwsi not working on sun6i and newer sunxi SoCsHans de Goede
On sun6i and newer IFLG is a write-clear bit which is cleared by writing 1, rather then a normal r/w bit which is cleared by writing 0. Signed-off-by: Hans de Goede <hdegoede@redhat.com> applied with fixing 3 checkpatch warnings in drivers/i2c/mvtwsi.c: WARNING: line over 80 characters ERROR: code indent should use tabs where possible WARNING: please, no spaces at the start of a line Signed-off-by: Heiko Schocher <hs@denx.de>
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