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2017-05-08igep003x: UBIizeLadislav Michl
Convert IGEP board to use UBI volumes for U-Boot, its environment and kernel. With exception of first four sectors read by SoC BootROM whole NAND is UBI managed. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Heiko Schocher<hs@denx.de> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08igep0033: Rename to igep003xLadislav Michl
Rename igep0033 to igep003x as IGEP SMARC AM335x module (igep0034) can use the same source files. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08mtd: nand: Consolidate nand spl loaders implementationLadislav Michl
nand_spl_load_image implementation was copied over into three different drivers and now with nand_spl_read_block used for ubispl situation gets even worse. For now use least intrusive solution and #include the same implementation to nand drivers. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08ARM: am33xx: define BOOT_DEVICE_ONENANDLadislav Michl
am33xx does not support OneNAND, but we need this define anyway to let UBI SPL code compile. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08ARM: am33xx: fix typo in spl.hLadislav Michl
Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08stm32f7: remove not needed configuration from board configVikas Manocha
This patch removes: - CONFIG_CMD_MEM: enabled by default - CONFIG_DESIGNWARE_ETH : not being used anywhere. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: add support for stm32f769 disco boardVikas Manocha
This board support stm32f7 family device stm32f769-I with 2MB internal Flash & 512KB RAM. STM32F769 lines offer the performance of the Cortex-M7 core (with double precision floating point unit) running up to 216 MHz. To compile for stm32f769 board, use same defconfig as stm32f746-disco, the only difference is to pass "DEVICE_TREE=stm32f769-disco". Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: move board specific pin muxing to dtsVikas Manocha
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: increase the max no of pin configuration to 70Vikas Manocha
The number of pins to be configured could be more than 50 e.g. in case of sdram controller, there are about 56 pins (32 data lines, 12 address & some control signals). Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: sdram: correct sdram configuration as per micron sdramVikas Manocha
Actually the sdram memory on stm32f746 discovery board is micron part MT48LC_4M32_B2B5_6A. This patch does the modification required in the device tree node & driver for the same. Also we are passing here all the timing parameters in terms of clock cycles, so no need to convert time(ns or ms) to cycles. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: enable board info read from device treeVikas Manocha
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: stm32f746-disco: read memory info from device treeVikas Manocha
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f746: to switch on user LED1 & read user buttonVikas Manocha
All discovery boards have one user button & one user LED. Here we are just reading the button status & switching ON the user LED. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: use stm32f7 gpio driver supporting driver modelVikas Manocha
With this gpio driver supporting DM, there is no need to enable clocks for different gpios (for pin muxing) in the board specific code. Need to increase the allocatable area required before relocation from 0x400 to 0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08ARM: DT: stm32f7: add gpio device tree nodesVikas Manocha
Also created alias for gpios for stm32f7 discovery board. Based on these aliases, it would be possible to get gpio devices by sequence. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08dm: gpio: Add driver for stm32f7 gpio controllerVikas Manocha
This patch adds gpio driver supporting driver model for stm32f7 gpio. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Christophe KERELLO <christophe.kerello@st.com> [trini: Add depends on STM32] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-08stm32f7: sdram: use sdram device tree node to configure sdram controllerVikas Manocha
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: use clock driver to enable sdram controller clockVikas Manocha
This patch also removes the sdram/fmc clock enable from board specific code. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: use driver model for sdram initializationVikas Manocha
As driver model takes care of pin control configuraion, this patch also removes the sdram/fmc pin configuration. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08ARM: DT: stm32f7: add sdram pin contol nodeVikas Manocha
Also added DT binding doc for stm32 fmc(flexible memory controller). Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: dm: add driver model support for sdramVikas Manocha
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: sdram: move sdram driver code to ram drivers areaVikas Manocha
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: use clock driver to enable qspi controller clockVikas Manocha
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08spl: make image arg or fdt blob address reconfigurableVikas Manocha
At present fdt blob or argument address being passed to kernel is fixed at compile time using macro CONFIG_SYS_SPL_ARGS_ADDR. FDT blob from different media like nand, nor flash are copied to the address pointed by the macro. The problem is, it makes args/fdt blob compulsory to copy which is not required in cases like for NOR Flash. This patch removes this limitation. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2017-05-08arm: am57xx: cl-som-am57x: enable USB commandsUri Mashiach
Add CONFIG_CMD_USB to the defconfig file. Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-08arm: am57xx: cl-som-am57x: enable USB storageUri Mashiach
Add CONFIG_USB_STORAGE to the defconfig file. Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-08arm: am57xx: cl-som-am57x: fix USB scanUri Mashiach
USB bus scan attempt: ----------------------------------cut---------------------------------- => usb start starting USB... USB0: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.00 scanning bus 0 for devices... data abort pc : [<fff6240e>] lr : [<fff623b3>] reloc pc : [<8081b40e>] lr : [<8081b3b3>] sp : fdf42930 ip : fdf42960 fp : 00000000 r10: 00000001 r9 : fdf42ef0 r8 : 48890020 r7 : 00000002 r6 : fffa5840 r5 : fff8b140 r4 : fdf429c0 r3 : 00000000 r2 : 00000004 r1 : 00000000 r0 : 00000000 Flags: nZcv IRQs off FIQs off Mode SVC_32 Resetting CPU ... resetting ... ----------------------------------cut---------------------------------- Fix by enabling USB configuration in the SPL. Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Igor Grinberg <grinberg@compulab.co.il>
2017-05-08arm: am57xx: cl-som-am57x: invoke clock API to enable/disable clocksUri Mashiach
Invoke enable_usb_clocks during board_usb_init and disable_usb_clocks during board_usb_exit to enable and disable clocks respectively. Modifications: * Enable USB clocks in the OMAP version of the function board_usb_init. * Disable USB clocks in the OMAP version of the function board_usb_cleanup. Cc: Marek Vasut <marex@denx.de> Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-08usb: host: xhci-omap: fix double weak board_usb_init functionsUri Mashiach
A weak version of the function board_usb_init is implemented in: common/usb.c drivers/usb/host/xhci-omap.c To fix the double implementations: * Convert the board_usb_init function in drivers/usb/host/xhci-omap.c normal (not weak). * The function board_usb_init in drivers/usb/host/xhci-omap.c calls to the weak function omap_xhci_board_usb_init. * Rename board version of the function board_usb_init to omap_xhci_board_usb_init. Done only for boards that defines CONFIG_USB_XHCI_OMAP. To achieve the same flexibility with the function board_usb_cleanup: * Add a normal (not weak) implementation of the function board_usb_cleanup in drivers/usb/host/xhci-omap.c * The function board_usb_cleanup in drivers/usb/host/xhci-omap.c calls to the weak function omap_xhci_board_usb_cleanup. * Rename board version of the function board_usb_cleanup to omap_xhci_board_usb_cleanup. Done only for boards that defines CONFIG_USB_XHCI_OMAP. Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Roger Quadros <rogerq@ti.com>
2017-05-08arm: usb: dra7xx: xHCI registers based on USB port indexUri Mashiach
Modify the determination of the base address of xHCI registers of DRA7XX targets. Before the commit: by the target. After the commit: by the USB port index. Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Roger Quadros <rogerq@ti.com> Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Roger Quadros <rogerq@ti.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
2017-05-08arm: dra7xx: move CONFIG_DRA7XX to KconfigUri Mashiach
The symbol CONFIG_DRA7XX is needed for Kconfig conditions. Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-08Prepare v2017.05Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-05board/BuR/common: incorrect check of dtbxypron.glpk@gmx.de
The logical expression to check the dtb is incorrect in load_devicetree. The problem was indicated by cppcheck. The inconsistent variable name dtppart is changed to dtbpart. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at> Acked-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2017-05-05tools: sunxi: avoid read after end of stringxypron.glpk@gmx.de
The evaluation of option -c is incorrect: According to the C99 standard endptr in the first strtol is always set as &endptr is not NULL. So the first part of the or condition is always true. If all digits in optarg are valid endptr will point to the closing \0 and the second strtol will read beyond the end of the string optarg points to. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-05-05relocate-rela: add missing va_end()xypron.glpk@gmx.de
va_start must always be matched by va_end. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-05-05lib: circbuf: avoid possible null pointer dereferencexypron.glpk@gmx.de
We should not first dereference p and afterwards assert that is was not NULL. Instead do the assert first. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-05-05arm64: mvebu: incorrect check of fdt address cellsxypron.glpk@gmx.de
In dram_init_banksize there seems to be a typo concerning a plausibility check of the fdt. Testing sc > 2 twice does not make any sense. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-05-05meson: gxbb: increase CONFIG_SYS_BOOTM_LENxypron.glpk@gmx.de
A feature rich Linux kernel needs more than 8 MiB. Hence enlarge CONFIG_SYS_BOOTM_LEN to 64 MiB for the GXBB systems. As all known GXBB systems have at least 512 MiB of RAM this poses no problem. Cc: Andreas Färber <afaerber@suse.de> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-05-05Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini
2017-05-03drivers: spi: Remove duplicate .probe methodSuniel Mahesh
.probe method has been assigned twice when declaring a driver with U_BOOT_DRIVER(). Removed one of them. Here is the last commit which had the duplicate entry: "spi: omap3: Convert to driver model" (sha1: 77b8d04854f486741471ad02b93b473b5b3d72f8) Signed-off-by: Suniel Mahesh <suniel.spartan@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-05-03zynq: spi: Honour the activation / deactivation delayMoritz Fischer
This is not currently implemented. Add support for this so that the Chrome OS EC can be used reliably. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-05-03spi: atmel: check GPIO validity before using cs_gpiosWenyou Yang
Before using the cs_gpio, check if the GPIO is valid or not. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-05-01Prepare v2017.05-rc3Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-01odroid-c2: README: MMC is supportedxypron.glpk@gmx.de
Mention eMMC and microSD as supported devices. They have been enabled with patch d0c5c8d529f16fa88ab52a3b5dd2d4fc03664f19 odroid-c2: enable new Meson GX MMC driver in board defconfig which was accepted for u-boot-mmc.git. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-05-01meson: gxbb: change ramdisk_addr_rxypron.glpk@gmx.de
0x10000000 is the start of a 2 MiB area used by the ARM Trusted Firmware (BL31). See https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/tree/arch/arm64/boot/dts/amlogic/meson-gx.dtsi?id=refs/tags/v4.10.10 So we should not load the ramdisk here. The legacy Ubuntu image for the Odroid C2 comes with the following line in boot.ini: setenv initrd_loadaddr "0x13000000" See http://odroid.in/ubuntu_16.04lts/ubuntu64-16.04-minimal-odroid-c2-20160815.img.xz http://deb.odroid.in/c2/pool/main/u/u-boot/u-boot_20170226-752a100-8_arm64.deb So let's use the same address. With the patch booting Linux with booti succeeds on an Odroid C2, without the patch Linux hangs. Cc: Andreas Färber <afaerber@suse.de> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Vagrant Cascadian <vagrant@debian.org>
2017-05-01meson: gxbb: enable MMC as boot targetxypron.glpk@gmx.de
To enable automatic booting from SD card or eMMC the MMC devices 0, 1, and 2 are added to the BOOT_TARGET_DEVICES. Booting from SD card, eMMC, and DHCP are tried in sequence. A missing or failing device is gracefully handled. Cc: Andreas Färber <afaerber@suse.de> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Tested-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Tested-by: Andreas Färber <afaerber@suse.de>
2017-05-01configs: Re-syncTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-01scripts/config_whitelist.txt: Re-syncTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-01warp7: MAINTAINERS: Add warp7_secure_defconfig entryFabio Estevam
Add warp7_secure_defconfig entry to avoid the following warning: WARNING: no maintainers for 'warp7_secure' Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-05-01fdt: Move fdt_fixup_ethernet to a common placeTom Rini
With 3f66149d9fb4 we no longer have a common call fdt_fixup_ethernet. This was fine to do on PowerPC as they largely had calls already in ft_cpu_fixup. On ARM however we largely relied on this call. Rather than introduce a large number of changes to ft_cpu_fixup / ft_board_fixup we recognize that this is a common enough call that we should be doing it in a central location. Do it early enough that we can do any further updates in ft_cpu_fixup / ft_board_fixup. Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Thomas Chou <thomas@wytron.com.tw> (maintainer:NIOS) Cc: York Sun <york.sun@nxp.com> (maintainer:POWERPC MPC85XX) Cc: Stefan Roese <sr@denx.de> (maintainer:POWERPC PPC4XX) Cc: Simon Glass <sjg@chromium.org> Cc: Joakim Tjernlund <Joakim.Tjernlund@infinera.com> Fixes: 3f66149d9fb4 ("Remove extra fdt_fixup_ethernet() call") Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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