summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2017-08-30Kconfig: Add LTC3882 voltage regulator configPrabhakar Kushwaha
Adds below LTC3882 voltage regulator config: CONFIG_VOL_MONITOR_LTC3882_READ CONFIG_VOL_MONITOR_LTC3882_SET Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2017-08-30board: common: vid: Move IR chip specific code in flagRajesh Bhagat
Moves IR chip (IR36021) specific code in flag to resolve compilation issue where it is not present. For example, LS1088A is having a new LTC3882 voltage chip. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2017-08-30board: common: vid: Add board specific vdd adjust APIRajesh Bhagat
Adds a board specific API namely board_adjust_vdd which is required to define the board VDD adjust settings. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2017-08-30board: common:vid: Add LS1088A VID Supported voltage valuesRajesh Bhagat
Adds below voltage values supported by LS1088A Soc: 1.025 V(default), 0.9875V, 0.9750 V, 0.9V, 1.0 V, 1.0125 V, 1.0250 V Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2017-08-30armv8: lsch3: Add serdes and DDR voltage setupRajesh Bhagat
Adds SERDES voltage and reset SERDES lanes API and makes enable/disable DDR controller support 0.9V API common. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2017-08-29armv8: fsl: Use correct conditional compile for ls1012aRan Wang
According current code base, CONFIG_LS1012A should be CONFIG_ARCH_LS1012A, or function fsl_fdt_disable(blob) will be wrongly called to disable all dwc3 USB nodes on LS1012A, which cause Linux USB function stop working at all. Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
2017-08-29arm64: ls1046ardb: Add distro secure boot supportSumit Garg
Enable validation of boot.scr script prior to its execution dependent on "secureboot" flag in environment. Enable fall back option to qspi boot in case of secure boot. Also enable "secureboot=y" flag in environment for ARM based platforms instead of bootcmd. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
2017-08-29arm64: ls1043ardb: Add distro secure boot supportSumit Garg
Enable validation of boot.scr script prior to its execution dependent on "secureboot" flag in environment. Enable fall back option to nor/qspi boot in case of secure boot. Also enable "secureboot=y" flag in environment for ARM based platforms instead of bootcmd. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
2017-08-29armv8/ls1088a: configure PMU's PCTBENR to enable WDTZhang Ying-22455
The SP805-WDT module on LS1088A requires configuration of PMU's PCTBENR register to enable watchdog counter decrement and reset signal generation. The watchdog clock needs to be enabled first. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2017-08-29LS2080AQDS: Move sec_init prior to ppa_init.Udit Agarwal
SEC must be initialised before PPA is validated, so call sec_init() ahead of ppa_init(). Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
2017-08-29LS2080A_SECURE_BOOT: Enable CONFIG_FSL_LS_PPA in defconfig.Udit Agarwal
Adds config CONFIG_FSL_LS_PPA and CONFIG_FSL_CAAM in LS2080AQDS and LS2080ARDB secure boot defconfig. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
2017-08-29LS1088A_QSPI: Add secure boot defconfigs for QSPI boot.Udit Agarwal
Add the secure boot defconfigs for QSPI boot on LS1088ARDB and LS1088AQDS platforms. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
2017-08-29 LS1088A_QSPI: SECURE_BOOT: Images validationPrabhakar Kushwaha
Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC phase using esbc_validate command. Add images validation in default environment under mcinitcmd prior to MC initialization. Add header address for PPA to be validated during ESBC phase for LS1088A platform based on LAyerscape Chasis 3. Moves sec_init prior to ppa_init as for validation of PPA sec must be initialised before the PPA is initialised. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
2017-08-29ls1088ardb: Add SD Secure boot target supportSumit Garg
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
2017-08-29armv8: ls1088a: SPL size reductionPrabhakar Kushwaha
Using changes in this patch we were able to reduce approx 8k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1088a/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1088a/ls1088a.c to keep board_early_init_f funcations in case of SPL build. 3. Changes in ls1088a_common.h & ls1088ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. 4. Enable CONFIG_SYS_DCACHE_OFF in case of SPL build as DCACHE is not being enabled in case of SPL image but was compiled in to add redundant code. Signed-off-by: Sumit Garg <sumit.garg@nxp.com
2017-08-29armv8: fsl-layerscape: SPL size reductionPrabhakar Kushwaha
Using changes in this patch we were able to reduce approx 4k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Compile-off mp.c and libfdt.c in case of SPL build. 2. Keep MMU and DCACHE specific variable and functions under CONFIG_SYS_DCACHE_OFF macro. 3. Compile-off IFC specific funtion call "init_early_memctl_regs" in case of SPL build. Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
2017-08-27arm64: ls1088ardb: Add distro boot supportAshish Kumar
Tested on ls1088ardb with automatically boot Ubuntu from SD card or USB disk, if it fails to detect external storage disk, fall back to qspi/sd boot. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Zhang Ying <zhangying@nxp.com>
2017-08-27configs: SECURE_BOOT: Enable CONFIG_CMD_EXT4_WRITESumit Garg
As part of chain of trust with confidentiality along with distro boot, linux kernel image needs to be stored in encrypted form on ext4 boot partition. So enable CONFIG_CMD_EXT4_WRITE in case of Secure boot. Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
2017-08-25ls1088aqds: Add SCSI related configs in header file for qdsAshish Kumar
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
2017-08-25ls1088ardb: Add SCSI related configs in header file for RDBAshish Kumar
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
2017-08-25ls1088aqds: Enbale USB command on QDS for SD-bootAshish Kumar
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
2017-08-25ls1088aqds: Enable USB command on QDS for qspi-bootAshish Kumar
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
2017-08-25ls1088ardb: Enbale USB command on RDB sd-bootAshish Kumar
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
2017-08-25ls1088ardb: Enable USB command RDB qspi-bootAshish Kumar
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
2017-08-25board/ls2080ardb: Update board env based on SoCPriyanka Jain
As per current implemenetation, default value of board env is based on board filename i.e ls2080ardb. With distro support changes, this env is used to decide upon kernel dtb which is different for other SoCs (ls2088a, ls2081a) combination supported with this board. Add support to modify board env based on SoC type Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2017-08-25spi: fsl_qspi: Add controller busy check before new spi operationSuresh Gupta
It is recommended to check either controller is free to take new spi action. The IP_ACC and AHB_ACC bits indicates that the controller is busy in IP or AHB mode respectively. And the BUSY bit indicates that controller is currently busy handling a transaction to an external flash device Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
2017-08-25PCI: layerscape: Make the pcie link up status judgement more specificBao Xiaowei
For some special reset times for longer pcie devices, in this case, the pcie device may on polling compliance state, the RC considers the pcie device is link up, but the pcie device is not link up, only the L0 state is link up state. So add the link up status judgement mechanisms. Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com>
2017-08-23armv8: ls1088aqds: Add SD boot support for ls1088qdsAshish Kumar
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
2017-08-23armv8: ls1088ardb: Add SD boot support for ls1088Ashish Kumar
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
2017-08-23Makefile: Concatenation of u-boot-spl.bin and u-boot.imgAshish Kumar
Concatenation of u-boot-spl.bin and u-boot.img for NXP layerscape platform SoC: LS1088A/LS2080A and their variants This patch also depricates UBOOT_BINLOAD in favour of SPL_PAYLOAD Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
2017-08-23board:ls1088aqds: Add support of EC1 and EC2Prabhakar Kushwaha
EC1 and EC2 are RGMII interface on ls1088aqds platform. This patch add support of RGMII with PHY and MDIO Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
2017-08-23armv8: fsl-layerscape: Support to add RGMII for ls1088aqdsAshish Kumar
This patch adds support RGMII protocol NXP's LDPAA2 support RGMII protocol. LS1088A is the first Soc supporting both RGMII and SGMII. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
2017-08-23driver: net: ldpaa: Update priv->phydev after free()Prabhakar Kushwaha
Even after memory free of phydev, priv is still pointing to the obsolete address. So update priv->phydev as NULL after memory free. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2017-08-23armv8: ls1088aqds: Add support of LS1088AQDSAshish Kumar
This patch add support of LS1088AQDS platform. The LS1088A QorIQTM Development System (QDS) is a high-performance computing, evaluation, and development platform that supports the LS1088A QorIQ Architecture processor. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
2017-08-23armv8: ls1088ardb: Add support for LS1088ARDB platformAshish Kumar
LS1088A is an ARMv8 implementation. The LS1088ARDB is an evaluatoin platform that supports the LS1088A family SoCs. This patch add basic support of the platform. Signed-off-by: Alison Wang <alison.wang@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
2017-08-23armv8: ls1088a: Add NXP LS1088A SoC supportAshish Kumar
The QorIQ LS1088A processor is built on the Layerscape architecture combining eight ARM A53 processor cores with advanced, high-performance datapath acceleration and networks, peripheral interfaces required for networking, wireless infrastructure, and general-purpose embedded applications. LS1088A is compliant with the Layerscape Chassis Generation 3. Features summary: - Eight 32-bit / 64-bit ARM v8 Cortex-A53 CPUs - Cores are in 2 cluster of 4-cores each - Cache coherent interconnect (CCI-400) - One 64-bit DDR4 SDRAM memory controller with ECC - Data path acceleration architecture 2.0 (DPAA2) - Ethernet interfaces: SGMIIs, RGMIIs, QSGMIIs, XFIs - QSPI, IFC, 3 PCIe, 1 SATA, 2 USB, 1 SDXC, 2 DUARTs etc Signed-off-by: Alison Wang <alison.wang@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
2017-08-23armv8: fsl-layerscape: Put SATA code under SATA configsAshish Kumar
It is not necessary for every SoC to have 2 SATA controller. So put SATA1, SATA2 code under respective defines. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
2017-08-23armv8: fsl-lsch3: Make CCN-504 related code conditionalAshish Kumar
LS2080 family has CCN-504 cache coherent interconnet. Other SoCs from LSCH3 may have differnt interconnect like LS1088. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2017-08-23whitelist: Remove "CONFIG_SYS_CCI400_ADDR" from whitelistAshish Kumar
This config is depricated and new config SYS_CCI400_OFFSET is introduced in Kconfig Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
2017-08-23armv7: Consolidate registers space defination for CCI-400 busAshish Kumar
CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new CONFIG defination "FSL_SYS_HAS_CCI400" and removes register space definaton of CCI-400 bus from immap_ls102xa to fsl_immap, since same is defined there already "CONFIG_SYS_CCI400_ADDR" is depricated and new SYS_CCI400_OFFSET is introduced in Kconfig Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
2017-08-23armv8:fsl-layerscape: Consolidate registers space defination for CCI-400 busAshish Kumar
CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new CONFIG defination "SYS_FSL_HAS_CCI400" and moves existing register space definaton of CCI-400 bus from immap_lsch2 to fsl_immap, so that it can be used for both chasis 2 and chasis 3. "CONFIG_SYS_CCI400_ADDR" is depricated and new SYS_CCI400_OFFSET is introduced in Kconfig Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2017-08-23net: phy: realtek: fix enabling of the TX-delay for RTL8211FMadalin Bucur
The old logic always enabled the TX-delay when the phy-mode was set to PHY_INTERFACE_MODE_RGMII. With this patch we enable the TX delay for PHY_INTERFACE_MODE_RGMII_ID and PHY_INTERFACE_MODE_RGMII_TXID and disable it for PHY_INTERFACE_MODE_RGMII. Based on a similar change made in the Linux Realtek PHY driver by Martin Blumenstingl <martin.blumenstingl@googlemail.com>. Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: York Sun <york.sun@nxp.com>
2017-08-23armv8: ls1043/ls1046aqds: add support for RGMII_TXIDMadalin Bucur
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: York Sun <york.sun@nxp.com>
2017-08-23net: fman: add support RGMII_TXID to memacMadalin Bucur
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-21armv8/fsl-layerscape: fdt Update kaslr_seed only if sec_firmware is availableRuchika Gupta
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
2017-08-21arm64: ls1043ardb: Add distro boot supportShengzhou Liu
Include common config_distro_defaults.h and config_distro_bootcmd.h for u-boot enviroments to support automatical distro boot which scan boot.scr from external storage devices(e.g. SD/USB/SATA/SCSI disk) and execute autoboot script. Tested on ls1043ardb with automatically boot Ubuntu from SD card or USB disk, if it fails to detect external storage disk, fall back to nor/qspi boot. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Signed-off-by: Zhang Ying <ying.zhang22455@nxp.com>
2017-08-17driver: net: fsl-mc: fsl_mc_ldpaa_exit exit earlier if dpl appliedSantan Kumar
In fsl_mc_ldpaa_exit(), in case of mc is booted and dpl is applied, it should return earlier without executing dpbp_exit() Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Acked-by: Priyanka Jain <priyanka.jain@nxp.com> Acked-by: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
2017-08-17armv8: ls2080a: Increase env sector size for qspi bootSantan Kumar
Increase env sector size from 64kb to 256kb for qspi boot Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2017-08-17board/ls2081ardb: Some updates like flash typeSantan Kumar
Patch makes below changes: -Update QSPI flash type As per updated board design, different QSPI flash is connected on boards, hence change QSPI flash type from Micron n25q512a device to spansion s25fs512s device in dts and config. -Update QIXIS_QMAP_MASK value from 0x07 to 0x70 -Update checkboard() display of boot source and board information -Correct DSPI flash config selection -Remove deprecated config : CONFIG_DISPLAY_BOARDINFO_LATE Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2017-08-17armv8: Correct register offset define.Ran Wang
For USB erratum A-009007, original patch write the wrong register on LS208xa, need to be correct according to PDM information update. Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
generated by cgit v0.10.2 at 2024-08-10 15:57:45 (GMT)