summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2016-10-06spl: Convert spl_sata_load_image() to use linker listSimon Glass
Add a linker list declaration for this method and remove the explicit switch() code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Convert spl_usb_load_image() to use linker listSimon Glass
Add a linker list declaration for this method and remove the explicit switch() code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Convert spl_ymodem_load_image() to use linker listSimon Glass
Add a linker list declaration for this method and remove the explicit switch() code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Convert spl_nor_load_image() to use linker listSimon Glass
Add a linker list declaration for this method and remove the explicit switch() code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Convert spl_onenand_load_image() to use linker listSimon Glass
Add a linker list declaration for this method and remove the explicit switch() code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Convert spl_nand_load_image() to use linker listSimon Glass
Add a linker list declaration for this method and remove the explicit switch() code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Convert spl_ubi_load_image() to use linker listSimon Glass
Add a linker list declaration for this method and remove the explicit switch() code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Convert spl_mmc_load_image() to use linker listSimon Glass
Add a linker list declaration for this method and remove the explicit switch() code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Convert spl_ram_load_image() to use linker listSimon Glass
Add a linker list declaration for this method and remove the explicit switch() code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Include updating the DFU case] Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Add a way to declare an SPL image loaderSimon Glass
Add a linker list macro which can be used to declare an SPL image loader. Update spl_load_image() to search available loaders for the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Convert boot_device into a structSimon Glass
At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Kconfig: Move SPL_DISPLAY_PRINT to KconfigSimon Glass
Move this option to Kconfig and tidy up existing uses. Also add a function comment to the header file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Add function comments to spl_start_uboot()Simon Glass
Add some comments to describe this function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Add a parameter to jump_to_image_linux()Simon Glass
Instead of using the global spl_image variable, pass the required struct in as an argument. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Add a parameter to spl_parse_image_header()Simon Glass
Instead of using the global spl_image variable, pass the required struct in as an argument. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Add a parameter to spl_set_header_raw_uboot()Simon Glass
Rather than act on the global variable, pass the required struct in as a parameter. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Move spl_board_load_image() into a generic headerSimon Glass
At present this is only used on ARM and sandbox, but it is just as applicable to other architectures. Move the function prototype into the generic SPL header. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06serial: ns16550: Handle -ENOENT when requesting clockAlexandre Courbot
When calling clk_get_by_index(), fall back to the legacy method of getting the clock if -ENOENT is returned. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com>
2016-10-03Prepare v2016.11-rc1Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-03Merge git://git.denx.de/u-boot-rockchipTom Rini
2016-10-02ti_armv7_common: Disable Falcon Mode on HS devicesAndrew F. Davis
Authentication of images in Falcon Mode is not supported. Do not enable SPL_OS_BOOT when TI_SECURE_DEVICE is enabled. This prevents attempting to directly load kernel images which will fail, for security reasons, on HS devices, the board is locked if a non-authenticatable image load is attempted, so we disable attempting Falcon Mode. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-10-02config: Remove usage of CONFIG_STORAGE_EMMCAndrew F. Davis
This config option seems to be unused and is probably vestigial. Remove it. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-10-02ti: omap-common: Allow AM33xx devices to be built securelyAndrew F. Davis
Like OMAP54xx and AM43xx family SoCs, AM33xx based SoCs have high security enabled models. Allow AM33xx devices to be built with HS Device Type Support. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-10-02board: am33xx-hs: Allow post-processing of FIT image on AM33xxAndrew F. Davis
When CONFIG_FIT_IMAGE_POST_PROCESS or CONFIG_SPL_FIT_IMAGE_POST_PROCESS is enabled board_fit_image_post_process will be called, add this function to am33xx boards when CONFIG_TI_SECURE_DEVICE is set to verify the loaded image. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-10-02am33xx: config.mk: Fix option used to enable SPI SPL image typeAndrew F. Davis
The option SPL_SPI_SUPPORT is used to enable support in SPL for loading images from SPI flash, it should not be used to determine the build type of the SPL image itself. The ability to read images from SPI flash does not imply the SPL will be booted from SPI flash. Unconditionally build SPI flash compatible SPL images. Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-02doc: Update info on using AM33xx secure devices from TIAndrew F. Davis
Add a section describing the additional boot types used on AM33xx secure devices. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-10-02am33xx: config.mk: Add support for additional secure boot image typesAndrew F. Davis
Depending on the boot media, different images are needed for secure devices. The build generates u-boot*_HS_* files as appropriate for the different boot modes. For AM33xx devices additional image types are needed for various SPL boot modes as the ROM checks for the name of the boot mode in the file it loads. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-10-02Kconfig: Separate AM33XX SOC config from target board configAndrew F. Davis
The config option AM33XX is used in several boards and should be defined as a stand-alone option for this SOC. We break this out from target boards that use this SoC and common headers then enable AM33XX on in all the boards that used these targets to eliminate any functional change with this patch. This is similar to what has already been done in 9de852642cae ("arm: Kconfig: Add support for AM43xx SoC specific Kconfig") and is done for the same reasons. Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-02ARM: omap5: add fdt secure dram reservation fixupDaniel Allred
Adds a secure dram reservation fixup for secure devices, when a region in the emif has been set aside for secure world use. The size is defined by the CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE config option. Signed-off-by: Daniel Allred <d-allred@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-02ti_omap5_common: mark region of DRAM protected on HS partsDaniel Allred
If the ending portion of the DRAM is reserved for secure world use, then u-boot cannot use this memory for its relocation purposes. To prevent issues, we mark this memory as PRAM and this prevents it from being used by u-boot at all. Signed-off-by: Daniel Allred <d-allred@ti.com>
2016-10-02ARM: DRA7: Add secure emif setup callsDaniel Allred
After EMIF DRAM is configured, but before it is used, calls are made on secure devices to reserve any configured memory region needed by the secure world and then to lock the EMIF firewall configuration. If any other firewall configuration needs to be applied, it must happen before the lock call. Signed-off-by: Daniel Allred <d-allred@ti.com>
2016-10-02arm: omap5: secure API for EMIF memory reservationsDaniel Allred
Create a few public APIs which rely on secure world ROM/HAL APIs for their implementation. These are intended to be used to reserve a portion of the EMIF memory and configure hardware firewalls around that region to prevent public code from manipulating or interfering with that memory. Signed-off-by: Daniel Allred <d-allred@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-02ti: omap5: Add Kconfig options for secure EMIF reservationsDaniel Allred
Adds start address and size config options for setting aside a portion of the EMIF memory space for usage by security software (like a secure OS/TEE). There are two sizes, a total size and a protected size. The region is divided into protected (secure) and unprotected (public) regions, that are contiguous and start at the start address given. If the start address is zero, the intention is that the region will be automatically placed at the end of the available external DRAM space. Signed-off-by: Daniel Allred <d-allred@ti.com>
2016-10-02rockchip: add boot-mode support for rk3288, rk3036Jacob Chen
rockchip platform have a protocol to pass the the kernel reboot mode to bootloader by some special registers when system reboot. In bootloader we should read it and take action. We can only setup boot_mode in board_late_init becasue "setenv" need env setuped. So add CONFIG_BOARD_LATE_INIT to common header and use a entry "rk_board_late_init" to replace "board_late_init" in board file. Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-02rockchip: move common function from board-file to rk3036-board.cJacob Chen
To keep it same with 3288 Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-02rockchip: rename board.c to rk3288-board.cJacob Chen
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-02rockchip: move partitons define from 3036-kylin to 3036-commonJacob Chen
To keep it same with 3288. Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-02rockchip: miniarm: remove eMMC supportXu Ziyuan
The latest rk3288-miniarm board doesn't have eMMC device, so remove it. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-02config: evb-rk3399: enable pwm regulatorKever Yang
Enable the pwm regulator for evb-rk3399. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-02dts: evb-rk3399: add init voltage node for vdd-centerKever Yang
Add a regulator-init-microvolt for vdd_center regulator so that we can get a init value for driver probe. Not like pmic regulator, the PWM regulator do not have a known default output value, so we would like to init the regulator when driver probe. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-02Kconfig: rockchip: enable DM_PWM and DM_REGULATORKever Yang
Enable DM_PWM and DM_REGULATOR on rockchip SoCs. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-02rockchip: evb_rk3399: init vdd_center regulatorKever Yang
Add vdd_center pwm regulator get_device to enable this regulator. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-02power: regulator: add pwm regulatorKever Yang
add driver support for pwm regulator. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-02rockchip: rkpwm: fix the register sequenceKever Yang
Reference to kernel source code, rockchip pwm has three type, we are using v2 for rk3288 and rk3399, so let's update the register to sync with pwm_data_v2 in kernel. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-02rockchip: rk3399: update PPLL and pmu_pclk frequencyKever Yang
Update PPLL to 676MHz and PMU_PCLK to 48MHz, because: 1. 48MHz can make sure the pwm can get exact 50% duty ratio, but 99MHz can not, 2. We think 48MHz is fast enough for pmu pclk and it is lower power cost than 99MHz, 3. PPLL 676 MHz and PMU_PCLK 48MHz are the clock rate we are using internally for kernel,it suppose not to change the bus clock like pmu_pclk in kernel, so we want to change it in uboot. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-02rockchip: add usb mass storage feature support for rk3036jacob2.chen
Enable ums feature for rk3036 boards, so that we can mount the mmc device to PC. Signed-off-by: jacob2.chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-02Enable ROCKCHIP_SPL_BACK_TO_BROM for rock2 boardSandy Patterson
Rock2 has been tested with back to brom feature. The tricky part is that with this feature the default environment is inside u-boot, and it's defined for every rk3288 board independetly. So I just changed it for rock2 here if ROCKCHIP_SPL_BACK_TO_BROM. Solve by moving environment after u-boot before 1M boundary Signed-off-by: Sandy Patterson <apatterson@sightlogix.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-02Disable SPL_MMC_SUPPORT if ROCKCHIP_SPL_BACK_TO_BROM is enabled.Sandy Patterson
Default SPL_MMC_SUPPORT to false when ROCKCHIP_SPL_BACK_TO_BROM is enabled. Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Signed-off-by: Sandy Patterson <apatterson@sightlogix.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-02rockchip: Fix SPL console output when ROCKCHIP_SPL_BACK_TO_BROM is enabledSandy Patterson
Move back_to_bootrom() call later in SPL init so that the console is initialized and printouts happen. Currently when ROCKCHIP_SPL_BACK_TO_BROM is enabled there is no console output from the SPL init stages. I wasn't sure exactly where this should happen, so if we are set to do run spl_board_init, then go back to bootrom there after preloader_console_init(). Otherwise fall back to old behavior of doing it in board_init_f. Signed-off-by: Sandy Patterson <apatterson@sightlogix.com> Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-02rockchip: rk3288: sdram: fix DDR address rangeXu Ziyuan
The all current Rockchip SoCs supporting 4GB of ram have problems accessing the memory region 0xfe000000~0xff000000. Actually, some IP controller can't address to, so let's limit the available range. This patch fixes a bug which found in miniarm-rk3288-4GB board. The U-Boot was relocated to 0xfef72000, and .bss variants was also relocated, such as do_fat_read_at_block. Once eMMC controller transfer data to do_fat_read_at_block via DMA, DMAC can't access more than 0xfe000000. So that DMAC didn't work sane. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
generated by cgit v0.10.2 at 2024-10-02 12:53:39 (GMT)