summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2015-04-23ARM: integrator: split board select into AP/CP select and CM selectMasahiro Yamada
Select integrator boards by the combination of platform select (AP/CP) and core module select (CM720T, CM920T, ...). This allows us to remove CONFIG_SYS_EXTRA_OPTIONS and make Kconfig much cleaner. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Linus Walleij <linus.walleij@linaro.org>
2015-04-23ARM: integrator: move board select into mach-integrator/KconfigMasahiro Yamada
The board/SoC select menu in arch/arm/Kconfig is still cluttered. Add ARCH_INTEGRATOR into arch/arm/Kconfig and move the board select under arch/arm/mach-integrator. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Linus Walleij <linus.walleij@linaro.org>
2015-04-23ARM: ARM720t: remove empty asm/arch/hardware.hMasahiro Yamada
arch/arm/cpu/arm720t/start.S includes <asm/arch/hardware.h>, but the hardware.h headers of ARM720T boards are all empty. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com>
2015-04-23SPDX: add X11 SPDX-License-IdentifierMasahiro Yamada
These is a growing trend to license DT files dual GPL and X11 especially in the Linux community. It allows easier reuse of device trees for other software projects. This commit prepares for doing so in U-Boot too, since DT files are often copied from the kernel to U-Boot. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-04-23Licenses: fix a typo in READMEMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-04-23vexpress64: use DM for all vexpress64 boardsLinus Walleij
Commit d8bafe1310487ba0e0785997726b4792072178d3 "ARMv8: enable DM in vexpress64 board" only enabled DM for the simulated vexpress64 board (FVP) with the hardcoded clock value for the simulated board, causing a console regression on the Juno board which was using a different clock setting. Fix this by enabling DM for all vexpress64 boards, defining the clock frequency per-board, deleting the static array of PL01x ports from the config file and relying solely on the port defined in the boardfile using platform data. Cc: David Feng <fenghua@phytium.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-04-23board/BuR/tseries: change pinmuxHannes Petermaier
some pins on the board have been rerouted to other peripherals, so we change the pinmux to apply with hardware-design. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2015-04-23board/BuR/tseries: reactivate NAND-boardHannes Petermaier
The NAND-version has been become a bit orphan. Now we need to reactivate it, so bring necessary things: - loading devicetree - switch control signal to correct pins - setup pinmux - default-environment up to date. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2015-04-23board/BuR/common: simplify access to devicetreeHannes Petermaier
instead of polling everytime the environment, we take usage of the global gd->fdt_blob variable and check it only against NULL. Variable "dtbaddr" from environment is needed only one time on loading the devicetree within "load_devicetree()" Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2015-04-22cmd_scsi: Enable SoC AHCI device on platforms with PCItang yuantian
Current driver assumes the AHCI is connected to PCI, this is not true on some SoCs, e.g. LS1021A, which has PCI but the AHCI is in SoC. This patch will enable embedded AHCI devices on platforms with PCI. PCI AHCI devices still can be used by commenting CONFIG_SCSI_AHCI_PLAT option in head file. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-04-22stm32f4: Add support for stm32f429-discovery boardrev13@wp.pl
Signed-off-by: Kamil Lulko <rev13@wp.pl> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-04-22stm32f4: Add serial driverrev13@wp.pl
Signed-off-by: Kamil Lulko <rev13@wp.pl> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-04-22ARMv7M: Add STM32F4 supportrev13@wp.pl
Signed-off-by: Kamil Lulko <rev13@wp.pl> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-04-22ARM: Add ARMv7-M supportrev13@wp.pl
Signed-off-by: Kamil Lulko <rev13@wp.pl>
2015-04-22unzip: add gzwrite command to write compressed image to block deviceEric Nelson
Add gzwrite command to write gzip-compressed images to block devices. Input must be gzip-compressed according to RFC1952, since the crc and file size in the trailer will be confirmed during operation. The decompressed file size must be specified on the command line for images with decompressed sizes >= 4GiB because the trailer only contains the low 32 bits of the original file size. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2015-04-22gunzip: add gzwrite routine for extracting compresed images to block deviceEric Nelson
Initial filesystem images are generally highly compressible. Add a routine gzwrite that allows gzip-compressed images to be written to block devices. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Reviewed-by: Tom Rini <trini@ti.com>
2015-04-21serial: pl01x: fix PL010 regressionLinus Walleij
commit aed2fbef5e9a0ab5a7cd01e742039a962f0b24ef "dm: serial: Tidy up the pl01x driver" caused a regression on (real hardware) PL010 by omitting to update the line control register when switching baudrate. Fix this by inlining the missing write to the baud control register. Also renaming the set_line_control() function to pl011_set_line_control() since this function is clearly PL011-specific, and it won't suffice to call that to set up line control. Tested on the Integrator/AP hardware. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-04-21kconfig: remove duplicated CMD_DNS optionAndrey Skvortsov
two CMD_DNS options were added by commit 60296a835cb17 ("commands: add more command entries in Kconfig") Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-04-21Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini
2015-04-20net: pch_gbe: Fix pch_gbe device nameBin Meng
The name "pch_gbe.%x" exceeds the limit of the name in the 'struct eth_device'. Rename it as just "pch_gbe". Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-04-20net: gem: Use correct type for castingMichal Simek
Use phys_addr_t which is used in function prototype in system.h. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-04-20net/phy: fixup for get_phy_idShengzhou Liu
commit 3c6928fd7b0f84 "net: phy: fix warnings with W=1" caused some PHYs(e.g. CS4315/CS4340) not working. This patch fixes the warning and make those special PHYs working as well. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2015-04-20net: phy: micrel: add support for KSZ8081MNXLuca Ellero
This patch adds a support for KSZ8081MNX in MII mode. Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com> Acked-by: Pavel Machek <pavel@denx.de>
2015-04-20mii: add read-modify-write option to mii commandTim James
When accessing PHY registers it is often desirable to only update selected bits, so it is necessary to first read the current value before writing back an modified value with the relevant bits updated. To simplify this and to allow such operations to be incorporated into simple shell scripts propose adding a 'modify' option to the existing mii command, which takes a mask indicating the bits to be updated in addition to a data value containing the new bits, ie, <updated> = (<data> & <mask>) | (<current> & ~<mask>). Signed-off-by: Tim <tim.james@macltd.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Tom Rini <trini@konsulko.com> Cc: Tim <tim.james@macltd.com>
2015-04-20Update MAINTAINERS and git-mailrc for netJoe Hershberger
Update to my corporate email and make the supported filter and aliases more accurate. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2015-04-20net: rtl8169: Build warning fixes for 64-bitThierry Reding
Turn ioaddr into an unsigned long rather than a sized 32-bit variable. While at it, fix a couple of pointer to integer cast size mismatch warnings by casting through unsigned long going from pointers to integers and vice versa. Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-04-20net: phy: realtek: Disable interrupt on Realtek Ethernet PHY driversCodrin Ciubotariu
Some Realtek Ethernet PHYs, like RTL8211D(G/N) and RTL8211E(G), have interrupts enabled by default. If the interrupt is not treated later by the OS and the PHY's interrupt line is enabled and shared with other interrupts, the system will get an interrupt storm. This patch disables the interrupt for PHY devices that use one of the current Realtek Ethernet PHY drivers. Some of Realtek Ethernet PHYs, such as RTL8211B(L) have the interrupt masked. In this case, the functionality of the PHY should not be afected since this patch brings INER and INSR registers to their default values. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-04-20Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini
2015-04-20powerpc/mpc8641hpcn: Move environment to avoid conflictScott Wood
U-Boot on this board grew a long time ago past the 384 KiB that it reserves for the U-Boot image, before the environment. Thus, saveenv overwrites the U-Boot image and bricks the board. I tried to find out when U-Boot grew beyond this point, but there is a long stretch in the history where this board did not build -- and AFAICT when it did fit in 384 KiB, it was missing vital features such as fdt support. Turning off CONFIG_VIDEO was not enough to make it fit. Thus, I don't think we have any choice other than to move the environment. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20board/t2080rdb: enable CONFIG_PHY_AQUANTIAShengzhou Liu
CONFIG_PHY_AQ1202 is no longer needed, use CONFIG_PHY_AQUANTIA. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20powerpc/mpc85xx: Remove some dead codeScott Wood
U-Boot does not have system calls (the services it exposes to standalone commands use a different mechanism), so the syscall handler is dead code. It's also broken code, as it assumes it is located at 0xc00 -- while even before the patch to stop relocating exception vectors to 0, U-Boot had the syscall at 0x900. The critical and machine check return paths are never called -- the regular exception return path is used instead, which works because xSRR0/1 have already been saved and can be restored via the regular SRR0/1 (we don't care too much in U-Boot about taking a critical/mcheck inside another exception prolog/epilog). Also remove a few other small unused functions. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20powerpc/mpc85xx: Don't relocate exception vectorsScott Wood
Booke does not require exception vectors to be located at address zero. U-Boot was doing so anyway, simply because that's how it had been done on other PPC. The downside of this is that once the OS is loaded to address zero, the exception vectors have been overwritten -- which makes it difficult to diagnose a crash that happens after that point. The IVOR setup and trap entry code is simplified somewhat as a result. Also, there is no longer a need to align individual exceptions on 0x100 byte boundaries. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20powerpc/t2080rdb: update ddr to support 1866MT/sShengzhou Liu
Support SODIMM D3XP12081XL10AA 1866MT/s on T2080RDB. Enable CONFIG_CMD_MEMTEST as well. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20T4240RDB: Enable CONFIG_SYS_CORTINA_FW_IN_NOR configChunhe Lan
Now cortina driver uses macro CONFIG_SYS_CORTINA_FW_IN_NOR to define that firmware of cortina driver is stored in the nor flash. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20board/t208xrdb: VID supportYing Zhang
The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20powerpc/t2080: enable erratum_a007186 for t2080 rev1.1Shengzhou Liu
T2080 rev1.1 also needs erratum a007186. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20qemu-ppce500: Add support for 64bit CCSR mapAlexander Graf
QEMU 2.3 changes the address layout of the CCSR map in the PV ppce500 machine to reside in higher address space. Unfortunately, this exposed a glitch in u-boot for ppce500: While providing a function to dynamically evaluate the CCSR region's position in physical address space, we never used it. Plus we forgot to support 64bit physical addresses. This patch fixes that mishap, making u-boot work fine with latest QEMU again. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20MPC8541/MPC8555: Enable SS_EN in DDR_SDRAM_CLK_CNLT registerCurt Brune
According to the MPC8555/MPC8541 reference manual the SS_EN (source synchronous enable) bit in the DDR_SDRAM_CLK_CNLT register must be set during initialization. >From section 9.4.1.8 of that manual: Source synchronous enable. This bit field must be set during initialization. See Section 9.6.1, "DDR SDRAM Initialization Sequence," details. 0 - Reserved 1 - The address and command are sent to the DDR SDRAMs source synchronously. In addition, Freescale application note AN2805 is also very clear that this bit must be set. This patch reverts a change introduced by commit 457caecdbca3df21a93abff19eab12dbc61b7897. Testing Done: Compiled targets CONFIG_TARGET_MPC8555CDS and CONFIG_TARGET_MPC8541CDS and inspected the generated assembly code to verify the SS_EN bit was being set. There is one extra instruction emitted: fff9b774: 65 29 80 00 oris r9,r9,32768 Compiled the CONFIG_TARGET_MPC8548CDS target and verified that no additional instructions were emitted related to this patch. Booted an image on a MPC8541 based board successfully. Signed-off-by: Curt Brune <curt@cumulusnetworks.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-04-20Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini
2015-04-20video, lg4573: add support for the lg4573 displayHeiko Schocher
Signed-off-by: Heiko Schocher <hs@denx.de>
2015-04-20video, ipu: make ldb clock frequency overwritable through board codeHeiko Schocher
the ldb clock can be setup in board code (for example set through PLL5). Update the ldb_clock rate also through board code. This should be removed, if a clock framework is availiable. Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
2015-04-20video, ipu: make ldb_clock configurableHeiko Schocher
make the ldb_clock configurable through the new define CONFIG_SYS_LDB_CLOCK. This is needed as the ldb clock is not always 650000000, for example on the aristainetos2 board, where the ldb clock derives from PLL5 clock. Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
2015-04-19sandbox: add config_distro_defaults and config_distro_bootcmdSjoerd Simons
Make the sandbox setup more generic/examplary by including config_distro_defaults.h and config_distro_bootcmd.h. Among other things this makes it easy to test whether images will boot though with the standard distro bootcmds by running e.g: u-boot -c 'host bind 0 myimage.img ; boot' By default there are 2 target host devices to emulate device with multiple storage devices (e.g. internal ("host 0") and external ("host 1") and verify that the prioritization and fallbacks do work correctly. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-19config: Add default client arch defines for intel architecturesSjoerd Simons
Define default PXE client architecture identifiers for IA32 (0x0 aka Intel x86PC) and Intel x86-64 (0x9 aka EFI x86-64). This prepares for usage for config_distro_defaults in the sandbox architecture Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
2015-04-19pxe: Ensure all memory access is to mapped memorySjoerd Simons
Properly map memory through map_sysmem so that pxe can be used from the sandbox. Tested in sandbox as well as on jetson-tk1, odroid-xu3, snow as peach-pi boards Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-19config_distro_bootcmd.h: Add shared block definition for the host interfaceSjoerd Simons
Define the common shared block environment for the host interface in preperation for the sandbox build to use config_distro_bootcmd. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
2015-04-19sandbox: Implement host dev [device]Sjoerd Simons
A common pattern to check if a certain device exists (e.g. in config_distro_bootcmd) is to use: <interface> dev [device] Implement host dev [device] so this pattern can be used for sandbox host devices. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-19sandbox: Renamed sb command to hostSjoerd Simons
As suggested by Simon Glass, rename the sb command to host but keep the old sb command as an alias Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-19sandbox: Add support for bootzSjoerd Simons
Add dummy bootz_setup implementation allowing the u-boot sandbox to run bootz. This recognizes both ARM and x86 zImages to validate a valid zImage was loaded. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-19sandbox: Split bootm code out into lib/bootmSjoerd Simons
Follow the convention of other architectures and move the platform specific linux bootm code into sandbox/lib/bootm.c. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>