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2017-10-13armv8: configs: ls1012a: correct the generic timer frequency issueYuantian Tang
On ls1012a soc, core clock source frequency is 100Mhz. Generic timer frequency is derived from core clock source divided by 4, which is 25Mhz. So assign timer frequency to 25Mhz here. Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
2017-10-11configs: ls1012a: add pfe configuration for LS1012ACalvin Johnson
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2017-10-11fsl: csu: enable ns access for PFECalvin Johnson
Enable non-secure access for PFE block. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2017-10-11armv8: fsl-lsch2: configure pfe's scfg & dcfg registersCalvin Johnson
Define init_pfe_scfg_dcfg_regs to configure scfg and dcfg registers of pfe. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2017-10-11armv8: fsl-lsch2: add pfe macros and update ccsr_scfg structureCalvin Johnson
SoC specific PFE macros are defined and structure ccsr_scfg is updated with members defined for PFE. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2017-10-11armv8: fsl-lsch2: initialize pfe gemacCalvin Johnson
Call gemac_initialize to initialize both gemacs of pfe. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2017-10-11board: freescale: ls1012a: enable network support on ls1012a platformsCalvin Johnson
Ethernet support on all three LS1012A platforms(FRDM, QDS and RDB) is enabled with this patch. eth.c files for all 3 platforms contain board ethernet initialization function and also function to reset phy. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2017-10-11drivers: net: pfe_eth: LS1012A PFE headersCalvin Johnson
Contains all the pfe header files. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2017-10-11drivers: net: pfe_eth: provide pfe commandsCalvin Johnson
pfe_command provides command line support for several features that support pfe like starting or stopping the pfe, checking the health of the processor engines and checking status of different unit inside pfe. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2017-10-11drivers: net: pfe_eth: LS1012A PFE driver introductionCalvin Johnson
This patch adds PFE driver into U-Boot. Following are the main driver files:- pfe.c: provides low level helper functions to initialize PFE internal processor engines and other hardware blocks. pfe_driver.c: provides probe functions, initialization functions and packet send and receive functions. pfe_eth.c: provides high level gemac, phy and mdio initialization functions. pfe_firmware.c: provides functions to load firmware into PFE internal processor engines. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2017-10-11armv8: fsl-layerscape: Add support of GPIO structurePrabhakar Kushwaha
Layerscape Gen2 SoC supports GPIO registers to control GPIO signals. Adding support of GPIO structure to access GPIO registers. Signed-off-by: Pratiyush Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2017-10-11driver: fsl-mc: memset pointers after mallocPrabhakar Kushwaha
Memory allocated via malloc is not guaranteed to be zeroized. So explicitly use calloc instead of malloc. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2017-10-11armv8: ls1088a: Update MC boot sequenceBogdan Purcareata
The MC boot sequence is contained in mc_env_boot. Update LS1088A boards to use this function, and hook it to reset_phy so that it's called late enough, after the ports have been initialized, for proper DPC / DPL fixup. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
2017-09-28arm64: ls2088ardb: Fix nor fall back option failureVinitha Pillai-B57223
Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
2017-09-28QE: Set QE_IRAM_READY after uploading firmwareZhao Qiang
QE_IRAM_READY should be set only after successfully uploading the firmware. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
2017-09-19armv8: ls1046aqds: Fix NAND offset for Fman ucode and envGong Qianyu
Fix a bug of 'commit 8104deb2d6b7 ("armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1046A")' as NAND block size is 256KB on LS1046AQDS. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
2017-09-19arm64: ls2088ardb: Fix kernel validation failureVinitha V Pillai
Add a variable $kernelheader_addr_r used in distroboot to validate kernel image as its absence caused kernel validation failure Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
2017-09-19armv8: ls1043ardb: disable PPA loading during SPL stage for SD bootYangbo Lu
PPA loading during SPL stage is not required for nornal SD boot scenario. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2017-09-19armv8: ls1046ardb: disable PPA loading during SPL stage for SD bootYangbo Lu
PPA loading during SPL stage is not required for nornal SD boot scenario. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2017-09-15armv8: fsl-layerscape: Fix some coding style problems in soc.cAlison Wang
This file has some coding style problems. Fix these to make the future updates easier. Signed-off-by: Alison Wang <alison.wang@nxp.com>
2017-09-13board/ls1088: Add fsl_fdt_fixup_flashAshish Kumar
IFC-NOR and QSPI-NOR signals are muxed on SoC to save pins Add fsl_fdt_fixup_flash() -To disable IFC-NOR node in dts if QSPI is enabled and vice-versa Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
2017-09-13ls1088aqds: Enable IFC and QIXIS in SPL imageSumit Garg
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
2017-09-11armv8: fsl-layerscape: Add back L3 flushing for all exception levelsYork Sun
CCN-504 HPF registers were believed to be accessible only from EL3. However, recent tests proved otherwise. Remove checking for exception level to re-enable L3 cache flushing for all levels. Signed-off-by: York Sun <york.sun@nxp.com> Tested-by: Zhao Qiang <qiang.zhao@nxp.com>
2017-09-11fsl-lsch2: csu: correct the workaround A-010315Hou Zhiqiang
The implementation of function set_pcie_ns_access() uses a wrong argument. The structure array ns_dev has a member 'ind' which is initialized by CSU_CSLX_*. It should use the 'ind' directly to address the PCIe's CSL register (CSL_base + CSU_CSLX_PCIE*). Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [YS: Revise commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11armv8/fsl-lsch2: correct QMAN clockHou Zhiqiang
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2017-09-11arm64: ls1012ardb: Add distro secure boot supportSumit Garg
Enable validation of boot.scr script prior to its execution dependent on "secureboot" flag in environment. Enable fall back option to qspi boot in case of secure boot. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
2017-09-08arm64: ls1012afrdm: Add distro boot supportRajesh Bhagat
Include common config_distro_defaults.h and config_distro_bootcmd.h for u-boot enviroments to support automatical distro boot which scan boot.scr from external storage devices(e.g. SD and USB) and execute autoboot script. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2017-09-08arm64: ls1012ardb: Add distro boot supportRajesh Bhagat
Include common config_distro_defaults.h and config_distro_bootcmd.h for u-boot enviroments to support automatical distro boot which scan boot.scr from external storage devices(e.g. SD and USB) and execute autoboot script. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2017-09-07board: common: vid: Move IR chip specific code in flagRajesh Bhagat
Moves IR chip (IR36021) specific code in flag to resolve compilation issue where it is not present. For example, LS1088A is having a new LTC3882 voltage chip. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2017-09-07board/ls2080ardb: Add mcmemsize variable in default envPriyanka Jain
For most of ls2080ardb use-cases, mc private DRAM block is required to be of 1.75GB. Hence set mcmemsize=0x70000000 in default env Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2017-09-07board/freescale: Share qbman init between archsAhmed Mansour
This patch adds changes necessary to move functionality present in PowerPC folders with ARM architectures that have DPAA1 QBMan hardware - Created new board/freescale/common/portals.c to house shared device tree fixups for DPAA1 devices with ARM and PowerPC cores - Added new header file to top includes directory to allow files in both architectures to grab the function prototypes - Port inhibit_portals() from PowerPC to ARM. This function is used in setup to disable interrupts on all QMan and BMan portals. It is needed because the interrupts are enabled by default for all portals including unused/uninitialised portals. When the kernel attempts to go to deep sleep the unused portals prevent it from doing so Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
2017-09-04arm64: ls1088ardb: Add distro secure boot supportPrabhakar Kushwaha
Enable validation of boot.scr script prior to its execution dependent on "secureboot" flag in environment. Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
2017-09-04arm64: ls2088ardb: Add distro secure boot supportVinitha Pillai-B57223
Enable validation of boot.scr script prior to its execution dependent on "secureboot" flag in environment. Also enable "secureboot=y" flag in environment for ARM based platforms instead of bootcmd. Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
2017-09-04ls1088a: Correct the channel number for LTC3882 voltage regulatorRajesh Bhagat
Corrects the channel number passed in i2c write operation for LTC3882 voltage regulator. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2017-09-04pci: layerscape: Fixup iommu-map for LS208xABharat Bhushan
"pci: layerscape: Fixup device tree node for ls2088a" added support for LS208xA devices but fixing iommu-map property is missing. This patch adds support for fixing iommu-map. Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
2017-09-04armv8: ls1012a: Memory Map modification of kernel,envBhaskar Upadhaya
This patch adjusts memory map for images on LS1012A as per below memory map: Image Flash Offset RCW+PBI 0x00000000 Boot firmware (U-Boot) 0x00100000 Boot firmware Environment 0x00300000 Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
2017-09-04armv8: ls1088a: Enable PCIe in defconfigsHou Zhiqiang
Enabled PCIe support and PCI command feature. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2017-09-04armv8: ls1088a: correct pcie fixup compatible stringHou Zhiqiang
LS1088A has the same PCIe controller as LS2088A, and the LS1088A used LS2088A PCIe compatible under Linux. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2017-09-04armv8: ls1088a: add PCIe dts nodeHou Zhiqiang
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2017-09-04armv8: ls1088a: fix the MMU table for pcie config spaceHou Zhiqiang
The pcie config space of ls1088a is different from ls2080a. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2017-09-03arm64: ls2080ardb: Add sd_bootcmd for distro fallback in case of sdbootShengzhou Liu
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
2017-09-03armv7: ls1021atwr: Add sd_bootcmd for distro fallback in case of sdbootShengzhou Liu
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
2017-09-03arm64: ls1046ardb: Add sd_bootcmd for distro fallback in case of sdbootShengzhou Liu
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
2017-09-03arm64: ls1043ardb: Add sd_bootcmd for distro fallback in case of sdbootShengzhou Liu
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
2017-09-03armv8: sec_firmware: Add support for loadables in FITSumit Garg
Enable support for loadables in SEC firmware FIT image. Currently support is added for single loadable image. Brief description of implementation: - Add two more address pointers (loadable_h, loadable_l) as arguments to sec_firmware_init() api. - Create new api: sec_firmware_checks_copy_loadable() to check if loadables node is present in SEC firmware FIT image. If present, verify loadable image and copies it to secure DDR memory. - Populate address pointers with secure DDR memory addresses where loadable is copied. Example use-case could be trusted OS (tee.bin) as loadables node in SEC firmware FIT image. Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
2017-09-03armv8: layerscape: Allocate 66 MB DDR for secure memorySumit Garg
Change DDR allocated for secure memory from 2 MB to 66 MB. This additional 64 MB secure memory is required for trusted OS running in Trusted Execution Environment using ARMv8 TrustZone. Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
2017-08-30armv8: fsl-layerscape: Fix final MMU table for QSPI and IFCSuresh Gupta
For QSPI and IFC addresses execution shouldn't be allowed when u-boot running from DDR. Revise the MMU final table to enforce execute-never bits. Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
2017-08-30ls1088a: Add VID support for QDS and RDB platformsPrabhakar Kushwaha
This patch adds the support for VID on LS1088AQDS and LS1088ARDB systems. It reads the fusesr register and changes the VDD accordingly by adjusting the voltage via LTC3882 regulator. This patch also takes care of the special case of 0.9V VDD is present in fusesr register. In that case,it also changes the SERDES voltage by disabling the SERDES, changing the SVDD and then re-enabling SERDES. Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2017-08-30board: common: vid: Add support for LTC3882 voltage regulator chipPrabhakar Kushwaha
Restructures common driver to support LTC3882 voltage regulator chip. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2017-08-30Kconfig: Add LTC3882 voltage regulator configPrabhakar Kushwaha
Adds below LTC3882 voltage regulator config: CONFIG_VOL_MONITOR_LTC3882_READ CONFIG_VOL_MONITOR_LTC3882_SET Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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