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2016-01-27ARM64: zynqmp: Add support for SD1 boot modeMichal Simek
SD1 boot mode is using different bootmode values. Add support for this mode used on DC1. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM64: zynqmp: Modify the SD and QSPI bootmode valuesSiva Durga Prasad Paladugu
Modify the SD bootmode value to 0x3 as per latest spec. Also add new boot mode QSPI 32 bit boot mode Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM64: zynqmp: DT: Fix UART compatible stringSoren Brinkmann
ZynqMP has r1p12 not r1p8. r1p12 contains break detection support. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM64: zynqmp: Correct the watchdog timer interrupt numberPunnaiah Choudary Kalluri
Corrected the watchdog timer interrupt number. Origin value was for CSUPMU watchdog. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM64: zynqmp: Fix coding style in phy nodeMichal Simek
Trivial fix. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM64: zynqmp: Add initial support for the first siliconMichal Simek
Add basic configuration for the first silicon. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM64: zynqmp: Use the same U-Boot version with/without ATFMichal Simek
Remove SECURE_IOU option which is not needed. U-Boot itself can detect which EL level it is on and based on that use do platform setup. It also simplify usage because one Kconfig entry is gone. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM64: zynqmp: Remove incorrect link to common config fileMichal Simek
Link to zynqmp common file is incorrect. Fix it by removing the whole link because it is visible from the file where to look at it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM64: zynqmp: ep: Define minimum sdhci frequency for epSiva Durga Prasad Paladugu
Define minimum sdhci frequency for ep, as not defining it causes the divisor to be 2048 as per sd version but keeping clock very low on ep causes command failures. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM: zynq: Move spi node to aligned locationMichal Simek
Keep nodes aligned. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM: zynq: Fix defconfig for zyboMichal Simek
Change possition of SPI_FLASH to by align with savedefconfig. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM: zynq: Fix all remaining zynq platform to use stdout-pathMichal Simek
Fix console setup for all remaining zynq boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM: zynq: Clean DTSI coding styleMichal Simek
Fix minor indentation problems. Signed-off-by: Michal Simek <monstr@monstr.eu> Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM: zynq: Move FLASH_BAR to KconfigMichal Simek
Clean up config and use Kconfig more. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM: zynq: Enable SPI_FLASH for zc770 xm013 platformMichal Simek
Enable SPI flash. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM: zynq: Define sys prompt for all Zynq boardsSiva Durga Prasad Paladugu
Define CONFIG_SYS_PROMPT for all Zynq boards It was removed by: "kconfig: add config option for shell prompt" (sha1: 181bd9dc61d2da88b78f1c1138a685dae39354d6) Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM: zynq: Do not select options if SPL is not enabledMichal Simek
Zynq setups some default options for SPL but not all targets are enabling SPL. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27ARM: zynq: Remove memory division by 2 for ECC caseMichal Simek
For ECC case u-boot divided memory by 2 because one u-boot could be used for both cases when ECC is off or on. Remove this division and make sure that dts file contain the correct memory size when ECC is enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27mmc: zynq_sdhci: Added qurik to disable high speedSiva Durga Prasad Paladugu
Add quirk to disable high speed incase the high speed was broken.This solves the issue where the the controller is used in High Speed Mode and the the hold time requirement for the JEDEC/MMC 4.41 specification is NOT met. This timing issue is not on all boards and hence provided config option to enable it when required. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Emil Lenchak <emill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27mmc: sdhci: Clear high speed if not supportedSiva Durga Prasad Paladugu
Clear high speed bit if it was not supported by the driver. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Emil Lenchak <emill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27sdhci: zynq: Remove hardcoded value zero as min frequencySiva Durga Prasad Paladugu
Remove hardcoded value zero as min frequency and use config option CONFIG_ZYNQ_SDHCI_MIN_FREQ defined in board config Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27net: zynq: Change MDC setup for arm64Michal Simek
MDC setting depends on pclk input clocks which varies across SoC. This driver is used by xilinx zynq and zynqmp SOC. Input clock frequence on silicon is 125MHz where divider 64 put frequency below 2.5MHz requires by spec (125/64=1.95). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27net: phy: ti: Enable automatic crossover modeMichal Simek
Enable automatic crossover cable detection. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27serial: zynq: Fix address reading from DMMichal Simek
Use dev_get_addr() instead of reading reg base directly in the driver. Core function is also more robust. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27serial: zynq: Extend compatible string listMichal Simek
ZynqMP is using updated core with cdns,uart-r1p12 compatible string. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27fpga: Fix compilation warningsMichal Simek
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27fpga: Add bitstream type BIT_NONESiva Durga Prasad Paladugu
Add bitstream type BIT_NONE to the bitstream type enum. This might be useful while loading bitstreams in respective drivers. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27fpga: xilinx: Check for substring in device ID validationSiva Durga Prasad Paladugu
Check for substrings in deviceID validation check so that it can support xa bitstreams also. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27microblaze: Fix board_init calling sequenceMichal Simek
board_init() is in final elf file but it is not called at all. Use board_init_late() instead and call gpio_init() from it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27microblaze: Enable HUSH via KconfigMichal Simek
Cleanup board file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27microblaze: Read information about RAM from DTMichal Simek
Do not setup ram start/size in board file. Read it from DT instead. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27microblaze: Remove empty file - cpu.cMichal Simek
No need to have empty unused file in architecture code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27microblaze: Move CONFIG_NETCONSOLE to KconfigMichal Simek
Cleanup board file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27microblaze: Remove CONFIG_FIT from board fileMichal Simek
And enable it via defconfig by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27microblaze: Remove systemace from board fileMichal Simek
Systemace is ancient IP which is not tested. Remove it from default configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27microblaze: Move eth configuration to KconfigMichal Simek
Cleanup board specific file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27microblaze: Enable axi emac via KconfigMichal Simek
Enable driver by default for all platforms. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27net: emaclite: Move emaclite to KconfigMichal Simek
Add PHYLIB and MII dependencies and enable it by default for Microblaze. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27net: emaclite: Let core to handle received packetMichal Simek
Pass pointer to core to handle packet. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27net: emaclite: Rename start and stop functionsMichal Simek
Rename start and stop functions to align with DM functions names. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27net: emaclite: Move driver to DMMichal Simek
Move driver to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27net: emaclite: Use indirect access in emaclite_recvMichal Simek
When IP is configured with pong buffers, IP is receiving packets to ping and then to pong buffer and than ping again. The original logic in the driver remains there that when ping buffer is free, pong buffer is checked too and return if both are free. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27net: emaclite: Use indirect reg access in sendMichal Simek
The original logic in the driver was exchanging buffers which are used for sending packet and tx_ping and tx_pong buffers were exchanged all the time to ensure that IP has enough time to send the packet out. Based on this "feature" send function was using nextbuffertouse variable to save which buffer should be used. Before this algorithm was called driver checked that there is free buffer available. This checking remains in the driver but driver tries to use tx_ping first if available. If not, tx_pong buffer is used instead. To reach this code the original condition is met that at least one of the buffer should be available. Testing doesn't show any performance drop when this patch is applied. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27net: emaclite: Remove XEL_TSR_XMIT_ACTIVE_MASK flagMichal Simek
This flag is not documented anywhere in the latest documentation that's why this patch removes it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27net: emaclite: Fix logic around available TX buffersMichal Simek
Simplify logic how to find out if there is free TX buffer. Both buffers are checked all the time that's why logic around order can be removed. Also add check when only one buffer is available. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27net: emaclite: Use indirect register access for TX resetMichal Simek
Move to use indirect register access when timeout expires for resetting TX buffers. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27net: emaclite: Use indirect register access for rx_ping/pongMichal Simek
Do initialization via indirect register access. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-27net: emaclite: Use indirect register access for tx_ping/pongMichal Simek
Do initialization via indirect register access. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27net: emaclite: Convert MDIO to use register offsetMichal Simek
Use u-boot coding style how to setup and access MDIO bus. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-27net: emaclite: Add MDIO support to driverMichal Simek
Add MDIO support before move to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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