Age | Commit message (Collapse) | Author |
|
Corrects the channel number passed in i2c write operation for
LTC3882 voltage regulator.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
|
|
"pci: layerscape: Fixup device tree node for ls2088a" added
support for LS208xA devices but fixing iommu-map property
is missing. This patch adds support for fixing iommu-map.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
|
|
This patch adjusts memory map for images on LS1012A
as per below memory map:
Image Flash Offset
RCW+PBI 0x00000000
Boot firmware (U-Boot) 0x00100000
Boot firmware Environment 0x00300000
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
|
|
Enabled PCIe support and PCI command feature.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
|
|
LS1088A has the same PCIe controller as LS2088A, and the LS1088A
used LS2088A PCIe compatible under Linux.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
|
|
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
|
|
The pcie config space of ls1088a is different from ls2080a.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
|
|
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
|
|
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
|
|
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
|
|
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
|
|
Enable support for loadables in SEC firmware FIT image. Currently support
is added for single loadable image.
Brief description of implementation:
- Add two more address pointers (loadable_h, loadable_l) as arguments to
sec_firmware_init() api.
- Create new api: sec_firmware_checks_copy_loadable() to check if loadables
node is present in SEC firmware FIT image. If present, verify loadable
image and copies it to secure DDR memory.
- Populate address pointers with secure DDR memory addresses where loadable
is copied.
Example use-case could be trusted OS (tee.bin) as loadables node in SEC
firmware FIT image.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
|
|
Change DDR allocated for secure memory from 2 MB to 66 MB. This additional
64 MB secure memory is required for trusted OS running in Trusted Execution
Environment using ARMv8 TrustZone.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
|
|
For QSPI and IFC addresses execution shouldn't be allowed
when u-boot running from DDR. Revise the MMU final table
to enforce execute-never bits.
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
|
|
This patch adds the support for VID on LS1088AQDS and LS1088ARDB systems.
It reads the fusesr register and changes the VDD accordingly by adjusting the
voltage via LTC3882 regulator.
This patch also takes care of the special case of 0.9V VDD is present in
fusesr register. In that case,it also changes the SERDES voltage by disabling
the SERDES, changing the SVDD and then re-enabling SERDES.
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
|
|
Restructures common driver to support LTC3882 voltage regulator
chip.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
|
|
Adds below LTC3882 voltage regulator config:
CONFIG_VOL_MONITOR_LTC3882_READ
CONFIG_VOL_MONITOR_LTC3882_SET
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
|
|
Moves IR chip (IR36021) specific code in flag to resolve
compilation issue where it is not present. For example,
LS1088A is having a new LTC3882 voltage chip.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
|
|
Adds a board specific API namely board_adjust_vdd which
is required to define the board VDD adjust settings.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
|
|
Adds below voltage values supported by LS1088A Soc:
1.025 V(default), 0.9875V, 0.9750 V, 0.9V, 1.0 V, 1.0125 V, 1.0250 V
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
|
|
Adds SERDES voltage and reset SERDES lanes API and makes
enable/disable DDR controller support 0.9V API common.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
|
|
According current code base, CONFIG_LS1012A should be
CONFIG_ARCH_LS1012A, or function fsl_fdt_disable(blob) will be
wrongly called to disable all dwc3 USB nodes on LS1012A, which
cause Linux USB function stop working at all.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
|
|
Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment. Enable fall back option to
qspi boot in case of secure boot. Also enable "secureboot=y" flag
in environment for ARM based platforms instead of bootcmd.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
|
|
Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment. Enable fall back option to
nor/qspi boot in case of secure boot. Also enable "secureboot=y"
flag in environment for ARM based platforms instead of bootcmd.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
|
|
The SP805-WDT module on LS1088A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
|
|
SEC must be initialised before PPA is validated, so
call sec_init() ahead of ppa_init().
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
|
|
Adds config CONFIG_FSL_LS_PPA and CONFIG_FSL_CAAM in
LS2080AQDS and LS2080ARDB secure boot defconfig.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
|
|
Add the secure boot defconfigs for QSPI boot on LS1088ARDB
and LS1088AQDS platforms.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
|
|
Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC phase
using esbc_validate command. Add images validation in default environment
under mcinitcmd prior to MC initialization.
Add header address for PPA to be validated during ESBC phase for LS1088A
platform based on LAyerscape Chasis 3.
Moves sec_init prior to ppa_init as for validation of PPA sec must
be initialised before the PPA is initialised.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
|
|
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
|
|
Using changes in this patch we were able to reduce approx 8k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1088a/Makefile to remove
compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1088a/ls1088a.c to keep
board_early_init_f funcations in case of SPL build.
3. Changes in ls1088a_common.h & ls1088ardb.h to remove driver
specific macros due to which static data was being compiled in
case of SPL build.
4. Enable CONFIG_SYS_DCACHE_OFF in case of SPL build as DCACHE is
not being enabled in case of SPL image but was compiled in to
add redundant code.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com
|
|
Using changes in this patch we were able to reduce approx 4k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Compile-off mp.c and libfdt.c in case of SPL build.
2. Keep MMU and DCACHE specific variable and functions under
CONFIG_SYS_DCACHE_OFF macro.
3. Compile-off IFC specific funtion call "init_early_memctl_regs"
in case of SPL build.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
|
|
Tested on ls1088ardb with automatically boot Ubuntu from SD
card or USB disk, if it fails to detect external storage disk,
fall back to qspi/sd boot.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Zhang Ying <zhangying@nxp.com>
|
|
As part of chain of trust with confidentiality along with distro
boot, linux kernel image needs to be stored in encrypted form on
ext4 boot partition. So enable CONFIG_CMD_EXT4_WRITE in case of
Secure boot.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
|
|
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
|
|
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
|
|
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
|
|
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
|
|
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
|
|
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
|
|
As per current implemenetation, default value of board env is
based on board filename i.e ls2080ardb.
With distro support changes, this env is used to decide upon
kernel dtb which is different for other SoCs (ls2088a, ls2081a)
combination supported with this board.
Add support to modify board env based on SoC type
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
|
|
It is recommended to check either controller is free to take
new spi action. The IP_ACC and AHB_ACC bits indicates that
the controller is busy in IP or AHB mode respectively.
And the BUSY bit indicates that controller is currently
busy handling a transaction to an external flash device
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
|
|
For some special reset times for longer pcie devices, in this case, the
pcie device may on polling compliance state, the RC considers the pcie
device is link up, but the pcie device is not link up, only the L0 state
is link up state. So add the link up status judgement mechanisms.
Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com>
|
|
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
|
|
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
|
|
Concatenation of u-boot-spl.bin and u-boot.img for NXP layerscape
platform SoC: LS1088A/LS2080A and their variants
This patch also depricates UBOOT_BINLOAD in favour of SPL_PAYLOAD
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
|
|
EC1 and EC2 are RGMII interface on ls1088aqds platform.
This patch add support of RGMII with PHY and MDIO
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
|
|
This patch adds support RGMII protocol
NXP's LDPAA2 support RGMII protocol. LS1088A is the
first Soc supporting both RGMII and SGMII.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
|
|
Even after memory free of phydev, priv is still pointing to the
obsolete address.
So update priv->phydev as NULL after memory free.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
|
|
This patch add support of LS1088AQDS platform.
The LS1088A QorIQTM Development System (QDS) is a
high-performance computing, evaluation, and
development platform that supports the LS1088A QorIQ Architecture
processor.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
|