Age | Commit message (Collapse) | Author |
|
Existing MC driver framework is based on MC-9.x.x flib. This patch
migrates MC obj (DPBP, DPNI, DPRC, DPMAC etc) to use latest MC flib
which is MC-10.3.0.
Changes introduced due to migration:
1. To get OBJ token, pair of create and open API replaces create APIs
2. Pair of close and destroy APIs replaces destroy APIs
3. For version read, get_version APIs replaces get_attributes APIs
4. dpni_get/reset_statistics APIs replaces dpni_get/set_counter APIs
5. Simplifies struct dpni_cfg and removes dpni_extended_cfg struct
6. Single API dpni_get_buffer_layout/set_buffer_layout replaces
dpni_get_rx/set_rx, tx related, tx_conf_buffer_layout related APIs.
New API takes a queue type as an argument.
7. Similarly dpni_get_queue/set_queue replaces
dpni_get_rx_flow/set_rx_flow , tx_flow related, tx_conf related
APIs
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Unset USE_BOOTCOMMAND for all ls1088 defconfig files to fix
redefinition error. USE_BOOTCOMMAND was introduced in commit
b6251db8c3f ("Kconfig: Introduce USE_BOOTCOMMAND and migrate
BOOTCOMMAND").
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Most predefined TLB tables don't have memory coherence bit set for
SDRAM. This wasn't an issue before invalidate_dcache_range() function
was enabled. Without the coherence bit, dcache invalidation doesn't
automatically flush the cache. The coherence bit is already set when
dynamic TLB table is used. For some boards with different SPL boot
method, or with legacy fixed setting, this bit needs to be set in
TLB files.
Signed-off-by: York Sun <york.sun@nxp.com>
|
|
This issue is exposed after commit 9000eddbae0d ("drivers/usb/ehci:
Use platform-specific accessors"), the wrong endianness of EHCI
controller programing will cause USB function down.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
This issue is exposed after commit 9000eddbae0d ("drivers/usb/ehci:
Use platform-specific accessors"), the wrong endianness of EHCI
controller programing will cause USB function down.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Typo fix: CONIFG->CONFIG
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
To page mapping the lowest 2 bits needs to be 0x3.
If not fix this, the final lowest 3 bits for page mapping is 0x1
which is marked as reserved.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
After relocation, when error happends, it is hard to track
ELR and LR with asm file objdumped from elf file.
So subtract the gd->reloc_off the reflect the compliation address.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Commit 72443c7f7d21 ("mtd: cfi: Add support for status register
polling") added a feature check to determine if status register
is available for certain flash chips. The "lower software bits"
register used to determine this feature is not backward compati-
ble. Older flash chips without this feature has reserved value
0xff. Instead of checking "lower software bits" register, use
CFI primary vendor-specific extended query. Since CFI version
1.4, software features can be read from offset 0x53 according to
document AN201168 from Cypress.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
|
|
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Update help message for "mac" command to reflect correct descriptions
and parameters.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Value provided in MC_MEM_SIZE_ENV_VAR is in hex. Use 16 as base
in simple_strtoul.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Distro boot support gives flexibility to run distro RFS like Ubuntu
being deployed from SD card or SATA drive. If it fails to detect
external storage, fall back to qspi/sd boot.
Enable this by default in RDB's defconfig by selecting
CONFIG_DISTRO_DEFAULTS
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Zhang Ying <zhangying@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Currently the chipselect used to identify the corresponding NAND chip
is stored at the controller and only set during fsl_ifc_chip_init().
This way, only the last NAND chip is working, as the previous value
of cs_nand gets overwritten.
In order to solve this issue the chipselect is computed on demand by
evaluating the bank variable. Thus, the correct chipselect for each
NAND chip operation is used.
Tested on hardware with two NAND chips connected to the IFC
controller.
Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
Acked-by: Scott Wood <oss@buserror.net>
[YS: reformatted commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
The zero value returned from qbman_swp_acquire() is an error
condition meaning no free buffer for allocation.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Kushwaha Prabhakar <prabhakar@freescale.com>
[YS: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Signed-off-by: Tom Rini <trini@konsulko.com>
|
|
This reverts commit c61d0009feb966e0e93254a8c435a1889085e6b8.
A tbs2910 board user reported a very slow console frambuffer as
regression in current u-boot. I could bisect this down to the
above mentioned commit.
This revert brings back the fast framebuffer console (one
cache flush per string in puts(), not after each char).
Reported-by: Uwe Scheffler <scheffler.u@web.de>
Signed-off-by: Soeren Moch <smoch@web.de>
Tested-by: Uwe Scheffler <scheffler.u@web.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
|
|
The eMMC is 1V8 device only and the signaling is always 1V8,
fix the DT for Salvator-X/XS to describe the hardware correctly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
|
|
|
After updating u-boot from v2016.01 to 2017.09, issue with
"SATA link 0 timeout." on my Cubietruck board.
mdelay milled after moving satapwr code to board.
"sunxi: Turn satapwr on from board_init"
(sha1: 9fbb0c3aa49f4604b0342cb527a6bd099f92eaeb)
After adding the "mdelay(500);"
line that was lost in the path the error is gone.
Signed-off-by: Werner Böllmann <Werner.Boellmann@fh-dortmund.de>
[Rebased and updated change and commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
|
|
Only the H3/H5 SoCs have an internal PHY and its related clock and
reset controls.
Use an #ifdef to guard the internal PHY control code block so it
can be built for other SoCs, such as the A83T or A64.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
|
|
|
|
Update the falcon offsets for args to 16MB and kernel to 17MB
Since the below commit updated U-Boot proper location along
with rockchip boot image offsets
"spl: set SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x4000 for rockchip"
(sha1: 8f4d62b403db45dfa8b1cadb9da9096c79b7df47)
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
|
This patch fixed U-Boot proper location has been
missed to update in bewlo commit
"rockchip: doc: update U-Boot location info"
(sha1: 73e6dbe855f357a8330cfd53ff3033303611c1ad)
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
|
The U-Boot location has been moved to block 16384.
This is 8MB, not 4MB.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
|
|
|
|
|
Signed-off-by: Lukasz Majewski <lukma@denx.de>
|
|
Signed-off-by: Lukasz Majewski <lukma@denx.de>
|
|
Signed-off-by: Lukasz Majewski <lukma@denx.de>
|
|
This commit provides support for LWN's IMX6Q based DISPLAY5 board.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
|
|
This commit provides generic function to set the RGMII/HSIC IO voltage
level on iMX6 devices.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
|
|
The sys_proto.h file has been included earlier in this file.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
|
|
due misnaming of CONFIG_SUN4I_EMAC in include/configs/sunxi-common.h,
likely missed in:
commit 3146f0c017df ("Move PHYLIB to Kconfig")
Signed-off-by: Artturi Alm <artturi.alm@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
|
|
fixes CONFIG_SUNXI_EMAC references from drivers/net/Makefile and
include/configs/sunxi-common.h likely forgotten in:
commit abc3e4df59f5 ("sunxi: Convert SUNXI_EMAC to Kconfig")
Signed-off-by: Artturi Alm <artturi.alm@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
|
|
The following error has been observed on i.MX25 with a high-speed SDSC
card:
Data Write Failed in PIO Mode.
It was caused by the timeout set on PRSSTAT.BWEN, which was triggered
because this bit takes 15 ms to be set after writing the first block to
DATPORT with this card. Without this timeout, all the blocks are
properly written.
This timeout was implemented by decrementing a variable, so it was
depending on the CPU frequency. Fix this issue by setting this timeout
to a long enough absolute duration (500 ms).
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
|
|
- Update newly added include/configs file in MAINTAINERS
- Update newly added defconfig file in README
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
|
|
When a high speed card is connected to mx51evk the following error is seen:
U-Boot 2017.11-rc2 (Oct 18 2017 - 13:49:26 -0200)
CPU: Freescale i.MX51 rev3.0 at 800 MHz
Reset cause: POR
Board: MX51EVK
DRAM: 512 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
*** Warning - read failed, using default environment
In: serial
Out: serial
Err: serial
Net: FEC
Hit any key to stop autoboot: 0
=> saveenv
Saving Environment to MMC...
Writing to MMC(0)... failed
The root cause for the failure is the eSDHC-A001 erratum:
"eSDHC-A001 : Data timeout counter (SYSCTL[DTOCV]) is not reliable for
values of 0x4,0x8, and 0xC" that is listed
on some PowerArchitecture chips:
https://www.nxp.com/files-static/32bit/doc/errata/MPC8379ECE.pdf
Even though eSDHC-A001 is not documented on the i.MX51 errata document,
I have confirmed with the NXP design team that this erratum does affect
i.MX51, so fix the problem by selecting SYS_FSL_ERRATUM_ESDHC_A001
at SoC level.
The i.MX51 ts4800 board already selects this option, but it is better
to move this selection to the i.MX51 SoC level instead.
Successfully tested with a high speed SD card on a mx51evk board.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
|
|
When a high speed card is connected to mx25 the following error is seen:
U-Boot 2017.11-rc2-00104-gb79372a (Oct 31 2017 - 11:02:22 -0200)
CPU: Freescale i.MX25 rev1.2 at 399 MHz
Reset cause: POR
Board: MX25PDK
I2C: ready
DRAM: 64 MiB
No arch specific invalidate_icache_all available!
MMC: FSL_SDHC: 0
*** Warning - read failed, using default environment
In: serial
Out: serial
Err: serial
Net: FEC
Hit any key to stop autoboot: 0
=> saveenv
Saving Environment to MMC...
Writing to MMC(0)... failed
, which prevents any usage of the SD card.
The root cause for the failure is the eSDHC-A001 erratum:
"eSDHC-A001 : Data timeout counter (SYSCTL[DTOCV]) is not reliable for
values of 0x4,0x8, and 0xC" that is listed
on some PowerArchitecture chips:
https://www.nxp.com/files-static/32bit/doc/errata/MPC8379ECE.pdf
Even though eSDHC-A001 is not documented on the i.MX25 errata document,
I have confirmed with the NXP design team that this erratum does affect
i.MX25, so fix the problem by selecting SYS_FSL_ERRATUM_ESDHC_A001
at SoC level.
Successfully tested with a high speed SD card on a mx25pdk board.
Suggested-by: Benoît Thébaudeau <benoit@wsystem.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Tested-by: Otavio Salvador <otavio@ossystems.com.br> # mx25pdk
|
|
The motivation for moving MX25 selection to Kconfig is to be
able to better handle MX25 specific errata, so that an errata option
can be selected at SoC level instead of board level.
This selection method also aligns with the way other i.MX SoCs are
selected in U-Boot.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
|
|
Use default value 0x4000 for SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR instead
of define a new one.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|