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2017-06-09patman: encode CC list to UTF-8Philipp Tomsich
This change encodes the CC list to UTF-8 to avoid failures on maintainer-addresses that include non-ASCII characters (observed on Debian 7.11 with Python 2.7.3). Without this, I get the following failure: Traceback (most recent call last): File "tools/patman/patman", line 159, in <module> options.add_maintainers) File "[snip]/u-boot/tools/patman/series.py", line 234, in MakeCcFile print(commit.patch, ', '.join(set(list)), file=fd) UnicodeEncodeError: 'ascii' codec can't encode character u'\xfc' in position 81: ordinal not in range(128) from Heiko's email address: [..., u'"Heiko St\xfcbner" <heiko@sntech.de>', ...] While with this change added this encodes to: "=?UTF-8?q?Heiko=20St=C3=BCbner?= <heiko@sntech.de>" Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-09buildman: Fix bloat option when 'new' only drops functionsTom Rini
In the case where a new build only decreases sizes and does not increase any size we still want to report what functions have been dropped when doing a bloat comparison. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-09sandbox: Fix comparison of unsigned enum expression warningTom Rini
In os_dirent_get_typename() we are checking that type falls within the known values of the enum os_dirent_t. With clang-3.8 testing this value as being >= 0 results in a warning as it will always be true. This assumes of course that we are only given valid data. Given that we want to sanity check the input, we change this to check that it falls within the range of the first to the last entry in the given enum. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-08Merge git://git.denx.de/u-boot-rockchipTom Rini
Here is additional rk3368 and rk3399 support, rv1108 support, refactoring HDMI video (brought in from Anatolij's tree to resolve conflicts), some mkimage fixes and a few other things.
2017-06-08rockchip: board: puma_rk3399: enable BMP_16BPP, BMP_24BPP and BMP_32BPPPhilipp Tomsich
With video output support for the RK3399-Q7 (Puma) available, we want CMD_BMP enabled and the support for 16bit, 24bit and 32bit BMPs defined. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Version-changes: 2 - enable SYS_WHITE_ON_BLACK via defconfig Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-08rockchip: video: rk_vop: add grf fieldPhilipp Tomsich
The last set of rebases had dropped the 'grf' field from the common rk_vop. Add this back to un-break the build (and driver). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-08rockchip: video: rk3399: add HDMI TX support on the RK3399Philipp Tomsich
This commit enables the RK3399 HDMI TX, which is very similar to the one found on the RK3288. As requested by Simon, this splits the HDMI driver into a SOC-specific portion (rk3399_hdmi.c, rk3288_hdmi.c) and a common portion (rk_hdmi.c). Note that the I2C communication for reading the EDID works well with the default settings, but does not with the alternate settings used on the RK3288... this configuration aspect is reflected by the driverdata for the RK3399 driver. Having some sort of DTS-based configuration for the regulator dependencies would be nice for the future, but for now we simply use lists of regulator names (also via driverdata) that we probe. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-08rockchip: video: split RK3288-specific part off from rk_hdmiPhilipp Tomsich
To prepare for the addition of RK3399 HDMI support, the HDMI driver is refactored and broken into a chip-specific and a generic part. This change adds the internal interfaces, makes common/reusable functions externally visible and splits the RK3288 driver into a separate file. For the probing of regulators, we reuse the infrastructure created during the VOP refactoring... i.e. we simply call into the helper function defined for the VOP. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-08rockchip: video: add mpixelclock settings from Linux driverPhilipp Tomsich
The Linux driver now supports higher mpixelclock settings. Add these to rockchip_phy_config[] and rockchip_mpll_cfg[]. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-08rockchip: video: rk3399: enable HDMI output (from the rk_vop) for the RK3399Philipp Tomsich
This commit adds a driver for the RK3399 VOPs capable and all the necessary plumbing to feed the HDMI encoder. For the VOP-big, this correctly tracks the ability to feed 10bit RGB data to the encoder. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-08rockchip: video: refactor rk_vop and split RK3288-specific code offPhilipp Tomsich
To prepare for adding the RK3399 VOP driver (which shares most of its registers and config logic with the RK3228 VOP), this change refactors the driver and splits the RK3288-specific driver off. The changes in detail are: - introduces a data-structure for chip-specific drivers to register features/callbacks with the common driver: at this time, this is limited to a callback for setting the pin polarities (between the VOP and the encoder modules) and a flag to signal 10bit RGB capability - refactors the probing of regulators into a helper function that can take a list of regulator names to probe and autoset - moves the priv data-structure into a (common) header file to be used by the chip-specific drivers to provide base addresses to the common driver - uses a callback into the chip-specific driver to set pin polarities (replacing the direct register accesses previously used) - splits enabling the output (towards an encoder) into a separate help function withint the common driver Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-08rockchip: video: Kconfig: set MAX_XRES and MAX_YRES via KconfigPhilipp Tomsich
This introduces two new Kconfig options that configure the maximum allowable framebuffer size (i.e. the memory reservation/allocation for the framebuffer): - VIDEO_ROCKCHIP_MAX_XRES - VIDEO_ROCKCHIP_MAX_YRES The resulting memory allocation will cover 4 byte per pixel for these resolutions. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-08rockchip: video: Kconfig: reformat help for VIDEO_ROCKCHIPPhilipp Tomsich
For consistency sake (and as we are about to add new options to this file), reformat the help for VIDEO_ROCKCHIP. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-08rockchip: defconfig: puma-rk3399: enable SPL_BOARD_INITPhilipp Tomsich
For the RK3399-Q7, we need spl_board_init to be called during SPL startup to set up the pinmux for the debug UART. Enable SPL_BOARD_INIT via defconfig to ensure this function is in fact called. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-08rockchip: rk3288: grf: Fix shift for RK3288_TXCLK_DLY_ENA_GMAC_ENABLERomain Perier
RK3288_TXCLK_DLY_ENA_GMAC_ENABLE, in GRF_SOC_CON3, is supposed to be bit 0xe and not 0xf. Otherwise, it is RGMII RX clock delayline enable and introduces random delays and data lose. This commit fixes the issue by replacing RK3288_TXCLK_DLY_ENA_GMAC_ENABLE with the right shift. Signed-off-by: Romain Perier <romain.perier@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-08rockchip: dts: rk3399-puma: add DTS for the DDR3-1866 timingPhilipp Tomsich
This adds the DDR3-1866 timing via its own DTS and wires it up. This (currently) is not the default timing for the RK3399-Q7 and should be selected explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-06-08rockchip: dts: rk3399-puma: add DTS for the DDR3-1333 timingPhilipp Tomsich
This adds the DDR3-1333 timing via its own DTS and wires it up. This is not the default timing for the RK3399-Q7 and should be selected explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-06-08rockchip: dts: rk3399-puma: refactor and rename (default) DDR3-1600 DTSPhilipp Tomsich
To better support different RAM timings (DDR3-1333 and DDR3-1866 are assembly options for the RK3399-Q7), this refactors the DTS support and renames the default DTS variant from rk3399-puma to rk3399-puma-ddr1600: - changes the rk3399-puma DTS into a board-specific DTSI by removing the inclusion of the DRAM timings - adds a new rk3399-puma-ddr1600.dts, which includes the (new) common board DTSI and the DDR3-1600 timing DTSI - wires this up from arch/arm/dts/Makefile and configs/puma-rk3399_defconfig Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-06-08rockchip: dts: rk3399-puma: sync DTS with Linux treePhilipp Tomsich
The Linux DTS for the RK3399-Q7 has moved with the times... resync against it to ensure a consistent configuration. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-08rockchip: dts: rk3399: enable HDMI output in the DTSPhilipp Tomsich
This commit enables HDMI output in the DTS by adding the necessary nodes to vopl/vopb and by adding the HDMI node. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-08usb: dwc2-otg: make regs_otg (in platdata) a uintptr_tPhilipp Tomsich
The regs_otg field in uintptr_t of the platform data structure for dwc2-otg has thus far been an unsigned int, but will eventually be casted into a void*. This raises the following error with GCC 6.3 and buildman: ../drivers/usb/gadget/dwc2_udc_otg.c: In function 'dwc2_udc_probe': ../drivers/usb/gadget/dwc2_udc_otg.c:821:8: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] reg = (struct dwc2_usbotg_reg *)pdata->regs_otg; ^ This changes regs_otg to a uintptr_t to ensure that it is large enough to hold any valid pointer (and fix the associated warning). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-08rockchip: defconfig: puma-rk3399: update defconfig with video-supportPhilipp Tomsich
With HDMI output for the RK3399 working, this update the RK3399-Q7 (Puma) defconfig for the new functionality: 1. enables PMIC command (to check if the HDMI voltages are correct) +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y 2. enables video-output (via HDMI) +CONFIG_DM_VIDEO=y +CONFIG_DISPLAY=y +CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y 3. turns on the 'dcache'-command (for a dcache flush) for our QA to fill the framebuffer using 'mw.l' +CONFIG_CMD_CACHE=y 4. turns on the 'bmp'-command +CONFIG_CMD_BMP=y Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
2017-06-08rockchip: video: rk_hdmi: fix implicit definition warningsPhilipp Tomsich
When enabling CONFIG_DISPLAY_ROCKCHIP_HDMI, compile-time warning for the following implicitly defined functions are raised due to a missing include directive: drivers/video/rockchip/rk_hdmi.c: In function 'rk_hdmi_probe': drivers/video/rockchip/rk_hdmi.c:150:2: warning: implicit declaration of function 'rk_setreg' [-Wimplicit-function-declaration] rk_setreg(&priv->grf->soc_con6, 1 << 15); ^~~~~~~~~ drivers/video/rockchip/rk_hdmi.c:153:2: warning: implicit declaration of function 'rk_clrsetreg' [-Wimplicit-function-declaration] rk_clrsetreg(&priv->grf->soc_con6, 1 << 4, ^~~~~~~~~~~~ This change fixes this by including <asm/hardware.h> in rk_hdmi.c. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-06-08rockchip: rk3328: don't implement usb_gadget_handle_interrupts twicePhilipp Tomsich
The usb_gadget_handle_interrupts()-function is already implemented by drivers/usb/gadget/dwc2_udc_otg.c, so we need to avoid defining it in the evb-rk3328.c board-specific file. This change fixes the following build error (from buildman): drivers/usb/gadget/built-in.o: In function `usb_gadget_handle_interrupts': build/../drivers/usb/gadget/dwc2_udc_otg.c:850: multiple definition of `usb_gadget_handle_interrupts' board/rockchip/evb_rk3328/built-in.o:build/../board/rockchip/evb_rk3328/evb-rk3328.c:37: first defined here make[1]: *** [u-boot] Error 1 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: usb: host: xhci-rockchip: add support for rk3328Meng Dongyang
Add the compatible "rockchip,rk3328-xhci" in match table for rk3328 to probe xhci controller. Use fixed regulator to control the voltage of vbus and turn off vbus when usb stop. Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: Add basic support for evb-rv1108 boardAndy Yan
Add basic support for rv1108 evb, whith this patch we can boot into u-boot console. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: Add core Soc start-up code for rv1108Andy Yan
RV1108 is embedded with an ARM Cortex-A7 single core and a DSP core from Rockchip. It is designed for varies application scenario such as car DVR, sports DV, secure camera and UAV camera. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: clk: Add rv1108 clock driverAndy Yan
Add clock driver support for Rockchip rv1108 soc Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: pinctrl: Add rv1108 pinctrl driverAndy Yan
Add pinctrl support for Rockchip rv1108 soc Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: mkimage: Add support for RV1108Andy Yan
Add support to mkimage for rv1108 soc, the max spl code size for rv1108 is 6kb, and the spl code should be packed by rksd, wether boot from emmc or spi nor flash. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: defconfig: puma-rk3399: do not filter clock-names for SPLPhilipp Tomsich
For the RK3399-Q7 module, we use full OF_CONTROL (i.e. not OF_PLATDATA) for SPL. In this configuration, the rockchip_dw_mmc driver retrieves one of its clocks via clk_get_by_name and fails if this is not possible. For this reason, we can not filter clock-names from the device-tree nodes used for the configuration of the SPL stage. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: defconfig: puma-rk3399: enable I2CPhilipp Tomsich
The RK3399-Q7 exposes I2C on its edge connector and uses it as one of the interfaces towards the on-module STM32 (for the emulated RTC and fan-controller). Enable I2C and CMD_I2C support in the defconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: defconfig: puma-rk3399: enable CONFIG_PHY_MICREL_KSZ9031Philipp Tomsich
The RK3399-Q7 has a KSZ9031 GbE PHY. Enable support for it in defconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: defconfig: puma-rk3399: enable RK808 supportPhilipp Tomsich
On the RK3399-Q7, we need PMIC support (for the RK808) to enable HDMI output, as one of the required powerrails is not enabled on boot. For this, we need to enable the RK808 driver. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Version-changes: 3 - With the recent upstream changes to the RK808 (PMIC) driver, the associated configuration options have been renamed to RK8XX. Track this change in the RK3399-Q7 defconfig. Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3399-puma: set spl-payload-offsetKlaus Goger
defines the spl-payload to 256k (0x40000) Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3399-puma: release reset of on-module USB3 hub via vbus-gpioPhilipp Tomsich
On the RK3399-Q7, the on-module USB3 hub is held in reset at boot-up to save power and needs to be woken up using GPIO4A3. Note that this is not a negated reset-signal (due to a level shifter being needed for this signal anyway), but a negated enable-signal: to enable, we need to output LOW (i.e. 0)... so we mark this as an ACTIVE_LOW signal. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3399-puma: make the debug serial dm-pre-relocPhilipp Tomsich
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3399-puma: Add DDR3-1866 timingsPhilipp Tomsich
With the validation done for DDR3-1866 (i.e. 933 MHz bus clock), we can now add the timings (rk3399-sdram-ddr3-1866.dtsi) for boards built with the DDR3-1866 option. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: arm64: rk3399: support DDR3-1866 (i.e. 933MHz clock)Philipp Tomsich
The RK3399 is capable of driving DDR3 at 933MHz (i.e. DDR3-1866), if the PCB layout permits and appropriate memory timings are used. This changes the sanity checks to allow a DTS to request DDR3-1866 operation. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2017-06-07rockchip: arm64: rk3399: revise timeout-handling for DRAM PHY lockPhilipp Tomsich
Revise the loop watching for a timeout on obtaining a DRAM PHY lock to clearly state a timeout in milliseconds and use get_timer (based on the ARMv8 architected timer) to detect a timeout. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: mkimage: set init_boot_size to avoid confusing the boot ROMPhilipp Tomsich
This change restores the earlier setting of init_boot_size to include the maximum area covered by the the boot ROM of each chip for resolve issues with back-to-bootrom functionality reported by Kever and Heiko. To ensure that we don't run into the same issue again in the future, I have updated the comments accordingly and added a reference to the mailing list archive (there's some very helpful info from Andy Yan that provides background on the BootROM requirements regarding these fields). See https://lists.denx.de/pipermail/u-boot/2017-May/293267.html for some background (by Andy Yan) of how the BootROM processes this field. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: mkimage: force 2KB alignment for init_sizePhilipp Tomsich
The Rockchip BootROM relies on init_size being aligned to 2KB (see https://lists.denx.de/pipermail/u-boot/2017-May/293268.html). This pads the image to 2KB both for SD card images and SPI images and uses a common symbolic constant for the alignment. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: mkimage: add support for verify_header/print_headerPhilipp Tomsich
The rockchip image generation was previously missing the ability to verify the generated header (and dump the image-type) without having to resort to hexdump or od. Experience in our testing has showed it to be very easy to get the rkspi and rksd images mixed up and the lab... so we add the necessary support to have dumpimage tell us what image type we're dealing with. This change set adds the verify_header and print_header capability to the rksd/rkspi image drivers (through shared code in rkcommon). As of now, we only support images fully that are not RC4-encoded for the SPL payload (i.e. header1 and payload). For RC4-encoded payloads, the outer header (header0) is checked, but no detection of whether this is a SD/MMC or SPI formatted payload takes place. The output of dumpsys now prints the image type (spl_hdr), whether it is a SD/MMC or SPI image, and the (padded) size of the image: $ ./tools/dumpimage -l ./spl.img Image Type: Rockchip RK33 (SD/MMC) boot image ^^^^^^ SD/MMC vs. SPI indication ^^^^ spl_hdr indicated by the image Data Size: 79872 bytes Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: evb-rk3328: update board maintainerKever Yang
Update maintainer to Kever Yang for William Zhang is not work for this board now. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07MAINTAINERS: rockchip: add board/rockchip as maintained entryKever Yang
Directory board/rockchip/ are all boards for Rockchip SoCs, so add it to maintained entry. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07MAINTAINERS: git-mailrc: update maintainer for RockchipKever Yang
Send patch to Kever Yang instead of Lin Huang for Rockchip patches, for Lin is not always working on upstream U-Boot. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Changed , to : in subject: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3328: support and enable xhciMeng Dongyang
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07configs: rk3328: config xhci controllerMeng Dongyang
Add config of max root ports and add config to enable xhci controller. Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: dts: rk3328: add ehci and ohci node and enable host0 portMeng Dongyang
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07configs: rk3328: add support for usb and config ehci and ohci driverMeng Dongyang
Add defconfig for usb and ehci and ohci controller, config maximal number of ports of the root hub for ohci driver. Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>