Age | Commit message (Collapse) | Author |
|
Reset support
BSP autoconfig support
|
|
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
adding support for Xilinx ML401
|
|
|
|
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
|
|
|
|
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
|
|
|
|
Now the AMCC eval boards Yosemite (440EP) and Yellowstone (440GR)
share one config file and all board specific files. This way we
don't have to maintain two different sets of files for nearly
identical boards.
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
|
|
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
|
|
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
|
|
Some code cleanup.
|
|
|
|
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|
- use CFI driver (replaces custom flash driver) for main 'cam5200' target
- add second build target 'cam5200_niosflash' which still uses custom driver
|
|
|
|
|
|
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|
|
|
|
|
|
|
This patch adds support for the Prodrive P3M750 (PPC750 & MV64460)
and the P3M7448 (MPC7448 & MV64460) PMC modules. Both modules are
quite similar and share the same board directory "prodrive/p3mx"
and the same config file "p3mx.h".
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
|
|
|
|
this patch adds support for the QUICC Engine based UCC gigabit ethernet device.
|
|
Add support for the Freescale MPC8360EMDS board.
Includes DDR, DUART, Local Bus, PCI.
|
|
PREREQUISITE PATCHES:
* This patch can only be applied after the following patches have been applied:
1) DNX#2006090742000024 "Add support for multiple I2C buses"
2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x"
3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c"
4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems"
5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems"
CHANGELOG:
* Add support for the Freescale MPC8349E-mITX reference design platform.
The second TSEC (Vitesse 7385 switch) is not supported at this time.
Signed-off-by: Timur Tabi <timur@freescale.com>
|
|
Removed unused file resetvec.S for mpc83xx cpu
Signed-off-by: Tanya Jiang <tanya.jiang@freescale.com>
|
|
|
|
|
|
|
|
to a TSEC (e.g. a switch is connected via RMII) or
if the PHY is defective/incorrectly configured.
Signed-off-by: Ben Warren <bwarren@qstreams.com>
|
|
|
|
Add atstk1002_config target to Makefile and move the AVR32 section
down below Blackfin so that it doesn't end up in the middle of
MIPS.
Drop the autogenerated linker script thing for now. Will have to
revisit how to handle chips with different flash and RAM layout
later.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
|
|
Merge with /home/sr/git/u-boot/4xx-idcr
|
|
(use "make CHANGELOG" to update it from time to time)
|
|
|
|
|
|
Patch by Haavard Skinnemoen, 06 Sep 2006
This patch adds support for the AT32AP CPU family and the AT32AP7000
chip, which is the first chip implementing the AVR32 architecture.
The AT32AP CPU core is a high-performance implementation featuring a
7-stage pipeline, separate instruction- and data caches, and a MMU.
For more information, please see the "AVR32 AP Technical Reference":
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
In addition to this, the AT32AP7000 chip comes with a large set of
integrated peripherals, many of which are shared with the AT91 series
of ARM-based microcontrollers from Atmel. Full data sheet is
available here:
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
|
|
Patch by Haavard Skinnemoen, 6 Sep 2006 16:23:02 +0200
This patch adds common infrastructure code for the Atmel AVR32
architecture. See doc/README.AVR32 for details.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
|
|
|
|
|
|
|
|
|
|
|