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The watchdog clock node is missing.
Add the same. This solves the below error.
cdns-wdt fd4d0000.watchdog: input clock not found
cdns-wdt: probe of fd4d0000.watchdog failed with error -2
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Zynqmp DMA driver expects two clocks (main clock and apb clock)
LPDDMA clock cofiguration is missing for the same in the
zynqmp-clk.dtsi file.
This patch updates for the same.
Reported-by: Sai Pavan Boddu <saipava@xilinx.com>
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Serial driver is getting clk information via DT that's why
also clk node needs to have this flag.
Different behavior was introduced by:
"dm: Use dm_scan_fdt_dev() directly where possible"
(sha1: 911954859d6dece49c3e4835faea004cfe392506)
where simple-bus driver starts to call dm_scan_fdt_dev() which has
additional logic around pre_reloc_only parameter which exclude
clk nodes.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Add new board support.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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