| Age | Commit message (Collapse) | Author |
|---|
|
Enable SD1 and qspi for picozed board.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
The information currently set via platdata has to be represented in the
device tree now. bcm283x-uboot.dtsi adds the u-boot specific "skip-init"
property to the serial nodes and enables initialization in the pre-reloc phase.
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
This patch adds device trees for the bcm283x platform to be used with
OF_CONTROL. The version 4.8-rc7 of the linux kernel was used as source.
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Add board support for sun8i_r16 Nintendo NES Classic edition.
Signed-off-by: FUKAUMI Naoki <naobsd@gmail.com>
[jagan: Add commit message body]
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
|
|
|
|
This adds support for the Asus Chromebook Flip, an RK3288-based clamshell
device which can flip into 'tablet' mode. The device tree file comes from
Linux v4.8. The SDRAM parameters are for 4GB Samsung LPDDR3.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
This adds support for the Asus Chromebit, and RK3288-based device designed
to plug directly into an HDMI monitor. The device tree file comes from
Linux v4.8.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
The SDRAM settings are not common across all veyron models. Move the
current settings into Jerry's file.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
At present we have a single rk3288-based Chromebook: chromebook_jerry. But
all such Chromebooks can use the same binary with only device-tree
differences. The family name is 'veyron', so rename the files accordingly.
Also update the device-tree filename since this currently differs from
Linux.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
Check whether a display device is in use before using it. Add a comment as
to why two displays cannot currently be used at the same time.
This allows us to remove the device-tree change that disables vopb on
jerry.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
add fix regulator node for usb vbus power control.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
|
Sort rk3036 before rk3288.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Simon Glass <sjg@chromium.org>
|
|
LPUART0 is used by default, and it's using platform clock.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
The patch adds support for Freescale ls1021a-iot board.
Signed-off-by: Feng Li <feng.li_2@nxp.com>
[YS: rewrite commit message, fix whitespace in Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Adding prefetchable memory space to pcie device tree node.
Shifting configuration space to 64-bit address space.
Removing pcie device tree node from amba as it requires size-cells=<2>
in order to access 64-bit address space.
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Zynqmp DMA driver expects two clocks (main clock and apb clock)
For LPDDMA channels the two clocks are missing in the
Dma node resulting probe failure.
xilinx-zynqmp-dma ffa80000.dma: main clock not found.
xilinx-zynqmp-dma ffa80000.dma: Probing channel failed
xilinx-zynqmp-dma: probe of ffa80000.dma failed with error -2
This patch fixes this issue.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
LPDDMA default allows only secured access.
inorder to enable these dma channels,
one should ensure that it allows non secure access.
This patch updates the same.
Reported-by: Sai Pavan Boddu <saipava@xilinx.com>
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Use 64bit size cell for main amba bus instead of 32bit because PCIe
node requires it Change 64bit sizes also for all others IPs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
This patch adds ocm controller node in zynqmp.dtsi.
needed for OCM edac support.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
This patch adds the ZynqMP GT core device-tree properties for
zynqmp.dtsi file.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Tested-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
This reverts commit bd750e7a6c515c081b72d4ef108a2bfa691a3fd1
Implemented the new workaround for auto tuning based on
zynqmp compatible string, so removed the 'broken-tuning'
property.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
This patch changes the compatible string for sdhci node,
adds "xlnx,device_id" and "xlnx,mio_bank" property to sdhci node.
Signed-off-by: Sai Krishna Potthuri <lakshmis@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Add SMMU description for all tested IPs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Add support for zynqmp fpga manager.
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
This patch adds edac node for arm cortexa53 to report
errors on L1 and L2 caches.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
This reverts commit 786db82bd5bf09cc8f78c8b14445e843d7566b1c.
Since we are using serdes driver , no need of mapping serdes register
space into DP driver.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Tested-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Each plane can be associated with multiple DMA channels. So add
index for each DMA channel.
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Keep dtsi in sync with mainline kernel.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Remove unused xlnx,id property because it is not the part of
DT binding.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Updating required device tree changes as per mainlined driver
from 4.6 kernel.
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Previously, it was assumed that there is a 1:1 mapping between
PM ID defined in the platform firmware and a PM domain. However, there
can be a situation where multiple PM IDs belong to a single PM domain
(e.g. PM IDs for GPU and two pixel processors correspond to a single
PM domain).
This patch adds support for assigning more than one PM ID to
a single PM domain.
Updated documentation accordingly.
Assigned pixel processors PM IDs to GPU PM domain.
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
DDR power states are handled by the PM firmware, so this domain is
redundant. Also, since there is no device using this PM domain,
it will be powered off during boot, which is wrong.
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
i2c device is just level shifter. Remove reference from dts.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Add dcc to dtsi for supporting system without serial port.
DCC is enabled by default on ZynqMP.
Adding dcc to zcu100 and zcu102 which were tested.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
There is gpio push button on MIO22. Add it to DTS to have full board
description.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Show user that Linux is alive on the board.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
This patch enables can1 for ep108.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Reviewed-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Added clks for ep108 platform.
Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Zynqmp DMA driver expects two clocks (main clock and apb clock)
LPDDMA clock cofiguration is missing for the same in the
zynqmp-clk.dtsi file.
This patch updates for the same.
Reported-by: Sai Pavan Boddu <saipava@xilinx.com>
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
DTC 1.4.2 reports these warnings:
Warning (unit_address_vs_reg): Node /amba_apu has a reg or ranges
property, but no unit name
Warning (unit_address_vs_reg): Node /amba has a reg or ranges property,
but no unit name
Warning (unit_address_vs_reg): Node /amba/usb@fe200000 has a unit name,
but no reg property
Warning (unit_address_vs_reg): Node /amba/usb@fe300000 has a unit name,
but no reg property
Warning (unit_address_vs_reg): Node
/amba/dma@fd4c0000/dma-video0channel@fd4c0000 has a unit name, but no
reg property
Warning (unit_address_vs_reg): Node
/amba/dma@fd4c0000/dma-video1channel@fd4c0000 has a unit name, but no
reg property
Warning (unit_address_vs_reg): Node
/amba/dma@fd4c0000/dma-video2channel@fd4c0000 has a unit name, but no
reg property
Warning (unit_address_vs_reg): Node
/amba/dma@fd4c0000/dma-graphicschannel@fd4c0000 has a unit name, but no
reg property
Warning (unit_address_vs_reg): Node
/amba/dma@fd4c0000/dma-audio0channel@fd4c0000 has a unit name, but no
reg property
Warning (unit_address_vs_reg): Node
/amba/dma@fd4c0000/dma-audio1channel@fd4c0000 has a unit name, but no
reg property
Warning (unit_address_vs_reg): Node /memory has a reg or ranges
property, but no unit name
This patch is fixing them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
DTC 1.4.2 reports these warnings:
Warning (unit_address_vs_reg): Node /memory has a reg or ranges
property, but no unit name
Warning (unit_address_vs_reg): Node /pmu has a reg or ranges property,
but no unit name
Warning (unit_address_vs_reg): Node /fixedregulator@0 has a unit name,
but no reg property
This patch is fixing them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
The topic-miami SoMs contain a Zynq xc7z015 or xc7z030 SoC, 1GB DDR3L RAM,
32MB QSPI NOR flash and 256MB NAND flash.
The topic-miamiplus SoMs contain a Zynq xc7z035, xc7z045 or xc7z100 SoC,
2x 1GB DDR3L RAM, 64MB dual-parallel QSPI flash, clock sources
and a fan controller.
The "Florida" carrier boards add SD, USB, ethernet and other interfaces.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
|
Update the spi-max-frequency property of m25p80 flash slave to match
that of TI QSPI controller node, so that QSPI operations happen at
maximum supported frequency of 76.8MHz.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
|
|
Enable the Ethernet device in DT, provide board-specific configuration,
and enable the driver in Kconfig.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
|
|
Tegra186 includes a Synopsys DWC EQoS (Ethernet) device. Add this to the
Tegra186 SoC DT so that boards can make use of it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
|
|
Since we implement the dram capacity auto detect, we don't
need to set the channel number and sdram-channel in dts.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
|
|
Mostly by adding MACH_SUN50I to some existing #ifdefs enable support
for the the HCI0 USB host controller on the A64.
Fix up some minor 64-bit hiccups on the way.
Add the bare minimum DT bits to the A64 .dtsi and enable the controllers
and the PHY on the Pine64.
This is limited to the first USB controller at the moment, which is
connected to the lower USB socket on the Pine64 board.
[Andre: remove unneeded defines, enable OHCI, add commit message]
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
|
The sun8i-emac driver works fine with the A64 Ethernet IP, but we are
missing an alias entry to trigger the driver instantiation by U-Boot.
Add the line to point U-Boot to the Ethernet DT node.
This enables TFTP boot on the Pine64.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
