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tegra210
Age
Commit message (
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Author
2015-11-12
ARM: tegra: note that p2371-2180 is Jetson TX1
Stephen Warren
2015-11-12
ARM: tegra: error check Tegra210 XUSB padctl waits
Stephen Warren
2015-11-12
ARM: tegra: add lane tables to Tegra210 XUSB padctl
Stephen Warren
2015-11-12
ARM: tegra: switch Tegra210 to common XUSB padctl
Stephen Warren
2015-11-12
ARM: tegra210: implement PLLE init procedure from TRM
Stephen Warren
2015-09-16
ARM: tegra: clk_m is the architected timer source clock
Thierry Reding
2015-09-16
ARM: tegra: Implement clk_m
Thierry Reding
2015-09-16
ARM: tegra: Add p2371-2180 board
Stephen Warren
2015-08-13
tegra: Correct logic for reading pll_misc in clock_start_pll()
Simon Glass
2015-08-06
ARM: tegra: Add p2371-0000 board
Stephen Warren
2015-08-06
ARM: tegra: Add e2220-1170 board
Stephen Warren
2015-08-05
Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc.
Tom Warren
2015-08-05
Tegra: clocks: Add 38.4MHz OSC support for T210 use
Tom Warren
2015-07-28
T210: Add support for 64-bit T210-based P2571 board
Tom Warren
2015-07-28
ARM: Tegra210: Add SoC code/include files for T210
Tom Warren
2015-03-30
ARM: tegra: pinctrl: move Tegra210 code to the correct dir
Stephen Warren