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2017-08-17armv8: Add workaround for USB erratum A-009798Ran Wang
USB High Speed Squelch Threshold Adjustment This patch is adding the erratum for LS1043 and LS2080 SoCs. But miss LS1088A due to code base not support LS1088A yet, need to be added in arch/arm/cpu/armv8/fsl-layerscape/Kconfig in the future. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com> Signed-off-by: ran.wang <ran.wang_1@nxp.com>
2017-08-16soc/fsl-layerscape: Update SVR number for LS2081A and LS2041ASantan Kumar
Update SVR as per the SOC document. -LS2081A: 0x870919 -> 0x870918 -LS2041A: 0x870915 -> 0x870914 Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2017-08-16config: ls1012aqds: Add USB EHCI support for ls1012aqdsRajesh Bhagat
Add USB EHCI support for ls1012aqds platform Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
2017-08-09armv8: errata: Implement workaround for Cortex-A53 Erratum 855873Alison Wang
855873: An eviction might overtake a cache clean operation Workaround: The erratum can be avoided by upgrading cache clean by address operations to cache clean and invalidate operations. For Cortex-A53 r0p3 and later release, this can be achieved by setting CPUACTLR.ENDCCASCI to 1. This patch is to implement the workaround for this erratum. Signed-off-by: Alison Wang <alison.wang@nxp.com>
2017-08-09ARMv8/sec_firmware : Update chosen/kaslr-seed with random numberRuchika Gupta
kASLR support in kernel requires a random number to be passed via chosen/kaslr-seed propert. sec_firmware generates this random seed which can then be passed in the device tree node. sec_firmware reserves JR3 for it's own usage. Node for JR3 is removed from device-tree. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
2017-08-09LS2080ARDB: QSPI boot: Secure Boot image validationVinitha Pillai-B57223
Validates the images in the ESBC phase for LS2088ARDB platform and QSPI boot using esbc_validate command. Add images validation in default environment under mcinitcmd prior to MC initialization. Adds header address for PPA to be validated during ESBC phase for ARCH_LS2088 and QSPI_BOOT. Moves sec_init prior to ppa_init as for validation of PPA sec must be initialised before the PPA is initialised. Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
2017-08-09SECURE_BOOT: Unify memory map for Layerscape basedVinitha Pillai-B57223
Unify memory map for Layerscape based platforms as per DASH SDK memory map. This patch includes changes in bootscript, bootscript header and PPA header addresses change as per unified memory map. Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
2017-08-08configs: Remove CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS in all boardsBin Meng
Now that EHCD does not use CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS, remove it in all boards' config files. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
2017-07-19armv7: Add workaround for USB erratum A-009007Suresh Gupta
USB3PHY Observing Intermittent Failure in Rx This patch is adding the erratum for LS1021. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
2017-07-19armv7: Add workaround for USB erratum A-008997Suresh Gupta
USB3 LFPS Peak-Peak Differential Output Voltage Adjustment This patch is adding the erratum for LS1021. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
2017-07-19armv7: Add workaround for USB erratum A-009798Suresh Gupta
USB High Speed Squelch Threshold Adjustment This patch is adding the erratum for LS1021. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
2017-07-19armv7: Add workaround for USB erratum A-009008Suresh Gupta
USB High Speed (HS) EYE Height Adjustment This patch is adding the erratum for LS1021. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
2017-07-06stm32: Correct positioning of declarationSimon Glass
The current code gives a warning: arch/arm/mach-stm32/stm32f7/soc.c: In function 'arch_cpu_init': arch/arm/mach-stm32/stm32f7/soc.c:38:2: error: 'for' loop initial declarations are only allowed in C99 or C11 mode for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++) ^ arch/arm/mach-stm32/stm32f7/soc.c:38:2: note: use option -std=c99, -std=gnu99, -std=c11 or -std=gnu11 to compile your code Fix it by moving the declaration to the top of the function. Signed-off-by: Simon Glass <sjg@chromium.org> Series-cc trini
2017-07-06arm64: use psci reset on snapdragonRob Clark
This actually works on snapdragon.. not sure why we weren't using it. Fixes reboot/poweroff when using UEFI. Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2017-06-30Revert "armv7m: Disable D-cache when booting nommu(ARMv7M) Linux kernel"Tom Rini
The author of the commit discovered later on that this was already being done in cleanup_before_linux() on arch/arm/cpu/armv7m/cpu.c. This reverts commit 8f079cccb369995e46a2ab530d5d60b88c1e70bb. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-29ARM: atmel: Rename MA5D4EVKMarek Vasut
The board is now manufactured by Aries Embedded GmbH , rename it. Signed-off-by: Marek Vasut <marex@denx.de>
2017-06-29atmel, at91: fix taurus boardHeiko Schocher
since commit: f8b7fff1d5c5 "serial: atmel_usart: Add clk support" taurus board comes not up anymore. Fix it. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-06-29atmel, at91: fix smartweb boardHeiko Schocher
since commit: f8b7fff1d5c5 "serial: atmel_usart: Add clk support" smartweb board comes not up anymore. Fix it. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-06-29ARM: make memset and memcpy prompt message more clearlyAndy Yan
The origin SPL_USE_ARCH_MEMSET/MEMCPY use same prompt message as USE_ARCH_MEMSET/MEMCPY, which makes it's hard to distinguish them in menuconfig interface. This patch gives them different prompt messages for spl and none-spl config. Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2017-06-28ti816x: Enable ethernet supportTom Rini
The ti816x SoC revision of the ethernet IP block is handled by the "davinci_emac" driver, rather than the "cpsw" driver as done by later members of the family. Enable the relevant plumbing. Signed-off-by: Sriramakrishnan <srk@ti.com> Signed-off-by: Vitaly Wool <vitaly.wool@konsulko.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-27Merge git://www.denx.de/git/u-boot-imxTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/imx6qdl_icore_rqs.h include/configs/imx6ul_geam.h include/configs/imx6ul_isiot.h
2017-06-27mx6: soc: Fix typo in temperature unit nameFabio Estevam
The correct name is 'Celsius', so fix it accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-06-24Merge git://git.denx.de/u-boot-uniphierTom Rini
- fix sparse warnings - sync DT with Linux - add new board support (LD11/LD20 global)
2017-06-24arm64: dts: uniphier: add support for LD20 Global boardKunihiko Hayashi
Add initial device tree support for LD20 Global board. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-24arm64: dts: uniphier: add support for LD11 Global boardKunihiko Hayashi
Add initial device tree support for LD11 Global board. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-24ARM: dts: uniphier: sync DT with Linux next-20170622Masahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-24ARM: uniphier: fix various sparse warningsMasahiro Yamada
Fix warnings reported by sparse: - ... was not declared. Should it be static?" - cast to restricted __be32 While fixing those, the type conflict of cci500_init() was found. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-23atmel, at91: fix corvus boardHeiko Schocher
since commit: f8b7fff1d5c5 "serial: atmel_usart: Add clk support" corvus board comes not up anymore. Fix it. Signed-off-by: Heiko Schocher <hs@denx.de>
2017-06-23ARM: dts: OMAP5+: Update spl specific dtsLokesh Vutla
Now that we can specify DT nodes that can be used in spl, mark all necessary nodes as u-boot,dm-spl. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-06-23ARM: dts: am43xx: Update spl specific dtsLokesh Vutla
Now that we can specify DT nodes that can be used in spl, mark all necessary nodes as u-boot,dm-spl. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-06-23ti816x: Add additional boot device detection logicTom Rini
It has been observed that between PG1.0 and PG2.0/2.1 depending on which device we boot from, we may see a different value here than is documented in the TRM. Update the values for NAND and MMC1 based on real life usage on each revision. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-21Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini
2017-06-21Merge tag 'xilinx-for-v2017.07' of git://www.denx.de/git/u-boot-microblazeTom Rini
Xilinx changes for v2017.07 ZynqMP: - config cleanup - SD LS mode support - psu_init* cleanup - unmap OCM - Support for SMC Zynq: - add ddrc to Kconfig - add topic-miamilite board support
2017-06-21sunxi: Correct select's of SPL_STACK_R and SPL_SYS_MALLOC_SIMPLETom Rini
On ARCH_SUNXI we've been selecting these targets for a long time if SUPPORT_SPL is set. However, Lichee Pi Zero is the first platform we've added that does support SPL but does not build SPL and has exposed a latent bug. Both of these symbols depend on SPL not SUPPORT_SPL, so we need to update our select here otherwise we get a Kconfig warning. Fixes: f02abb0608fe ("sunxi: add support for Lichee Pi Zero") Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-20ARM: dts: omap3: Fix dts->dtb typoMarek Vasut
Trivial, fix typo. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com>
2017-06-20arm: zynq: Add support for the topic-miamilite system-on-moduleMike Looijmans
The topic-miamilite SoM contains a Zynq xc7z010 SoC, 1GB DDR3L RAM, 64MB dual-parallel QSPI NOR flash and clock sources. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20arm64: zynqmp: Check pmufw versionMichal Simek
If PMUFW version is not v0.3 then panic. ZynqMP switch to CCF based clock driver which requires PMUFW to be present at certain version. This patch ensure that you use correct and tested PMUFW binary. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20arm64: zynqmp: Define routines for mmio write and readSiva Durga Prasad Paladugu
Define routines of mmio write and read functionalities for zynqmp platform. Also do not call SMC from SPL because SPL is running before ATF in EL3 that's why SMCs can't be called because there is nothing to call. zynqmp_mmio*() are doing direct read/write accesses and this patch does the same. PMUFW is up and running at this time and there is a way to talk to pmufw via IPI but there is no reason to implement IPI stuff in SPL if we need just simple read for getting clock driver to work. Also make invoke_smc as global so that it can be reused in multile places where ever possible. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20arm: zynq: Add Kconfig option for any DDR specific initializationSiva Durga Prasad Paladugu
Add Kconfig option for ddr init as this might be required in cases like ddr less systems where we want to skip ddrc init and this option is useful for it. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20arm64: zynqmp: Do not map unused OCM/TCM regionMichal Simek
When OCM or TCM is protected this mapping still exist and it is causing access violation. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20arm64: zynqmp: Add comment about level shifter mode v1Michal Simek
Silicon v1 didn't support SD boot mode with level shifter. Because system can't boot any error message is not shown that's why comment is just a record if someone tries to debug it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-19arm64: zynqmp: spl: use given boot_device instead of fetching it againJean-Francois Dagenais
The boot_device argument to spl_boot_mode was massively added without actually modifying the existing functions. This commit actually makes use of the handed value, which is the same. Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-19arm64: zynqmp: spl: fix dual SD controller supportJean-Francois Dagenais
When enabling both SDHCI controllers, spl_mmc.c would actually choose device sdhci0 even if booted from sdhci1 (boot_device). This is because spl_mmc_get_device_index(boot_device) expects BOOT_DEVICE_MMC2[_2] in order to return index 1 instead of 0. The #if defined(...) statement is copied from board/xilinx/zynqmp/zynqmp.c So the key to properly enabling both controllers as boot sources is defining both CONFIG_ZYNQ_SDHCI0 and CONFIG_ZYNQ_SDHCI1 in your board's include/configs/*.h. Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-19arm64: zynqmp: Wire SD1 level shifter mode to SPLMichal Simek
Add missing SD boot mode to SPL. zcu102-rev1.0 is supporting this boot mode. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-19Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2017-06-16arm: mach-omap2: Generate MLO file from SD boot capable targetsAndrew F. Davis
Secure boot targets that can be loaded from an SD card FAT partition need to be called "MLO" on the filesystem, make a copy with this name to clarify the correct image for SD card booting. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-06-14Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini
2017-06-14sun50i: h5: Add initial NanoPi NEO2 supportJagan Teki
NanoPi NEO2 is designed and developed by FriendlyElec using the Allwinner 64-bit H5 SOC. NanoPi Neo2 key features - Allwinner H5, Quad-core 64-bit Cortex-A53 - 512MB DDR3 RAM - microSD slot - 10/100/1000M Ethernet - Serial Debug Port - 5V 2A DC MicroUSB power-supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-14Revert "ARM: fixed relocation using proper alignment"Tom Rini
It turns out this change was not intended to be merged and as such, revert it. This reverts commit cdde7de0364ffa505d631b342f1a2fa729e8e67d. Reported-by: Manfred Schlaegl <manfred.schlaegl@ginzinger.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-14sun50i: a64: Add initial Orangepi Win/WinPlus supportJagan Teki
Orangepi Win/WinPlus is an open-source single-board computer using the Allwinner A64 SOC. A64 Orangepi Win/WinPlus has - A64 Quad-core Cortex-A53 64bit - 1GB(Win)/2GB(Win Plus) DDR3 SDRAM - Debug TTL UART - Four USB 2.0 - HDMI - LCD - Audio and MIC - Wifi + BT - IR receiver - 5V DC power supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
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