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2018-04-09LSDK-18.03 Grapeboard initial supportJoris van Vossen
2018-02-13armv8: sec_firmware: Remove JR3 from device tree node in all casesRuchika Gupta
JR3 was getting removed from device tree only if random number generation was successful. However, if SEC firmware is present,JR3 should be removed from device tree node irrespective of the random seed generation as SEC firmware reserves it for it's use. Not removing it in case of random number generation failure causes the kernel to crash. Random number generation was being called twice. This is not required. If SEC firmware is running, SIP call can be made to the SEC firmware to get the random number. This call itself would return failure if function is not supported. Duplicate calling of random number generation function has been removed Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
2018-01-18common: board_f: vid: Add VID specific API to adjust core voltageRajesh Bhagat
Adds a VID specific API in init_sequence_f and spl code flow namely init_func_vid which is required to adjust core voltage. VID specific code is required in spl, hence moving flag CONFIG_VID out of spl flags. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
2018-01-18board: common: vid: Add support for LTC3882 voltage regulator chipRajesh Bhagat
Restructures common driver to support LTC3882 voltage regulator chip. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
2018-01-18armv8: lsch3: Add serdes and DDR voltage setupRajesh Bhagat
Adds SERDES voltage and reset SERDES lanes API and makes enable/disable DDR controller support 0.9V API common. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
2018-01-17armv8: layerscape: csu: enable ns access to PFE registersCalvin Johnson
Enable all types of non-secure access to PFE block registers. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Changes in v2: -Improved commit message to provide more description
2018-01-17armv8: fsl-lsch2: configure pfe's DDR and HDBUS interfaces and ECCCalvin Johnson
1. Set AWCACHE0 attribute of PFE DDR and HDBUS master interfaces to bufferable. 2. Set RD/WR QoS for PFE DDR and HDBUS AXI master interfaces. 3. Disable ECC detection for PFE. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Changes in v2: -Improved commit message to provide more description -Replaced magic numbers with proper definitions
2018-01-17armv8: fsl-lsch2: add pfe macros and update ccsr_scfg structureCalvin Johnson
SoC specific PFE macros are defined and structure ccsr_scfg is updated with members defined for PFE. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Changes in v2: None
2018-01-17armv8: fsl-lsch2: initialize pfe gemacCalvin Johnson
Call gemac_initialize to initialize both gemacs of pfe. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Changes in v2: None
2018-01-17armv8: fsl-layerscape: Add support of GPIO structurePrabhakar Kushwaha
Layerscape Gen2 SoC supports GPIO registers to control GPIO signals. Adding support of GPIO structure to access GPIO registers. Signed-off-by: Pratiyush Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Changes in v2: None
2018-01-17armv8: sec_firmware: Add support for multiple loadablesSumit Garg
Enable support for multiple loadable images in SEC firmware FIT image. Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
2018-01-13armv8/fsl-lsch2: correct QMAN clockHou Zhiqiang
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2018-01-12board: ls1012a: LS1012A-2G5RDB board supportBhaskar Upadhaya
LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
2018-01-12armv8/kconfig: Align boards of same family at one placeBhaskar Upadhaya
Align boards belonging to LS1012A, LS2080A SoC at one place Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
2018-01-12armv8: ls1088aqds: Add IFC-NOR as boot source for LS1088Ashish Kumar
IFC-NOR and QSPI-NOR pins are muxed on SoC,so they cannot be accessed simultaneously, but IFC-NOR can be accessed along with SD-BOOT. ls1088aqds_sdcard_ifc_defconfig: is defconfig for SD as boot source and IFC-NOR to be used as flash, this will be used to write IFC-NOR image on IFC flash. QSPI and DSPI cannot be accessed in this defconfig. IFC-NOR image is generated by ls1088aqds_defconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
2018-01-12armv8/ls1088a: configure PMU's PCTBENR to enable WDTZhang Ying-22455
The SP805-WDT module on LS1088A requires configuration of PMU's PCTBENR register to enable watchdog counter decrement and reset signal generation. The watchdog clock needs to be enabled first. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
2018-01-12u-boot: fixup the iommu-map property of fsl-mc nodeNipun Gupta
The iommu-map property in the fsl-mc node is updated by valid stream-ids by u-boot. This patch is to fixup this property for LS208x and LS1088. Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
2018-01-12armv8: ls1088 : MC alignment should always be fixed to 512MBAshish Kumar
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
2018-01-10ls1088aqds: Enable IFC and QIXIS in SPL imageVinitha Pillai-B57223
Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
2018-01-10ls1088ardb: Add SD Secure boot target supportVinitha V Pillai
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
2018-01-10armv8: fsl-layerscape: SPL size reductionVinitha V Pillai
Using changes in this patch we were able to reduce approx 4k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Compile-off mp.c and libfdt.c in case of SPL build. 2. Keep MMU and DCACHE specific variable and functions under CONFIG_SYS_DCACHE_OFF macro. 3. Compile-off IFC specific funtion call "init_early_memctl_regs" in case of SPL build. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
2018-01-09armv8: ls1012a: Add USB 2.0 controller phy type for ls1012aqds boardRan Wang
Without this propertiy, U-Boot will pop warning of 'USB phy type not defined' when select CONFIG_HAS_FSL_DR_USB. Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
2018-01-09drivers/misc: Share qbman init between archsAhmed Mansour
This patch adds changes necessary to move functionality present in PowerPC folders with ARM architectures that have DPAA1 QBMan hardware - Create new board/freescale/common/fsl_portals.c to house shared device tree fixups for DPAA1 devices with ARM and PowerPC cores - Add new header file to top includes directory to allow files in both architectures to grab the function prototypes - Port inhibit_portals() from PowerPC to ARM. This function is used in setup to disable interrupts on all QMan and BMan portals. It is needed because the interrupts are enabled by default for all portals including unused/uninitialised portals. When the kernel attempts to go to deep sleep the unused portals prevent it from doing so Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com> Series-changes: 2 - Add get_qman_freq() to replace get_sys_info() for readability - Correct the copyright year in new files - Replace !ARM with PPC to wall off PowerPC SOCs specific qman setup - Rename portals.c -> fsl_portals.c for clarity Series-changes: 3 - Add freescale old copyright in new file since it is a modified copy - Add ifdef QBMAN guard around get_qman_freq() - Return freq_qman instead of freq_systembus. More readable and robust - Add white space before return line in get_qman_freq() Series-changes: 4 - Update function name setup_portals() to setup_qbman_portals() in files that were missed the first time Series-changes: 5 - Include <fsl_qbman.h> to fix missing prototype in p1023rdb.c
2018-01-08armv8: errata: Implement workaround for Cortex-A53 Erratum 855873Alison Wang
855873: An eviction might overtake a cache clean operation Workaround: The erratum can be avoided by upgrading cache clean by address operations to cache clean and invalidate operations. For Cortex-A53 r0p3 and later release, this can be achieved by setting CPUACTLR.ENDCCASCI to 1. This patch is to implement the workaround for this erratum. Signed-off-by: Alison Wang <alison.wang@nxp.com>
2017-12-26arm: Add support of updating dts before fix-upPrabhakar Kushwaha
"ethernet" node fix-up for device tree happens before Linux boot. There can be requirement of updating "ethernet" node even before fix-up. So, add support of updating "ethernet" node. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-26armv8: ls2085a: Update README file for NAND bootYork Sun
Update README file to note LS2088A and LS1088A don't support booting from NAND flash. Signed-off-by: York Sun <york.sun@nxp.com>
2017-12-26armv8: layerscape: Discard the needless cpu nodesWenbin song
Using "cpu_pos_mask()" function to detect the real online cpus, and discard the needless cpu nodes on kernel dts. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-26armv8: ls1043a/ls2080a: check SoC by device IDWenbin song
Check LS1043A/LS2080a by device ID without using personality ID to determine revision number. This check applies to all various personalities of the same SoC family. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-26armv8: LS1088A_QSPI: SECURE_BOOT: Images validationUdit Agarwal
Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC phase using esbc_validate command. Enable validation of boot.scr script prior to its execution dependent on "secureboot" flag in environment Add header address for PPA to be validated during ESBC phase for LS1088A platform based on LAyerscape Chasis 3. Moves sec_init prior to ppa_init as for validation of PPA sec must be initialised before the PPA is initialised. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-26armv8: Workaround for USB erratua on LS1012ARan Wang
This is suplement for patch which handle below errata: A-009007, A-009008, A-008997, A-009798 Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-26armv8: fsl-layerscape: Add support of disabling core prefetchPrabhakar Kushwaha
Instruction prefetch feature is by default enabled during core release. This patch add support of disabling instruction prefetch by setting core mask in PPA. Here each core mask bit represents a core and prefetch is disabled at the time of core release. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-26armv8: mmu: fix page table mappingPeng Fan
To page mapping the lowest 2 bits needs to be 0x3. If not fix this, the final lowest 3 bits for page mapping is 0x1 which is marked as reserved. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-26arm64 :show_regs: show the address before relocationPeng Fan
After relocation, when error happends, it is hard to track ELR and LR with asm file objdumped from elf file. So subtract the gd->reloc_off the reflect the compliation address. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-15driver: net: fsl-mc: Use base 16 in simple_strtoulPrabhakar Kushwaha
Value provided in MC_MEM_SIZE_ENV_VAR is in hex. Use 16 as base in simple_strtoul. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-11-15armv8: ls1088aqds: Add SD boot support for ls1088qdsAshish Kumar
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-11-15armv8: ls1088ardb: Add SD boot support for ls1088Ashish Kumar
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-11-15armv8: ls1088: Enable SATA for ls1088Ashish Kumar
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-11-12ARM: rmobile: Fix eMMC signal voltage on Salvator-X/XSMarek Vasut
The eMMC is 1V8 device only and the signaling is always 1V8, fix the DT for Salvator-X/XS to describe the hardware correctly. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-09Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2017-11-09imx7: Add include guards for include/asm/arch-mx7/sys_proto.h fileLukasz Majewski
Signed-off-by: Lukasz Majewski <lukma@denx.de>
2017-11-09imx5: Add include guards for include/asm/arch-mx5/sys_proto.h fileLukasz Majewski
Signed-off-by: Lukasz Majewski <lukma@denx.de>
2017-11-09imx6: Add include guards for include/asm/arch-mx6/sys_proto.h fileLukasz Majewski
Signed-off-by: Lukasz Majewski <lukma@denx.de>
2017-11-09imx:display5: Add support for LWN's DISPLAY5 boardLukasz Majewski
This commit provides support for LWN's IMX6Q based DISPLAY5 board. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2017-11-09imx6: iomux: Add generic function to set RGMII IO voltage on IMX6 SoCsLukasz Majewski
This commit provides generic function to set the RGMII/HSIC IO voltage level on iMX6 devices. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2017-11-07mx51: Select the ESDHC_A001 erratumFabio Estevam
When a high speed card is connected to mx51evk the following error is seen: U-Boot 2017.11-rc2 (Oct 18 2017 - 13:49:26 -0200) CPU: Freescale i.MX51 rev3.0 at 800 MHz Reset cause: POR Board: MX51EVK DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 *** Warning - read failed, using default environment In: serial Out: serial Err: serial Net: FEC Hit any key to stop autoboot: 0 => saveenv Saving Environment to MMC... Writing to MMC(0)... failed The root cause for the failure is the eSDHC-A001 erratum: "eSDHC-A001 : Data timeout counter (SYSCTL[DTOCV]) is not reliable for values of 0x4,0x8, and 0xC" that is listed on some PowerArchitecture chips: https://www.nxp.com/files-static/32bit/doc/errata/MPC8379ECE.pdf Even though eSDHC-A001 is not documented on the i.MX51 errata document, I have confirmed with the NXP design team that this erratum does affect i.MX51, so fix the problem by selecting SYS_FSL_ERRATUM_ESDHC_A001 at SoC level. The i.MX51 ts4800 board already selects this option, but it is better to move this selection to the i.MX51 SoC level instead. Successfully tested with a high speed SD card on a mx51evk board. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
2017-11-07mx25: Select the ESDHC_A001 erratumFabio Estevam
When a high speed card is connected to mx25 the following error is seen: U-Boot 2017.11-rc2-00104-gb79372a (Oct 31 2017 - 11:02:22 -0200) CPU: Freescale i.MX25 rev1.2 at 399 MHz Reset cause: POR Board: MX25PDK I2C: ready DRAM: 64 MiB No arch specific invalidate_icache_all available! MMC: FSL_SDHC: 0 *** Warning - read failed, using default environment In: serial Out: serial Err: serial Net: FEC Hit any key to stop autoboot: 0 => saveenv Saving Environment to MMC... Writing to MMC(0)... failed , which prevents any usage of the SD card. The root cause for the failure is the eSDHC-A001 erratum: "eSDHC-A001 : Data timeout counter (SYSCTL[DTOCV]) is not reliable for values of 0x4,0x8, and 0xC" that is listed on some PowerArchitecture chips: https://www.nxp.com/files-static/32bit/doc/errata/MPC8379ECE.pdf Even though eSDHC-A001 is not documented on the i.MX25 errata document, I have confirmed with the NXP design team that this erratum does affect i.MX25, so fix the problem by selecting SYS_FSL_ERRATUM_ESDHC_A001 at SoC level. Successfully tested with a high speed SD card on a mx25pdk board. Suggested-by: Benoît Thébaudeau <benoit@wsystem.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br> Tested-by: Otavio Salvador <otavio@ossystems.com.br> # mx25pdk
2017-11-07mx25: Move MX25 selection to KconfigFabio Estevam
The motivation for moving MX25 selection to Kconfig is to be able to better handle MX25 specific errata, so that an errata option can be selected at SoC level instead of board level. This selection method also aligns with the way other i.MX SoCs are selected in U-Boot. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
2017-11-07rockchip: dts: rk3399: change sd-card io voltage to 3.0VKlaus Goger
The VCC_SD and VCC_SDIO rail should only be powered up to 3.0V on RK3399 platforms. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-07rockchip: dts: Use defines for pin names in rk3399-puma.dtsi and rk3368-lion.dtsKlaus Goger
pinctrl/rockchip.h provides defines that map pin numbers to pin names. Use them to make the dts more human readable. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-07rockchip: dts: rk3399-puma: update USB configurationPhilipp Tomsich
This change updates the USB configuration for the RK3399-Q7 in the DTS: * fixes the OTG board configuration by enabling it ('okay') * improves the speed of 'usb start' by disabling the unused EHCI/OHCI controllers Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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