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AgeCommit message (Expand)Author
2017-04-13board_f: Rename initdram() to dram_init()Simon Glass
2017-04-05board_f: Drop return value from initdram()Simon Glass
2017-04-05board_f: Drop board_type parameter from initdram()Simon Glass
2017-01-10mips: Use common _AC macro now.Tom Rini
2016-12-03libfdt: replace ARCH_FIXUP_FDT with ARCH_FIXUP_FDT_MEMORYMasahiro Yamada
2016-11-30MIPS: Fix map_physmem for cached mappingsPaul Burton
2016-11-30MIPS: Use ram_top, not bi_memsize, in arch_lmb_reservePaul Burton
2016-11-30mips: Let cache.h be included from assembly sourceMarek Vasut
2016-11-30MIPS: add handling for generic and EJTAG exceptionsDaniel Schwierzeck
2016-11-30MIPS: reserve space for exception vectorsDaniel Schwierzeck
2016-11-30MIPS: add asm-offsets for struct pt_regsDaniel Schwierzeck
2016-11-30MIPS: add possibility to setup initial stack and global data in SRAMDaniel Schwierzeck
2016-11-30MIPS: factor out code for initial stack and global dataDaniel Schwierzeck
2016-11-30MIPS: fix iand optimize setup of CP0 registersDaniel Schwierzeck
2016-11-30MIPS: fix ROM exception vectorsDaniel Schwierzeck
2016-11-30MIPS: make inclusion of ROM exception vectors configurableDaniel Schwierzeck
2016-10-31Fix spelling of "resetting".Vagrant Cascadian
2016-10-19efi: Use asmlinkage for EFIAPISimon Glass
2016-09-23Remove arch/${ARCH}/include/asm/errno.hMasahiro Yamada
2016-09-23treewide: replace #include <asm/errno.h> with <linux/errno.h>Masahiro Yamada
2016-09-21MIPS: Hang if run on a secondary CPUPaul Burton
2016-09-21MIPS: Fix cache maintenance in relocate_code & simplifyPaul Burton
2016-09-21boston: Introduce support for the MIPS Boston development boardPaul Burton
2016-09-21MIPS: Ensure cache ops complete in mips_cache_resetPaul Burton
2016-09-21MIPS: Clear hazard between TagLo writes & cache opsPaul Burton
2016-09-21MIPS: Ensure Config.K0=2 applies before any memory accessesPaul Burton
2016-09-21MIPS: Malta: Enable CM & L2 supportPaul Burton
2016-09-21MIPS: Join the coherent domain when a CM is presentPaul Burton
2016-09-21MIPS: L2 cache supportPaul Burton
2016-09-21MIPS: Map CM Global Control RegistersPaul Burton
2016-09-21MIPS: Define register names for cache initPaul Burton
2016-09-21MIPS: If we don't need DDR for cache init, init cache firstPaul Burton
2016-09-21MIPS: Preserve Config implementation-defined bitsPaul Burton
2016-09-21MIPS: Enable use of the instruction cache earlierPaul Burton
2016-09-21MIPS: Probe cache line sizes once during bootPaul Burton
2016-09-21MIPS: ath79: Use mach_cpu_init instead of arch_cpu_initPaul Burton
2016-09-21mips: Add MIPSfpga platform supportZubair Lutfullah Kakakhel
2016-09-21mips: xilfpga: Add device tree filesZubair Lutfullah Kakakhel
2016-08-15net: mii: Use spatch to update miiphy_registerJoe Hershberger
2016-08-01libfdt: Introduce new ARCH_FIXUP_FDT optionMichal Simek
2016-06-19clk: convert API to match reset/mailbox styleStephen Warren
2016-06-10MIPS: Make CONFIG_SYS_DCACHE_LINE_SIZE int, not hexPaul Burton
2016-06-10MIPS: Fix invalidate_dcache_range to operate on L1 DcachePaul Burton
2016-05-31mips: ath79: Use AR933X_PLL_SWITCH_CLOCK_CONTROL_REG macro defineWills Wang
2016-05-31mips: ath79: Add support for ungating USB and ethernet on qca953xWills Wang
2016-05-31mips: ath79: ap121: Enable ethernetWills Wang
2016-05-31mips: ath79: Rename get_bootstrap into ath79_get_bootstrapWills Wang
2016-05-31MIPS: Abstract cache op loops with a macroPaul Burton
2016-05-31MIPS: Split I & D cache line size configPaul Burton
2016-05-31MIPS: Move cache sizes to KconfigPaul Burton