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path: root/arch/x86/cpu
AgeCommit message (Expand)Author
2014-12-19x86: Clean up the FSP support codesBin Meng
2014-12-19x86: crownbay: Add SDHCI supportBin Meng
2014-12-19x86: crownbay: Add SPI flash supportBin Meng
2014-12-19x86: Use consistent name XXX_ADDR for binary blob flash addressBin Meng
2014-12-19x86: Add queensbay and crownbay Kconfig filesBin Meng
2014-12-19x86: Enable the queensbay cpu directory buildBin Meng
2014-12-19x86: Convert microcode format to device-tree-onlySimon Glass
2014-12-19x86: Add basic support to queensbay platform and crownbay boardBin Meng
2014-12-19x86: Correct problems in the microcode loadingSimon Glass
2014-12-19x86: ivybridge: Update the microcodeSimon Glass
2014-12-14x86: Support Intel FSP initialization path in start.SBin Meng
2014-12-14x86: Add post failure codes for bist and carBin Meng
2014-12-14x86: queensbay: Adapt FSP support codesBin Meng
2014-12-14x86: Initial import from Intel FSP release for Queensbay platformBin Meng
2014-12-14x86: Clean up asm-offsetsBin Meng
2014-12-08Replace <compiler.h> with <linux/compiler.h>Masahiro Yamada
2014-11-25x86: Add initial video device init for Intel GMASimon Glass
2014-11-25x86: Add GDT descriptors for option ROMsSimon Glass
2014-11-25x86: ivybridge: Add northbridge init functionsSimon Glass
2014-11-25x86: Add init for model 206AX CPUSimon Glass
2014-11-25x86: Add LAPIC setup codeSimon Glass
2014-11-25x86: Drop old CONFIG_INTEL_CORE_ARCH codeSimon Glass
2014-11-25x86: Refactor interrupt_init()Bin Meng
2014-11-25x86: Remove cpu_init_r() for x86Bin Meng
2014-11-25x86: Call cpu_init_interrupts() from interrupt_init()Bin Meng
2014-11-25x86: Add Intel speedstep and turbo mode codeSimon Glass
2014-11-25x86: ivybridge: Set up XHCI USBSimon Glass
2014-11-25x86: ivybridge: Set up EHCI USBSimon Glass
2014-11-25x86: ivybridge: Add SATA initSimon Glass
2014-11-25x86: ivybridge: Add additional LPC initSimon Glass
2014-11-25x86: ivybridge: Add PCH initSimon Glass
2014-11-25x86: ivybridge: Add support for BD82x6x PCHSimon Glass
2014-11-25x86: pci: Add handlers before and after a PCI hose scanSimon Glass
2014-11-25x86: Factor out common values in the link scriptSimon Glass
2014-11-25x86: Ensure that all relocation data is included in the imageSimon Glass
2014-11-25x86: Remove board_early_init_r()Simon Glass
2014-11-25x86: Add ivybridge directory to MakefileSimon Glass
2014-11-24Merge git://git.denx.de/u-boot-x86Tom Rini
2014-11-23x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directoryMasahiro Yamada
2014-11-23kbuild: Descend into SOC directory from CPU directoryMasahiro Yamada
2014-11-23linux/kernel.h: sync min, max, min3, max3 macros with LinuxMasahiro Yamada
2014-11-21x86: ivybridge: Implement SDRAM initSimon Glass
2014-11-21x86: ivybridge: Add LAPIC supportSimon Glass
2014-11-21x86: Make show_boot_progress() commonSimon Glass
2014-11-21x86: ivybridge: Add early init for PCH devicesSimon Glass
2014-11-21x86: ivybridge: Perform Intel microcode update on bootSimon Glass
2014-11-21x86: ivybridge: Check BIST value on bootSimon Glass
2014-11-21x86: ivybridge: Perform initial CPU setupSimon Glass
2014-11-21x86: Tidy up coreboot header usageSimon Glass
2014-11-21x86: ivybridge: Add early LPC init so that serial worksSimon Glass
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