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2017-03-19arm: Migrate SYS_THUMB_BUILD to Kconfig, introduce SPL_SYS_THUMB_BUILDTom Rini
Today, we have cases where we wish to build all of U-Boot in Thumb2 mode for various reasons. We also have cases where we only build SPL in Thumb2 mode due to size constraints and wish to build the rest of the system in ARM mode. So in this migration we introduce a new symbol as well, SPL_SYS_THUMB_BUILD to control if we build everything or just SPL (or in theory, just U-Boot) in Thumb2 mode. Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
2017-03-17Merge git://git.denx.de/u-boot-rockchipTom Rini
This includes support for rk3188 from Heiko Stübner and and rk3328 from Kever Yang. Also included is SPL support for rk3399 and a fix for rk3288 to get it booting again (spl_early_init()).
2017-03-17ARM: DT: stm32f7: add qspi pin contol nodeVikas Manocha
It also removes the qspi pin configuration done during the board initialization. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2017-03-17ARM: DT: stm32f7: add ethernet pin contol nodeVikas Manocha
It also removes the ethernet pin configuration done during the board initialization. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2017-03-17ARM: DT: stm32f7: add pin control node for serial port pinsVikas Manocha
And remove the uart pin configuration from board initialization. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2017-03-17ARM: DT: stm32f7: add pin control device nodeVikas Manocha
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2017-03-17ARM: DT: stm32f7: add usart1 & clock device tree nodesVikas Manocha
Also created alias for usart1 and specified oscillator clock for stm32f7 discovery board. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2017-03-17clk: stm32f7: add clock driver for stm32f7 familyVikas Manocha
add basic clock driver support for stm32f7 to enable clocks required by the peripherals. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-17arm: use common instructions applicable to armv7m & other arm archsVikas Manocha
This patch cleans the code by using instructions allowed for armv7m as well as other Arm archs. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2017-03-17arm: Update our 'ret' assembler macro slightlyTom Rini
We only support cores that do Thumb-1 or later. So we add a comment to explain this and remove the architecture test. Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Mans Rullgard <mans@mansr.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-17kirkwood: remove get_random_hex() and MD5 dependencyAndre Przywara
Commit 19a5944fcd62 ("mvgbe: remove setting of ethaddr within the driver") removed the usage of get_random_hex() from the mvgbe driver about six years ago. However the prototype of that function survived till today in some kirkwood header file. Remove that prototype and the CONFIG_MD5 dependency triggered by that. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
2017-03-16rockchip: dts: tinker: add usb host power supply nodeEddie Cai
Tinker board have a usb host. add dts node to provide power supply. Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: rk3036: dts: bind usb vbus-supply sourceKever Yang
Bind usb host and otg vbus to its source. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-16ARM: dts: rockchip: enable gmac for rk3288 boardsJacob Chen
Enable gmac interface for rk3288 board dts. use "okay" not "ok" Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-03-16dts: rk3036: add sdmmc for rk3036Eddie Cai
rk3036 support sdmmc, add dts node to support it. Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-03-16dts: rk3399: add mmc alias for rk3399Eddie Cai
add mmc alias for rk3399 Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: rk3328: add evb-rk3328 supportKever Yang
evb-rk3328 is an evb from Rockchip based on rk3328 SoC: - 2 USB2.0 Host port; - 1 USB3.0 Host port; - 1 HDMI port; - 2 10/100M eth port; - 2GB ddr; - 16GB eMMC; - UART to USB debug port; Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: rk3328: add pinctrl driverKever Yang
Add rk3328 pinctrl driver and grf/iomux structure definition. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: rk3328: add clock driverKever Yang
Add rk3328 clock driver and cru structure definition. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2017-03-16rockchip: rk3328: add soc basic supportKever Yang
RK3328 is a SoC from Rockchip with quad-core Cortex-A53 CPU. It supports two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-16MB range. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Add empty arch/arm/mach-rockchip/rk3328/Kconfig to avoid build error: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: rk3328: add device tree fileKever Yang
Add dts binding header for rk3328, files origin from kernel. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: config: rk3399: enable SPL config for evb-rk3399Kever Yang
Enable all the CONFIGs which need by SPL. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Added rockchip tag: Drop CONFIG_ROCKCHIP_DWMMC for now due to build error: Move changes to arch/arm/mach-rockchip/Kconfig to this patch: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: arm64: rk3399: add SPL supportKever Yang
Add SPL support for rk3399, default with of-platdata enabled. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Drop Kconfig changes to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: dts: rk3399: update for spl require driverKever Yang
Add syscon and dmc node, and 'u-boot,dm-pre-reloc' option for required driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Added rockchip tag: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: arm64: rk3399: add ddr controller driverKever Yang
RK3399 support DDR3, LPDDR3, DDR4 sdram, this patch is porting from coreboot, support 4GB lpddr3 in this version. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Added rockchip: tag: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: rk3188: Add main, spl and tpl boardsHeiko Stübner
The rk3188 needs 3 U-Boot stages: a tpl living in 1KB of sram, a spl the resides in the rest of the sram and loads the regular U-Boot living in regular ram. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-03-16rockchip: rk3188: Add sdram driverHeiko Stübner
The sdram controller blocks are very similar to the rk3288 in utilizing memory scheduler, Designware uPCTL and Designware PUBL blocks, only limited to one bank instead of two. There are some minimal differences when setting up the ram, so it gets a separate driver for the rk3188 but reuses the driver structs, as there is no need to define the same again. More optimization can happen when the modelling of the controller parts in the dts actually follow the hardware layout hopefully at some point in the future. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-03-16rockchip: rk3188: Add core supportHeiko Stübner
Add the core architecture code for the rk3188. It doesn't support the SPL yet, as because of some unknown error it doesn't start yet. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com> Drop these defines from rk3188_common.h CONFIG_GENERIC_MMC, CONFIG_BOUNCE_BUFFER, CONFIG_DOS_PARTITION CONFIG_PARTITION_UUIDS, CONFIG_CMD_PART: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: rk3188: Add core devicetree filesHeiko Stübner
The rk3188 shares a lot of peripherals with the rk3066 and thus has a common include called rk3xxx.dtsi. Add both this one and the specialized rk3188 on top of it. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-03-16rockchip: rk3188: Add clock driverHeiko Stübner
Add a driver for setting up and modifying the various PLLs and peripheral clocks on the RK3188. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-03-16rockchip: rk3188: Add header files for PMU and GRFHeiko Stübner
PMU is the power management unit and GRF is the general register file. Both are heavily used in U-Boot. Add header files with register definitions. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-03-16rockchip: Move bootrom-related declarations to a headerHeiko Stübner
So far spl-boards have declared the back_to_brom() function as simple extern in the files themself. That doesn't scale well if every boards defines this on its own. Therefore move the declarations to a bootrom header. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-03-16rockchip: Move bootrom helper compilation to a hidden optionHeiko Stübner
Right now the ROCKCHIP_SPL_BACK_TO_BROM option both triggers compilation of the bootrom hook-code as well as enabling the behaviour of loading the full U-Boot via the boot. New added socs may always need the bootrom code, while still being able to decide between loading U-Boot regularly or via the bootrom separately. So move the compilation of the bootrom code to a hidden option that gets selected by ROCKCHIP_SPL_BACK_TO_BROM, but can also be selected by other parts. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-03-16rockchip: rk3288: sdram: style fixes from rk3188 sdram reviewHeiko Stübner
The sdram IP blocks used on rk3066, rk3188 and rk3288 are very similar and we want to unify things once all 3 work as expected. Therefore try to keep the rk3288 sdram driver in line by applying the general review comments received for the rk3188 variant to it as well. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: rk3288: sdram: use constants in ddrconf tableHeiko Stübner
Use defines to describe the bit shifts used to create the table for ddrconf register values. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: arm64: rk3399: syscon addition for rk3399Kever Yang
rk3399 has different syscon registers which may used in spl, add to support rk3399 spl. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Added rockchip tag: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: clk: rk3399: update driver for splKever Yang
Add ddr clock setting, add rockchip_get_pmucru API, and enable of-platdata support. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Added rockchip tag and fix pmuclk_init() build warning: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: arm64: rk3399: move grf register definitions to grf_rk3399.hKever Yang
rk3399 grf register bit defenitions should locate in header file, so that not only pinctrl can use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Added rockchip tag: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: rk3288: use spl_early_init() instead of spl_init()Eddie Cai
Use spl_early_init() to make sure that early malloc() is initialised. This fixes booting on firefly-rk3288, for example. Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Eddie Cai <eddie.cai.linux@gmail.com>
2017-03-16Merge tag 'xilinx-for-v2017.05' of git://www.denx.de/git/u-boot-microblazeTom Rini
Xilinx changes for v2017.05 - Move to DM clk driver - Add clk support for zynq_sdhci
2017-03-16Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2017-03-15board: Add STMicroelectronics STiH410-B2260 supportPatrice Chotard
This is a 96Board compliant board based on STiH410 SoC: - 1GB DDR - On-Board USB combo WiFi/Bluetooth RTL8723BU with PCB soldered antenna - Ethernet 1000-BaseT - SATA - HDMI - 2 x USB2.0 type A - 1 x USB2.0 type micro-AB - SD card slot - High speed connector (SD/I2C/USB interfaces) - Low speed connector (UART/I2C/GPIO/SPI/PCM interfaces) Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-15STiH410-B2260: Add device treePatrice Chotard
This device tree has been extracted from v4.9 kernel Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-15STiH410: Add STi SDHCI driverPatrice Chotard
Add SDHCI host controller found on STMicroelectronics SoCs On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live inside a dedicated flashSS sub-system that provides an extend subset of registers that can be used to configure the Arasan MMC/SD Host Controller. This means, that the SDHCI Arasan Controller can be configured to be eMMC4.5 or 4.3 spec compliant. W/o these settings the SDHCI will configure and use the MMC/SD controller with limited features e.g. PIO mode, no DMA, no HS etc. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-03-15gpio: do not include <asm/arch/gpio.h> for ARCH_STIPatrice Chotard
As no gpio.h is defined in arch/arm/include/asm/arch-stih410, to avoid compilation failure, do not include asm/arch/gpio.h. This is needed for example when including sdhci.h, which include asm/gpio.h>. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-15STiH410: Add STi serial driverPatrice Chotard
This patch adds support to ASC (asynchronous serial controller) driver, which is basically a standard serial driver. This IP is common across other STMicroelectronics SoCs Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-15arm: Add support for STMicroelectronics STiH410 socPatrice Chotard
The STiH410 is an advanced multi-HD AVC processor with 3D graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU part of the STiH407 family. It has wide connectivity including USB 3.0, PCI-e, SATA and gigabit ethernet. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-03-15armv7m: Add SysTick timer driverPhil Edworthy
The SysTick is a 24-bit down counter that is found on all ARM Cortex M3, M4, M7 devices and is always located at a fixed address. The number of reference clock ticks that correspond to 10ms is normally defined in the SysTick Calibration register's TENMS field. However, on some devices this is wrong, so this driver allows the clock rate to be defined using CONFIG_SYS_HZ_CLOCK. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Vikas MANOCHA <vikas.manocha@st.com>
2017-03-15arm: omap3: Bring back ARM errata workaround 725233Siarhei Siamashka
The workaround for ARM errata 725233 had been lost since commit 45bf05854bc94e (armv7: adapt omap3 to the new cache maintenance framework). Bring it back in order to avoid very difficult to reproduce, but actually encountered in the wild CPU deadlocks when running software rendered X11 desktop on OMAP3530 hardware. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Migrate to Kconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-15arm: omap3: Compile clock.c with -marm option to unbreak OMAP3530Siarhei Siamashka
Boards with OMAP3530 SoC fail to boot since commit bd2c4522c26d5 ("ti: armv7: enable EXT support in SPL (using ti_armv7_common.h)") because it enabled the use of Thumb2 for the SPL. Experiments have shown that the deadlock happens in the prcm_init() function from 'arch/arm/mach-omap2/omap3/clock.c'. This patch enforces the compilation of clock.c source file in ARM mode and makes the deadlock disappear. We are yet to figure out the root cause of the problem. Still this is somewhat better than having non-bootable boards for years. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
generated by cgit v0.10.2 at 2024-11-15 05:07:10 (GMT)