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2016-12-06MAINTAINERS: socfpga: update email address for Dinh NguyenDinh Nguyen
With the acquisition of Altera by Intel, my Altera email may be going away soon. Update the contact to a more reliable address. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2016-12-06socfpga: add support for Terasic DE1-SoC boardAnatolij Gustschin
Add CycloneV based Terasic DE1-SoC board. The board boots from SD/MMC. Ethernet and USB host is supported. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Marek Vasut <marex@denx.de>
2016-10-27arm: socfpga: sockit: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27arm: socfpga: de0-nano-soc: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See
Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-04-10arm: socfpga: sockit: Use more relaxed DRAM timingsMarek Vasut
The currently present DRAM timings generated from GHRD 14.0 did not work on SoCkit rev. D because they were too tight. Load the DRAM timings from GHRD 13.0 which are more relaxed and work with SoCkit rev. D. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2015-12-20arm: socfpga: Drop the board boilerplateMarek Vasut
Drop all the common board code, since it is not completely useless. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-12-20arm: socfpga: sockit: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
2015-12-20arm: socfpga: sockit: Remove Micrel PHY configurationMarek Vasut
The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-12-20arm: socfpga: de0_nano: Remove Micrel PHY configurationMarek Vasut
The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-12-17usb: s3c-otg: Rename usb/s3c_udc.h to usb/dwc2_udc.hMarek Vasut
The driver is actually for the Designware DWC2 controller. This patch renames the global s3c_udc.h header to dwc2_udc.h. The rename is done automatically: $ sed -i "s/s3c_udc\.h/dwc2_udc.h/g" \ `git grep "s3c_udc\.h" | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
2015-12-17usb: s3c-otg: Rename s3c_udc_probe() functionMarek Vasut
The driver is actually for the Designware DWC2 controller. This patch is the second and final to rename global symbol, the s3c_udc_probe() function. The rename is done automatically: $ sed -i "s/s3c_udc_probe/dwc2_udc_probe/g" \ `git grep s3c_udc_probe | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
2015-12-17usb: s3c-otg: Rename struct s3c_plat_otg_dataMarek Vasut
The driver is actually for the Designware DWC2 controller. This patch is the first to rename global symbol, the struct s3c_plat_otg_data. The rename is done automatically: $ sed -i "s/s3c_plat_otg_data/dwc2_plat_otg_data/g" \ `git grep s3c_plat_otg_data | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
2015-09-04arm: socfpga: Add support for the Terasic DE-0 Atlas boardDinh Nguyen
Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV based board. The board can boot from SD/MMC. Ethernet is also supported. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-09-04arm: socfpga: Add support for Terasic SoCkit boardMarek Vasut
Add support for Terasic SoCkit, which is CycloneV based board. The board can boot either from SD/MMC or QSPI. Ethernet is also supported. Signed-off-by: Marek Vasut <marex@denx.de>